/** * @brief This function handles CEC interrupt requests. * @param hcec: CEC handle * @retval None */ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) { /* Save error status register for further error handling purposes */ hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR); /* Transmit error */ if(__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TERR) != RESET) { /* Acknowledgement of the error */ __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR); hcec->gState = HAL_CEC_STATE_READY; } /* Receive error */ if(__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RERR) != RESET) { /* Acknowledgement of the error */ __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR); hcec->Init.RxBuffer-=hcec->RxXferSize; hcec->RxXferSize = 0U; hcec->RxState = HAL_CEC_STATE_READY; } if((hcec->ErrorCode & CEC_ESR_ALL_ERROR) != 0U) { /* Error Call Back */ HAL_CEC_ErrorCallback(hcec); } /* Transmit byte request or block transfer finished */ if(__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TBTRF) != RESET) { CEC_Transmit_IT(hcec); } /* Receive byte or block transfer finished */ if(__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RBTF) != RESET) { if(hcec->RxXferSize == 0U) { /* reception is starting */ hcec->RxState = HAL_CEC_STATE_BUSY_RX; } CEC_Receive_IT(hcec); } }
/** * @brief This function handles CEC interrupt requests. * @param hcec: CEC handle * @retval None */ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) { /* save interrupts register for further error or interrupts handling purposes */ uint32_t reg = 0U; reg = hcec->Instance->ISR; /* ----------------------------Arbitration Lost Management----------------------------------*/ /* CEC TX arbitration error interrupt occurred --------------------------------------*/ if((reg & CEC_FLAG_ARBLST) != RESET) { hcec->ErrorCode = HAL_CEC_ERROR_ARBLST; __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST); } /* ----------------------------Rx Management----------------------------------*/ /* CEC RX byte received interrupt ---------------------------------------------------*/ if((reg & CEC_FLAG_RXBR) != RESET) { /* reception is starting */ hcec->RxState = HAL_CEC_STATE_BUSY_RX; hcec->RxXferSize++; /* read received byte */ *hcec->Init.RxBuffer++ = hcec->Instance->RXDR; __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR); } /* CEC RX end received interrupt ---------------------------------------------------*/ if((reg & CEC_FLAG_RXEND) != RESET) { /* clear IT */ __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND); /* Rx process is completed, restore hcec->RxState to Ready */ hcec->RxState = HAL_CEC_STATE_READY; hcec->ErrorCode = HAL_CEC_ERROR_NONE; hcec->Init.RxBuffer -= hcec->RxXferSize; HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize); hcec->RxXferSize = 0U; } /* ----------------------------Tx Management----------------------------------*/ /* CEC TX byte request interrupt ------------------------------------------------*/ if((reg & CEC_FLAG_TXBR) != RESET) { if (hcec->TxXferCount == 0U) { /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ __HAL_CEC_LAST_BYTE_TX_SET(hcec); hcec->Instance->TXDR = *hcec->pTxBuffPtr++; } else { hcec->Instance->TXDR = *hcec->pTxBuffPtr++; hcec->TxXferCount--; } /* clear Tx-Byte request flag */ __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR); } /* CEC TX end interrupt ------------------------------------------------*/ if((reg & CEC_FLAG_TXEND) != RESET) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND); /* Tx process is ended, restore hcec->gState to Ready */ hcec->gState = HAL_CEC_STATE_READY; /* Call the Process Unlocked before calling the Tx call back API to give the possibility to start again the Transmission under the Tx call back API */ __HAL_UNLOCK(hcec); hcec->ErrorCode = HAL_CEC_ERROR_NONE; HAL_CEC_TxCpltCallback(hcec); } /* ----------------------------Rx/Tx Error Management----------------------------------*/ if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U) { hcec->ErrorCode = reg; __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE); if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET) { hcec->Init.RxBuffer-=hcec->RxXferSize; hcec->RxXferSize = 0U; hcec->RxState = HAL_CEC_STATE_READY; } else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET)) { /* Set the CEC state ready to be able to start again the process */ hcec->gState = HAL_CEC_STATE_READY; } /* Error Call Back */ HAL_CEC_ErrorCallback(hcec); } }
/** * @brief This function handles CEC interrupt requests. * @param hcec: CEC handle * @retval None */ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) { /* save interrupts register for further error or interrupts handling purposes */ hcec->ErrorCode = hcec->Instance->ISR; /* CEC TX missing acknowledge error interrupt occurred -------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXACKE) != RESET)) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXACKE); hcec->State = HAL_CEC_STATE_ERROR; } /* CEC transmit error interrupt occurred --------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXERR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXERR) != RESET)) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXERR); hcec->State = HAL_CEC_STATE_ERROR; } /* CEC TX underrun error interrupt occurred --------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXUDR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXUDR) != RESET)) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXUDR); hcec->State = HAL_CEC_STATE_ERROR; } /* CEC TX arbitration error interrupt occurred --------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_ARBLST) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_ARBLST) != RESET)) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST); hcec->State = HAL_CEC_STATE_ERROR; } /* CEC RX overrun error interrupt occurred --------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXOVR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXOVR) != RESET)) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXOVR); hcec->State = HAL_CEC_STATE_ERROR; } /* CEC RX bit rising error interrupt occurred --------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_BRE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_BRE) != RESET)) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_BRE); hcec->State = HAL_CEC_STATE_ERROR; } /* CEC RX short bit period error interrupt occurred --------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_SBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_SBPE) != RESET)) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_SBPE); hcec->State = HAL_CEC_STATE_ERROR; } /* CEC RX long bit period error interrupt occurred --------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_LBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_LBPE) != RESET)) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_LBPE); hcec->State = HAL_CEC_STATE_ERROR; } /* CEC RX missing acknowledge error interrupt occurred --------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXACKE) != RESET)) { __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXACKE); hcec->State = HAL_CEC_STATE_ERROR; } if ((hcec->ErrorCode & CEC_ISR_ALL_ERROR) != 0) { HAL_CEC_ErrorCallback(hcec); } /* CEC RX byte received interrupt ---------------------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXBR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXBR) != RESET)) { /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */ CEC_Receive_IT(hcec); } /* CEC RX end received interrupt ---------------------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXEND) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXEND) != RESET)) { /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */ CEC_Receive_IT(hcec); } /* CEC TX byte request interrupt ------------------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXBR) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXBR) != RESET)) { /* TXBR IT is cleared during HAL_CEC_Transmit_IT processing */ CEC_Transmit_IT(hcec); } /* CEC TX end interrupt ------------------------------------------------*/ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXEND) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXEND) != RESET)) { /* TXEND IT is cleared during HAL_CEC_Transmit_IT processing */ CEC_Transmit_IT(hcec); } }
/** * @brief This function handles CEC interrupt requests. * @param hcec: CEC handle * @retval None */ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) { /* Save error status register for further error handling purposes */ hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR); /* Transmit error */ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TERR) != RESET)) { /* Acknowledgement of the error */ __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR); /* Check if a receive process is ongoing or not */ if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX) { /* Interrupts are not disabled due to reception still ongoing */ hcec->State = HAL_CEC_STATE_BUSY_RX; } else { /* Disable the CEC Transmission Interrupts */ __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE); hcec->State = HAL_CEC_STATE_READY; } } /* Receive error */ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RERR) != RESET)) { /* Acknowledgement of the error */ __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR); /* Check if a transmit process is ongoing or not */ if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX) { /* Interrupts are not disabled due to reception still ongoing */ hcec->State = HAL_CEC_STATE_BUSY_TX; } else { /* Disable the CEC Transmission Interrupts */ __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE); hcec->State = HAL_CEC_STATE_READY; } } if ((hcec->ErrorCode & CEC_ESR_ALL_ERROR) != 0) { HAL_CEC_ErrorCallback(hcec); } /* Transmit byte request or block transfer finished */ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TBTRF) != RESET)) { CEC_Transmit_IT(hcec); } /* Receive byte or block transfer finished */ if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RBTF) != RESET)) { CEC_Receive_IT(hcec); } }