int wil6210_debugfs_init(struct wil6210_priv *wil)
{
struct dentry *dbg = wil->debug = debugfs_create_dir(WIL_NAME,
wil_to_wiphy(wil)->debugfsdir);
if (IS_ERR_OR_NULL(dbg))
return -ENODEV;
debugfs_create_file("mbox", S_IRUGO, dbg, wil, &fops_mbox);
debugfs_create_file("vrings", S_IRUGO, dbg, wil, &fops_vring);
debugfs_create_file("stations", S_IRUGO, dbg, wil, &fops_sta);
debugfs_create_file("desc", S_IRUGO, dbg, wil, &fops_txdesc);
debugfs_create_u32("desc_index", S_IRUGO | S_IWUSR, dbg,
&dbg_txdesc_index);
debugfs_create_u32("vring_index", S_IRUGO | S_IWUSR, dbg,
&dbg_vring_index);
debugfs_create_file("bf", S_IRUGO, dbg, wil, &fops_bf);
debugfs_create_file("ssid", S_IRUGO | S_IWUSR, dbg, wil, &fops_ssid);
debugfs_create_u32("secure_pcp", S_IRUGO | S_IWUSR, dbg,
&wil->secure_pcp);
wil_debugfs_create_ulong("status", S_IRUGO | S_IWUSR, dbg,
&wil->status);
debugfs_create_u32("fw_version", S_IRUGO, dbg, &wil->fw_version);
debugfs_create_x32("hw_version", S_IRUGO, dbg, &wil->hw_version);
wil6210_debugfs_create_ISR(wil, "USER_ICR", dbg,
HOSTADDR(RGF_USER_USER_ICR));
wil6210_debugfs_create_ISR(wil, "DMA_EP_TX_ICR", dbg,
HOSTADDR(RGF_DMA_EP_TX_ICR));
wil6210_debugfs_create_ISR(wil, "DMA_EP_RX_ICR", dbg,
HOSTADDR(RGF_DMA_EP_RX_ICR));
wil6210_debugfs_create_ISR(wil, "DMA_EP_MISC_ICR", dbg,
HOSTADDR(RGF_DMA_EP_MISC_ICR));
wil6210_debugfs_create_pseudo_ISR(wil, dbg);
wil6210_debugfs_create_ITR_CNT(wil, dbg);
wil_debugfs_create_iomem_x32("RGF_USER_USAGE_1", S_IRUGO, dbg,
wil->csr +
HOSTADDR(RGF_USER_USAGE_1));
debugfs_create_u32("mem_addr", S_IRUGO | S_IWUSR, dbg, &mem_addr);
debugfs_create_file("mem_val", S_IRUGO, dbg, wil, &fops_memread);
debugfs_create_file("reset", S_IWUSR, dbg, wil, &fops_reset);
debugfs_create_file("rxon", S_IWUSR, dbg, wil, &fops_rxon);
debugfs_create_file("tx_mgmt", S_IWUSR, dbg, wil, &fops_txmgmt);
debugfs_create_file("wmi_send", S_IWUSR, dbg, wil, &fops_wmi);
debugfs_create_file("temp", S_IRUGO, dbg, wil, &fops_temp);
debugfs_create_file("freq", S_IRUGO, dbg, wil, &fops_freq);
debugfs_create_file("link", S_IRUGO, dbg, wil, &fops_link);
debugfs_create_file("info", S_IRUGO, dbg, wil, &fops_info);
wil6210_debugfs_init_blobs(wil, dbg);
return 0;
}
SDRAM_CTRL_T *get_sdram_controller(unsigned long ulTestAreaStart)
{
SDRAM_CTRL_T *ptSdram;
/* Get the SDRAM controller address from the test area address. */
ptSdram = NULL;
#if ASIC_TYP==ASIC_TYP_NETX4000_RELAXED || ASIC_TYP==ASIC_TYP_NETX4000
/* Is the test area inside the MEM SDRAM? */
if( ulTestAreaStart>=HOSTADDR(mem_sdram) && ulTestAreaStart<=HOSTADR(mem_sdram_sdram_end) )
{
ptSdram = (HOSTADEF(EXT_SDRAM_CTRL)*)HOSTADDR(ext_sdram_ctrl);
}
TEST_RESULT_T test(TEST_PARAMETER_T *ptTestParam)
{
TEST_RESULT_T tTestResult;
SQITEST_PARAMETER_T *ptTestParams;
QSI_CFG_T tQsiCfg;
const unsigned char * const pucSqiRomAddress = (const unsigned char * const)(HOSTADDR(sqirom));
systime_init();
ptTestParams = (SQITEST_PARAMETER_T*)(ptTestParam->pvInitParams);
/* Switch off SYS led. */
rdy_run_setLEDs(RDYRUN_OFF);
/* Say "hi". */
uprintf("\f. *** SQI test start ***\n");
uprintf(". offset: 0x%08x\n", ptTestParams->ulOffset);
uprintf(". size: 0x%08x\n", ptTestParams->ulSize);
uprintf(". buffer: 0x%08x\n", ptTestParams->pucBuffer);
tTestResult = boot_sqi_xip(&tQsiCfg);
if( tTestResult==TEST_RESULT_OK )
{
memcpy(ptTestParams->pucBuffer, pucSqiRomAddress+ptTestParams->ulOffset, ptTestParams->ulSize);
}
return tTestResult;
}
static int wil6210_debugfs_create_ITR_CNT(struct wil6210_priv *wil,
struct dentry *parent)
{
struct dentry *d = debugfs_create_dir("ITR_CNT", parent);
if (IS_ERR_OR_NULL(d))
return -ENODEV;
wil_debugfs_create_iomem_x32("TRSH", S_IRUGO, d, wil->csr +
HOSTADDR(RGF_DMA_ITR_CNT_TRSH));
wil_debugfs_create_iomem_x32("DATA", S_IRUGO, d, wil->csr +
HOSTADDR(RGF_DMA_ITR_CNT_DATA));
wil_debugfs_create_iomem_x32("CTL", S_IRUGO, d, wil->csr +
HOSTADDR(RGF_DMA_ITR_CNT_CRL));
return 0;
}
static int wil6210_debugfs_create_pseudo_ISR(struct wil6210_priv *wil,
struct dentry *parent)
{
struct dentry *d = debugfs_create_dir("PSEUDO_ISR", parent);
if (IS_ERR_OR_NULL(d))
return -ENODEV;
wil_debugfs_create_iomem_x32("CAUSE", S_IRUGO, d, wil->csr +
HOSTADDR(RGF_DMA_PSEUDO_CAUSE));
wil_debugfs_create_iomem_x32("MASK_SW", S_IRUGO, d, wil->csr +
HOSTADDR(RGF_DMA_PSEUDO_CAUSE_MASK_SW));
wil_debugfs_create_iomem_x32("MASK_FW", S_IRUGO, d, wil->csr +
HOSTADDR(RGF_DMA_PSEUDO_CAUSE_MASK_FW));
return 0;
}
/**
* Check address validity
*/
void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr)
{
u32 off;
if (ptr % 4)
return NULL;
if (ptr < WIL6210_FW_HOST_OFF)
return NULL;
off = HOSTADDR(ptr);
if (off > WIL6210_MEM_SIZE - 4)
return NULL;
return wil->csr + off;
}
/**
* Check address validity for WMI buffer; remap if needed
* @ptr - internal (linker) fw/ucode address
*
* Valid buffer should be DWORD aligned
*
* return address for accessing buffer from the host;
* if buffer is not valid, return NULL.
*/
void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr_)
{
u32 off;
u32 ptr = le32_to_cpu(ptr_);
if (ptr % 4)
return NULL;
ptr = wmi_addr_remap(ptr);
if (ptr < WIL6210_FW_HOST_OFF)
return NULL;
off = HOSTADDR(ptr);
if (off > WIL6210_MEM_SIZE - 4)
return NULL;
return wil->csr + off;
}
/*----------------*/
static void wil6210_debugfs_init_blobs(struct wil6210_priv *wil,
struct dentry *dbg)
{
int i;
char name[32];
for (i = 0; i < ARRAY_SIZE(fw_mapping); i++) {
struct debugfs_blob_wrapper *blob = &wil->blobs[i];
const struct fw_map *map = &fw_mapping[i];
if (!map->name)
continue;
blob->data = (void * __force)wil->csr + HOSTADDR(map->host);
blob->size = map->to - map->from;
snprintf(name, sizeof(name), "blob_%s", map->name);
wil_debugfs_create_ioblob(name, S_IRUGO, dbg, blob);
}
}
static void wil_print_ring(struct seq_file *s, const char *prefix,
void __iomem *off)
{
struct wil6210_priv *wil = s->private;
struct wil6210_mbox_ring r;
int rsize;
uint i;
wil_halp_vote(wil);
wil_memcpy_fromio_32(&r, off, sizeof(r));
wil_mbox_ring_le2cpus(&r);
/*
* we just read memory block from NIC. This memory may be
* garbage. Check validity before using it.
*/
rsize = r.size / sizeof(struct wil6210_mbox_ring_desc);
seq_printf(s, "ring %s = {\n", prefix);
seq_printf(s, " base = 0x%08x\n", r.base);
seq_printf(s, " size = 0x%04x bytes -> %d entries\n", r.size, rsize);
seq_printf(s, " tail = 0x%08x\n", r.tail);
seq_printf(s, " head = 0x%08x\n", r.head);
seq_printf(s, " entry size = %d\n", r.entry_size);
if (r.size % sizeof(struct wil6210_mbox_ring_desc)) {
seq_printf(s, " ??? size is not multiple of %zd, garbage?\n",
sizeof(struct wil6210_mbox_ring_desc));
goto out;
}
if (!wmi_addr(wil, r.base) ||
!wmi_addr(wil, r.tail) ||
!wmi_addr(wil, r.head)) {
seq_puts(s, " ??? pointers are garbage?\n");
goto out;
}
for (i = 0; i < rsize; i++) {
struct wil6210_mbox_ring_desc d;
struct wil6210_mbox_hdr hdr;
size_t delta = i * sizeof(d);
void __iomem *x = wil->csr + HOSTADDR(r.base) + delta;
wil_memcpy_fromio_32(&d, x, sizeof(d));
seq_printf(s, " [%2x] %s %s%s 0x%08x", i,
d.sync ? "F" : "E",
(r.tail - r.base == delta) ? "t" : " ",
(r.head - r.base == delta) ? "h" : " ",
le32_to_cpu(d.addr));
if (0 == wmi_read_hdr(wil, d.addr, &hdr)) {
u16 len = le16_to_cpu(hdr.len);
seq_printf(s, " -> %04x %04x %04x %02x\n",
le16_to_cpu(hdr.seq), len,
le16_to_cpu(hdr.type), hdr.flags);
if (len <= MAX_MBOXITEM_SIZE) {
unsigned char databuf[MAX_MBOXITEM_SIZE];
void __iomem *src = wmi_buffer(wil, d.addr) +
sizeof(struct wil6210_mbox_hdr);
/*
* No need to check @src for validity -
* we already validated @d.addr while
* reading header
*/
wil_memcpy_fromio_32(databuf, src, len);
wil_seq_hexdump(s, databuf, len, " : ");
}
} else {
seq_puts(s, "\n");
}
}
out:
seq_puts(s, "}\n");
wil_halp_unvote(wil);
}
const char *name,
struct dentry *parent, u32 off)
{
struct dentry *d = debugfs_create_dir(name, parent);
if (IS_ERR_OR_NULL(d))
return -ENODEV;
wil6210_debugfs_init_offset(wil, d, (void * __force)wil->csr + off,
isr_off);
return 0;
}
static const struct dbg_off pseudo_isr_off[] = {
{"CAUSE", 0444, HOSTADDR(RGF_DMA_PSEUDO_CAUSE), doff_io32},
{"MASK_SW", 0444, HOSTADDR(RGF_DMA_PSEUDO_CAUSE_MASK_SW), doff_io32},
{"MASK_FW", 0444, HOSTADDR(RGF_DMA_PSEUDO_CAUSE_MASK_FW), doff_io32},
{},
};
static int wil6210_debugfs_create_pseudo_ISR(struct wil6210_priv *wil,
struct dentry *parent)
{
struct dentry *d = debugfs_create_dir("PSEUDO_ISR", parent);
if (IS_ERR_OR_NULL(d))
return -ENODEV;
wil6210_debugfs_init_offset(wil, d, (void * __force)wil->csr,
pseudo_isr_off);
const char *name,
struct dentry *parent, u32 off)
{
struct dentry *d = debugfs_create_dir(name, parent);
if (IS_ERR_OR_NULL(d))
return -ENODEV;
wil6210_debugfs_init_offset(wil, d, (void * __force)wil->csr + off,
isr_off);
return 0;
}
static const struct dbg_off pseudo_isr_off[] = {
{"CAUSE", S_IRUGO, HOSTADDR(RGF_DMA_PSEUDO_CAUSE), doff_io32},
{"MASK_SW", S_IRUGO, HOSTADDR(RGF_DMA_PSEUDO_CAUSE_MASK_SW), doff_io32},
{"MASK_FW", S_IRUGO, HOSTADDR(RGF_DMA_PSEUDO_CAUSE_MASK_FW), doff_io32},
{},
};
static int wil6210_debugfs_create_pseudo_ISR(struct wil6210_priv *wil,
struct dentry *parent)
{
struct dentry *d = debugfs_create_dir("PSEUDO_ISR", parent);
if (IS_ERR_OR_NULL(d))
return -ENODEV;
wil6210_debugfs_init_offset(wil, d, (void * __force)wil->csr,
pseudo_isr_off);
/*----------------*/
int wil6210_debugfs_init(struct wil6210_priv *wil)
{
struct dentry *dbg = wil->debug = debugfs_create_dir(WIL_NAME,
wil_to_wiphy(wil)->debugfsdir);
if (IS_ERR_OR_NULL(dbg))
return -ENODEV;
debugfs_create_file("mbox", S_IRUGO, dbg, wil, &fops_mbox);
debugfs_create_file("vrings", S_IRUGO, dbg, wil, &fops_vring);
debugfs_create_file("txdesc", S_IRUGO, dbg, wil, &fops_txdesc);
debugfs_create_u32("txdesc_index", S_IRUGO | S_IWUSR, dbg,
&dbg_txdesc_index);
debugfs_create_file("bf", S_IRUGO, dbg, wil, &fops_bf);
debugfs_create_file("ssid", S_IRUGO | S_IWUSR, dbg, wil, &fops_ssid);
debugfs_create_u32("secure_pcp", S_IRUGO | S_IWUSR, dbg,
&wil->secure_pcp);
wil6210_debugfs_create_ISR(wil, "USER_ICR", dbg,
HOSTADDR(RGF_USER_USER_ICR));
wil6210_debugfs_create_ISR(wil, "DMA_EP_TX_ICR", dbg,
HOSTADDR(RGF_DMA_EP_TX_ICR));
wil6210_debugfs_create_ISR(wil, "DMA_EP_RX_ICR", dbg,
HOSTADDR(RGF_DMA_EP_RX_ICR));
wil6210_debugfs_create_ISR(wil, "DMA_EP_MISC_ICR", dbg,
HOSTADDR(RGF_DMA_EP_MISC_ICR));
wil6210_debugfs_create_pseudo_ISR(wil, dbg);
wil6210_debugfs_create_ITR_CNT(wil, dbg);
debugfs_create_u32("mem_addr", S_IRUGO | S_IWUSR, dbg, &mem_addr);
debugfs_create_file("mem_val", S_IRUGO, dbg, wil, &fops_memread);
debugfs_create_file("reset", S_IWUSR, dbg, wil, &fops_reset);
debugfs_create_file("temp", S_IRUGO, dbg, wil, &fops_temp);
wil->rgf_blob.data = (void * __force)wil->csr + 0;
wil->rgf_blob.size = 0xa000;
wil_debugfs_create_ioblob("blob_rgf", S_IRUGO, dbg, &wil->rgf_blob);
wil->fw_code_blob.data = (void * __force)wil->csr + 0x40000;
wil->fw_code_blob.size = 0x40000;
wil_debugfs_create_ioblob("blob_fw_code", S_IRUGO, dbg,
&wil->fw_code_blob);
wil->fw_data_blob.data = (void * __force)wil->csr + 0x80000;
wil->fw_data_blob.size = 0x8000;
wil_debugfs_create_ioblob("blob_fw_data", S_IRUGO, dbg,
&wil->fw_data_blob);
wil->fw_peri_blob.data = (void * __force)wil->csr + 0x88000;
wil->fw_peri_blob.size = 0x18000;
wil_debugfs_create_ioblob("blob_fw_peri", S_IRUGO, dbg,
&wil->fw_peri_blob);
wil->uc_code_blob.data = (void * __force)wil->csr + 0xa0000;
wil->uc_code_blob.size = 0x10000;
wil_debugfs_create_ioblob("blob_uc_code", S_IRUGO, dbg,
&wil->uc_code_blob);
wil->uc_data_blob.data = (void * __force)wil->csr + 0xb0000;
wil->uc_data_blob.size = 0x4000;
wil_debugfs_create_ioblob("blob_uc_data", S_IRUGO, dbg,
&wil->uc_data_blob);
return 0;
}
NETX_CONSOLEAPP_RESULT_T parflash_detect(CMD_PARAMETER_DETECT_T *ptParameter)
{
FLASH_DEVICE_T *ptFlashDevice;
NETX_CONSOLEAPP_RESULT_T tResult;
int iRes;
#if defined(DEBUG)
int iCnt;
char acCfiId[16];
#endif
unsigned int uiUnit;
unsigned int uiChipSelect;
DEVICE_DESCRIPTION_T *ptDeviceDescription;
/* Assume success. */
tResult = NETX_CONSOLEAPP_RESULT_OK;
/* Get the base address and setup routine. */
uiUnit = ptParameter->uSourceParameter.tParFlash.uiUnit;
uiChipSelect = ptParameter->uSourceParameter.tParFlash.uiChipSelect;
ptDeviceDescription = ptParameter->ptDeviceDescription;
ptFlashDevice = &(ptDeviceDescription->uInfo.tParFlash);
#if ASIC_TYP==ASIC_TYP_NETX500 || ASIC_TYP==ASIC_TYP_NETX100 || ASIC_TYP==ASIC_TYP_NETX50
/*
in: uiUnit, uiChipSelect
out: ptFlashDevice->pucFlashBase
ptFlashDevice->pfnSetup
*/
if( uiUnit==0 )
{
if( uiChipSelect>3 )
{
uprintf("! Invalid chipselect for unit %d: %d\n", uiUnit, uiChipSelect);
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
else
{
switch(uiChipSelect)
{
case 0:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(extsram0);
break;
case 1:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(extsram1);
break;
case 2:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(extsram2);
break;
case 3:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(extsram3);
break;
}
ptFlashDevice->pfnSetup = setup_flash_srb;
}
}
else if( uiUnit==1 )
{
if( uiChipSelect>3 )
{
uprintf("! Invalid chipselect for unit %d: %d\n", uiUnit, uiChipSelect);
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
else
{
//ptFlashDevice->pucFlashBase = (unsigned char*)(HOSTADDR(hif_ahbls6)+0x02000000*uiChipSelect);
switch(uiChipSelect)
{
case 0:
ptFlashDevice->pucFlashBase = (unsigned char*)(HOSTADDR(pci_ahbls6)+0x02000000*0);
break;
case 1:
ptFlashDevice->pucFlashBase = (unsigned char*)(HOSTADDR(pci_ahbls6)+0x02000000*1);
break;
case 2:
ptFlashDevice->pucFlashBase = (unsigned char*)(HOSTADDR(pci_ahbls6)+0x02000000*2);
break;
case 3:
ptFlashDevice->pucFlashBase = (unsigned char*)(HOSTADDR(pci_ahbls6)+0x02000000*3);
break;
}
ptFlashDevice->pfnSetup = setup_flash_ext;
}
}
else
{
uprintf("! Invalid unit number: %d\n", uiUnit);
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
#elif ASIC_TYP==ASIC_TYP_NETX10
if( uiUnit!=0 )
{
uprintf("! Invalid unit number: %d\n", uiUnit);
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
else if( uiChipSelect>3 )
{
uprintf("! Invalid chipselect for unit %d: %d\n", uiUnit, uiChipSelect);
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
else
{
switch(uiChipSelect)
{
case 0:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(extsram0);
break;
case 1:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(extsram1);
break;
case 2:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(extsram2);
break;
case 3:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(extsram3);
break;
}
ptFlashDevice->pfnSetup = setup_flash;
}
#elif ASIC_TYP==ASIC_TYP_NETX4000
#if 0
if( uiUnit==0 )
{
if( uiChipSelect>3 )
{
uprintf("! Invalid chipselect for unit %d: %d\n", uiUnit, uiChipSelect);
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
else
{
switch(uiChipSelect)
{
case 0:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADR(mem_extsram_cs0_base);
break;
case 1:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADR(mem_extsram_cs1_base);
break;
case 2:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADR(mem_extsram_cs2_base);
break;
case 3:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADR(mem_extsram_cs3_base);
break;
}
/* TODO ptFlashDevice->pfnSetup = setup_flash_srb; */
}
}
else if( uiUnit==1 )
{
if( uiChipSelect>3 )
{
uprintf("! Invalid chipselect for unit %d: %d\n", uiUnit, uiChipSelect);
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
else
{
//ptFlashDevice->pucFlashBase = (unsigned char*)(HOSTADDR(hif_ahbls6)+0x02000000*uiChipSelect);
switch(uiChipSelect)
{
case 0:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADR(hif_extsram_cs0_base);
break;
case 1:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADR(hif_extsram_cs1_base);
break;
case 2:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADR(hif_extsram_cs2_base);
break;
case 3:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADR(hif_extsram_cs3_base);
break;
}
/* TODO ptFlashDevice->pfnSetup = setup_flash_ext; */
}
}
else
#endif
if( uiUnit==2 )
{
if( uiChipSelect>1 )
{
uprintf("! Invalid chipselect for unit %d: %d\n", uiUnit, uiChipSelect);
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
else
{
switch(uiChipSelect)
{
case 0:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(NX2RAP_extsram0);
break;
case 1:
ptFlashDevice->pucFlashBase = (unsigned char*)HOSTADDR(NX2RAP_extsram1);
break;
}
ptFlashDevice->pfnSetup = setup_flash_rap_nor;
}
}
else
{
uprintf("! Invalid unit number: %d\n", uiUnit);
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
#else
uiUnit = uiUnit; /* avoid 'set but not used' warning */
uiChipSelect = uiChipSelect;
uprintf("! Unknown chip type or parallel flash not supported on this chip!\n");
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
#endif
if( tResult==NETX_CONSOLEAPP_RESULT_OK )
{
/* Try to detect the flash. */
uprintf(". Detecting CFI flash at 0x%08x...\n", ptFlashDevice->pucFlashBase);
iRes = CFI_IdentifyFlash(ptFlashDevice, &(ptParameter->uSourceParameter.tParFlash));
if( iRes==0 )
{
/* failed to identify flash */
uprintf("! failed to detect CFI flash\n");
/* clear the result data */
memset(ptDeviceDescription, 0, sizeof(DEVICE_DESCRIPTION_T));
tResult = NETX_CONSOLEAPP_RESULT_ERROR;
}
else
{
#if defined(DEBUG)
/* Show the device identifier. */
for(iCnt=0; iCnt<16; ++iCnt)
{
acCfiId[iCnt] = ptFlashDevice->szIdent[iCnt];
}
acCfiId[16] = 0x00;
DEBUGMSG(ZONE_VERBOSE, (". found device '%s'\n", acCfiId));
#endif
/* Set the result data. */
ptDeviceDescription->fIsValid = 1;
ptDeviceDescription->sizThis = sizeof(DEVICE_DESCRIPTION_T);
ptDeviceDescription->ulVersion = FLASHER_INTERFACE_VERSION;
ptDeviceDescription->tSourceTyp = BUS_ParFlash;
tResult = NETX_CONSOLEAPP_RESULT_OK;
}
}
return tResult;
}
