/**
* Calculate the speed of the processor for use in delays.
*
* @return The CPU speed in kHz.
*/
unsigned int get_cpu_speed(void)
{
if (IMG_PLATFORM_ID() != IMG_PLATFORM_ID_SILICON)
cpu_khz = 50000; /* FPGA board */
else {
/* If MIPS PLL external bypass bit is set, it means
* that the MIPS PLL is already set up to work at a
* frequency of 550 MHz; otherwise, the crystal is
* used with a frequency of 52 MHz
*/
if (read32(PISTACHIO_CLOCK_SWITCH) &
MIPS_EXTERN_PLL_BYPASS_MASK)
cpu_khz = 550000;
else
cpu_khz = 52000;
}
return cpu_khz;
}
static int get_count_mhz_freq(void)
{
static unsigned count_mhz_freq;
if (!count_mhz_freq) {
if (IMG_PLATFORM_ID() != IMG_PLATFORM_ID_SILICON)
count_mhz_freq = 25; /* FPGA board */
else {
/* If MIPS PLL external bypass bit is set, it means
* that the MIPS PLL is already set up to work at a
* frequency of 550 MHz; otherwise, the crystal is
* used with a frequency of 52 MHz
*/
if (read32(PISTACHIO_CLOCK_SWITCH) &
MIPS_EXTERN_PLL_BYPASS_MASK)
/* Half MIPS PLL freq. */
count_mhz_freq = 275;
else
/* Half Xtal freq. */
count_mhz_freq = 26;
}
}
return count_mhz_freq;
}
