.gen = 9, .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING, }; /* * Make sure any device matches here are from most specific to most * general. For example, since the Quanta match is based on the subsystem * and subvendor IDs, we need it to come before the more general IVB * PCI ID matches, otherwise we'll use the wrong info struct above. */ static const struct pci_device_id pciidlist[] = { INTEL_I830_IDS(&intel_i830_info), INTEL_I845G_IDS(&intel_845g_info), INTEL_I85X_IDS(&intel_i85x_info), INTEL_I865G_IDS(&intel_i865g_info), INTEL_I915G_IDS(&intel_i915g_info), INTEL_I915GM_IDS(&intel_i915gm_info), INTEL_I945G_IDS(&intel_i945g_info), INTEL_I945GM_IDS(&intel_i945gm_info), INTEL_I965G_IDS(&intel_i965g_info), INTEL_G33_IDS(&intel_g33_info), INTEL_I965GM_IDS(&intel_i965gm_info), INTEL_GM45_IDS(&intel_gm45_info), INTEL_G45_IDS(&intel_g45_info), INTEL_PINEVIEW_IDS(&intel_pineview_info), INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info), INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info), INTEL_SNB_D_IDS(&intel_sandybridge_d_info), INTEL_SNB_M_IDS(&intel_sandybridge_m_info), INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */ INTEL_IVB_M_IDS(&intel_ivybridge_m_info),
#define ALIGN(x, y) (((x) + (y) - 1) & -(y)) #define PAGE_ALIGN(x) ALIGN(x, 4096) #define GTT I915_GEM_DOMAIN_GTT #define CPU I915_GEM_DOMAIN_CPU static int _x_error_occurred; static const struct pci_id_match ids[] = { INTEL_I830_IDS(020), INTEL_I845G_IDS(021), INTEL_I85X_IDS(022), INTEL_I865G_IDS(023), INTEL_I915G_IDS(030), INTEL_I915GM_IDS(030), INTEL_I945G_IDS(031), INTEL_I945GM_IDS(031), INTEL_G33_IDS(033), INTEL_PINEVIEW_IDS(033), INTEL_I965G_IDS(040), INTEL_I965GM_IDS(040), INTEL_G45_IDS(045), INTEL_GM45_IDS(045), INTEL_IRONLAKE_D_IDS(050), INTEL_IRONLAKE_M_IDS(050),