/*
* omap4iss_ipipeif_isr - Configure ipipeif during interframe time.
* @ipipeif: Pointer to ISP IPIPEIF device.
* @events: IPIPEIF events
*/
void omap4iss_ipipeif_isr(struct iss_ipipeif_device *ipipeif, u32 events)
{
if (omap4iss_module_sync_is_stopping(&ipipeif->wait,
&ipipeif->stopping))
return;
if (events & ISP5_IRQ_ISIF_INT(0))
ipipeif_isif0_isr(ipipeif);
}
/*
* omap4iss_ipipeif_isr - Configure ipipeif during interframe time.
* @ipipeif: Pointer to ISP IPIPEIF device.
* @events: IPIPEIF events
*/
void omap4iss_ipipeif_isr(struct iss_ipipeif_device *ipipeif, u32 events)
{
if (omap4iss_module_sync_is_stopping(&ipipeif->wait,
&ipipeif->stopping))
return;
if ((events & ISP5_IRQ_ISIF_INT(0)) &&
(ipipeif->output & IPIPEIF_OUTPUT_MEMORY))
ipipeif_isr_buffer(ipipeif);
}
/*
* iss_isp_enable_interrupts - Enable ISS ISP interrupts.
* @iss: OMAP4 ISS device
*/
static void omap4iss_isp_enable_interrupts(struct iss_device *iss)
{
static const u32 isp_irq = ISP5_IRQ_OCP_ERR |
ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR |
ISP5_IRQ_RSZ_FIFO_OVF |
ISP5_IRQ_RSZ_INT_DMA |
ISP5_IRQ_ISIF_INT(0);
/* Enable ISP interrupts */
iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQSTATUS(0), isp_irq);
iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQENABLE_SET(0),
isp_irq);
}
/*
* iss_isr - Interrupt Service Routine for ISS module.
* @irq: Not used currently.
* @_iss: Pointer to the OMAP4 ISS device
*
* Handles the corresponding callback if plugged in.
*
* Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
* IRQ wasn't handled.
*/
static irqreturn_t iss_isr(int irq, void *_iss)
{
static const u32 ipipeif_events = ISP5_IRQ_IPIPEIF_IRQ |
ISP5_IRQ_ISIF_INT(0);
static const u32 resizer_events = ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR |
ISP5_IRQ_RSZ_FIFO_OVF |
ISP5_IRQ_RSZ_INT_DMA;
struct iss_device *iss = _iss;
u32 irqstatus;
irqstatus = iss_reg_read(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQSTATUS(5));
iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQSTATUS(5), irqstatus);
if (irqstatus & ISS_HL_IRQ_CSIA)
omap4iss_csi2_isr(&iss->csi2a);
if (irqstatus & ISS_HL_IRQ_CSIB)
omap4iss_csi2_isr(&iss->csi2b);
if (irqstatus & ISS_HL_IRQ_ISP(0)) {
u32 isp_irqstatus = iss_reg_read(iss, OMAP4_ISS_MEM_ISP_SYS1,
ISP5_IRQSTATUS(0));
iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQSTATUS(0),
isp_irqstatus);
if (isp_irqstatus & ISP5_IRQ_OCP_ERR)
dev_dbg(iss->dev, "ISP5 OCP Error!\n");
if (isp_irqstatus & ipipeif_events) {
omap4iss_ipipeif_isr(&iss->ipipeif,
isp_irqstatus & ipipeif_events);
}
if (isp_irqstatus & resizer_events)
omap4iss_resizer_isr(&iss->resizer,
isp_irqstatus & resizer_events);
#ifdef ISS_ISR_DEBUG
iss_isp_isr_dbg(iss, isp_irqstatus);
#endif
}
omap4iss_flush(iss);
#ifdef ISS_ISR_DEBUG
iss_isr_dbg(iss, irqstatus);
#endif
return IRQ_HANDLED;
}
