INT bbp_set_bw(struct _RTMP_ADAPTER *pAd, UINT8 bw)
{
INT result = FALSE;
if (pAd->phy_op && pAd->phy_op->bbp_set_bw)
result = pAd->phy_op->bbp_set_bw(pAd, bw);
if (result == TRUE)
{
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("%s(): Set PhyBW as %sHz.l\n",
__FUNCTION__, get_bw_str(bw)));
}
#ifdef MT7615
if (IS_MT7615(pAd))
{
DBGPRINT(RT_DEBUG_OFF, ("%s():NotSupportYet!\n", __FUNCTION__));
return FALSE;
}
#endif /* MT7615 */
// TODO: shiang-7603, revise following code
#ifdef MT_MAC
if (pAd->chipCap.hif_type == HIF_MT) {
UINT32 val;
RTMP_IO_READ32(pAd, AGG_BWCR, &val);
val &= (~0x0c);
switch (bw)
{
case BW_20:
val |= (0);
break;
case BW_40:
val |= (0x1 << 2);
break;
case BW_80:
val |= (0x2 << 2);
break;
}
RTMP_IO_WRITE32(pAd, AGG_BWCR, val);
}
#endif /* MT_MAC */
return result;
}
/*
========================================================================
Routine Description:
Initialize chip related information.
Arguments:
pCB - WLAN control block pointer
Return Value:
None
Note:
========================================================================
*/
int RtmpChipOpsHook(VOID *pCB)
{
RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)pCB;
RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
UINT32 MacValue;
int ret = 0;
RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
/* sanity check */
if (WaitForAsicReady(pAd) == FALSE)
return -1;
// TODO: shiang-7603
if (IS_MT7603(pAd) || IS_MT7628(pAd) || IS_MT76x6(pAd)) {
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_OFF, ("%s(%d): Not support for HIF_MT yet!\n",
__FUNCTION__, __LINE__));
}
else
{
#if defined(RTMP_MAC) || defined(RLT_MAC)
RTMP_IO_READ32(pAd, MAC_CSR0, &MacValue);
pAd->MACVersion = MacValue;
#endif /* defined(RTMP_MAC) || defined(RLT_MAC) */
}
if (pAd->MACVersion == 0xffffffff)
return -1;
/* default init */
RTMP_DRS_ALG_INIT(pAd, RATE_ALG_LEGACY);
#ifdef RTMP_RBUS_SUPPORT
if (pAd->infType == RTMP_DEV_INF_RBUS)
{
RTMP_SYS_IO_READ32(0xb000000c, &pAd->CommonCfg.CID);
RTMP_SYS_IO_READ32(0xb0000000, &pAd->CommonCfg.CN);
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("CN: %lx\tCID = %lx\n",
pAd->CommonCfg.CN, pAd->CommonCfg.CID));
}
#endif /* RTMP_RBUS_SUPPORT */
/* EDCCA */
pChipOps->ChipSetEDCCA= NULL;
#ifdef MT7628
if (IS_MT7628(pAd)) {
mt7628_init(pAd);
goto done;
}
#endif /* MT7628 */
#ifdef MT7615
if (IS_MT7615(pAd)) {
mt7615_init(pAd);
goto done;
};
#endif /* MT7615 */
#ifdef GREENAP_SUPPORT
pChipOps->EnableAPMIMOPS = EnableAPMIMOPSv1;
pChipOps->DisableAPMIMOPS = DisableAPMIMOPSv1;
#endif /* GREENAP_SUPPORT */
#ifdef RTMP_MAC
// TODO: default settings for rest of the chips!! change this to really default chip.
RTxx_default_Init(pAd);
#endif /* RTMP_MAC */
/* We depends on RfICType and MACVersion to assign the corresponding operation callbacks. */
#ifdef RT305x
#ifdef RT3352
/*FIXME by Steven: RFIC=RFIC_3022 in some RT3352 board*/
/* if (pAd->RfIcType == RFIC_3322) {*/
if (IS_RT3352(pAd))
RT3352_Init(pAd);
else
#endif /* RT3352 */
#ifdef RT5350
if (IS_RT5350(pAd))
RT5350_Init(pAd);
else
#endif /* RT5350 */
/* comment : the RfIcType is not ready yet, because EEPROM doesn't be initialized. */
/* if ((pAd->MACVersion == 0x28720200) &&
((pAd->RfIcType == RFIC_3320) || (pAd->RfIcType == RFIC_3020) || (pAd->RfIcType == RFIC_3021) || (pAd->RfIcType == RFIC_3022))) */
if (IS_RT3050_3052_3350(pAd))
RT305x_Init(pAd);
else
#endif /* RT305x */
done:
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("Chip specific bbpRegTbSize=%d!\n", pChipCap->bbpRegTbSize));
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("Chip VCO calibration mode = %d!\n", pChipCap->FlgIsVcoReCalMode));
return ret;
}
/*
========================================================================
Routine Description:
Initialize chip related information.
Arguments:
pCB - WLAN control block pointer
Return Value:
None
Note:
========================================================================
*/
int RtmpChipOpsHook(VOID *pCB)
{
RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)pCB;
RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
int ret = 0;
RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
/* sanity check */
if (WaitForAsicReady(pAd) == FALSE)
return -1;
// TODO: shiang-7603
if (IS_MT7603(pAd) || IS_MT7628(pAd) || IS_MT76x6(pAd)) {
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("%s(%d): Not support for HIF_MT yet!\n",
__FUNCTION__, __LINE__));
}
else
{
#if defined(RTMP_MAC) || defined(RLT_MAC)
RTMP_IO_READ32(pAd, MAC_CSR0, &pAd->MACVersion);
#endif /* defined(RTMP_MAC) || defined(RLT_MAC) */
}
if (pAd->MACVersion == 0xffffffff)
return -1;
/* default init */
RTMP_DRS_ALG_INIT(pAd, RATE_ALG_LEGACY);
#ifdef RTMP_RBUS_SUPPORT
if (pAd->infType == RTMP_DEV_INF_RBUS)
{
RTMP_SYS_IO_READ32(0xb000000c, &pAd->CommonCfg.CID);
RTMP_SYS_IO_READ32(0xb0000000, &pAd->CommonCfg.CN);
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("CN: %lx\tCID = %lx\n",
pAd->CommonCfg.CN, pAd->CommonCfg.CID));
}
#endif /* RTMP_RBUS_SUPPORT */
/* EDCCA */
pChipOps->ChipSetEDCCA= NULL;
#ifdef MT7628
if (IS_MT7628(pAd)) {
mt7628_init(pAd);
goto done;
}
#endif /* MT7628 */
#ifdef MT7615
if (IS_MT7615(pAd)) {
mt7615_init(pAd);
goto done;
};
#endif /* MT7615 */
#ifdef GREENAP_SUPPORT
#if defined (MT7603) || defined (MT7628)
pChipOps->EnableAPMIMOPS = EnableAPMIMOPSv2;
pChipOps->DisableAPMIMOPS = DisableAPMIMOPSv2;
#else
pChipOps->EnableAPMIMOPS = EnableAPMIMOPSv1;
pChipOps->DisableAPMIMOPS = DisableAPMIMOPSv1;
#endif
#endif /* GREENAP_SUPPORT */
#ifdef RTMP_MAC
// TODO: default settings for rest of the chips!! change this to really default chip.
RTxx_default_Init(pAd);
#endif /* RTMP_MAC */
/* We depends on RfICType and MACVersion to assign the corresponding operation callbacks. */
done:
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("Chip specific bbpRegTbSize=%d!\n", pChipCap->bbpRegTbSize));
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("Chip VCO calibration mode = %d!\n", pChipCap->FlgIsVcoReCalMode));
#ifdef DOT11W_PMF_SUPPORT
MTWF_LOG(DBG_CAT_ALL, DBG_SUBCAT_ALL, DBG_LVL_TRACE, ("[PMF] Encryption mode = %d\n", pChipCap->FlgPMFEncrtptMode));
#endif /* DOT11W_PMF_SUPPORT */
return ret;
}
