void InitSysCtrl(void)
{
// Disable the watchdog
DisableDog();
#ifdef _FLASH
// Copy time critical code and Flash setup code to RAM
// This includes the following functions: InitFlash();
// The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart
// symbols are created by the linker. Refer to the device .cmd file.
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
// Call Flash Initialization to setup flash waitstates
// This function must reside in RAM
InitFlash();
#endif
// *IMPORTANT*
// The Device_cal function, which copies the ADC & oscillator calibration values
// from TI reserved OTP into the appropriate trim registers, occurs automatically
// in the Boot ROM. If the boot ROM code is bypassed during the debug process, the
// following function MUST be called for the ADC and oscillators to function according
// to specification. The clocks to the ADC MUST be enabled before calling this
// function.
// See the device data manual and/or the ADC Reference
// Manual for more information.
#ifdef CPU1
EALLOW;
//enable pull-ups on unbonded IOs as soon as possible to reduce power consumption.
GPIO_EnableUnbondedIOPullups();
CpuSysRegs.PCLKCR13.bit.ADC_A = 1;
CpuSysRegs.PCLKCR13.bit.ADC_B = 1;
CpuSysRegs.PCLKCR13.bit.ADC_C = 1;
CpuSysRegs.PCLKCR13.bit.ADC_D = 1;
//check if device is trimmed
if(*((Uint16 *)0x5D1B6) == 0x0000){
//device is not trimmed, apply static calibration values
AnalogSubsysRegs.ANAREFTRIMA.all = 31709;
AnalogSubsysRegs.ANAREFTRIMB.all = 31709;
AnalogSubsysRegs.ANAREFTRIMC.all = 31709;
AnalogSubsysRegs.ANAREFTRIMD.all = 31709;
}
CpuSysRegs.PCLKCR13.bit.ADC_A = 0;
CpuSysRegs.PCLKCR13.bit.ADC_B = 0;
CpuSysRegs.PCLKCR13.bit.ADC_C = 0;
CpuSysRegs.PCLKCR13.bit.ADC_D = 0;
EDIS;
// Initialize the PLL control: PLLCR and CLKINDIV
// F28_PLLCR and F28_CLKINDIV are defined in F2837xD_Examples.h
// Note: The internal oscillator CANNOT be used as the PLL source if the
// PLLSYSCLK is configured to frequencies above 194 MHz.
InitSysPll(XTAL_OSC,IMULT_20,FMULT_1,PLLCLK_BY_2); //PLLSYSCLK = 20MHz(XTAL_OSC) * 20 (IMULT) * 1 (FMULT) / 2 (PLLCLK_BY_2)
//Turn on all peripherals
InitPeripheralClocks();
#endif
}
//
// Main
//
void main(void)
{
Uint16 afterWdReset = 0;
//
//When the example is used with the WatchDog Timer, the WatchDog
//timer will reset the device when it is LPM. If the example is run
//from flash and the device is in a boot to flash configuration,
//then it will restart the application and will enter the condition
//below and ESTOP0 if the debugger is connected.
//
//Check whether this was a normal startup or a watchdog reset.
//
afterWdReset = CpuSysRegs.RESC.bit.WDRSn;
//
// clear the reset cause bit.
//
CpuSysRegs.RESC.bit.WDRSn = 1;
if(afterWdReset)
{
ESTOP0;
}
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xS_SysCtrl.c file.
//
InitSysCtrl();
//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xS_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//
InitGpio();
//
// configure Gpios for this example
//
//
// GPIO10 is the external wake-up source
//
GPIO_SetupPinMux(10,GPIO_MUX_CPU1,0);
GPIO_SetupPinOptions(10,GPIO_INPUT,GPIO_PULLUP|GPIO_ASYNC);
//
// GPIO11 is an output
//
GPIO_SetupPinMux(11,GPIO_MUX_CPU1,0);
GPIO_SetupPinOptions(11,GPIO_OUTPUT,0);
EALLOW;
//
// Use GPIO10 to wake the CPU from Halt
//
CpuSysRegs.GPIOLPMSEL0.bit.GPIO10 = 1;
EDIS;
//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
DINT;
//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xS_PieCtrl.c file.
//
InitPieCtrl();
//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xS_DefaultIsr.c.
// This function is found in F2837xS_PieVect.c.
//
InitPieVectTable();
//
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
//
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.WAKE_INT = &local_WAKE_ISR;
EDIS;
//
// Step 4. Initialize all the Device Peripherals:
//
// Not applicable for this example.
//
// Step 5. User specific code, enable interrupts:
//
//
// Enable CPU INT1 which is connected to WakeInt:
//
IER |= M_INT1;
//
// Enable WAKEINT in the PIE: Group 1 interrupt 8
//
PieCtrlRegs.PIEIER1.bit.INTx8 = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
//
// Enable global Interrupts:
//
EINT;
//
// Set if the Oscillators will be on or off
//
if(HALT_OSCON)
{
//
// WD is functional in HALT
//
EALLOW;
CpuSysRegs.LPMCR.bit.WDINTE = 1; //watchdog interrupt will wake the
//device
WdRegs.SCSR.bit.WDENINT = 1; //enable the WD interrupt
ClkCfgRegs.CLKSRCCTL1.bit.WDHALTI = 1; //WD is functional in the
//HALT mode
EDIS;
//
// Reset WD. Uncomment this section
// if WD wakeup is desired.
//
// ServiceDog();
// // Enable the watchdog to wake the device from HALT
// EALLOW;
// WdRegs.WDCR.all = 0x0028;
// EDIS;
}
else
{
//
// WD is not functional in HALT
//
EALLOW;
CpuSysRegs.LPMCR.bit.WDINTE = 0;
ClkCfgRegs.CLKSRCCTL1.bit.WDHALTI = 0;
EDIS;
}
//
// Ensure there are no subsequent flash accesses to wake up the pump and
// bank. Power down the flash bank and pump.
//
SeizeFlashPump_Bank0();
FlashOff_Bank0();
ReleaseFlashPump();
SeizeFlashPump_Bank1();
FlashOff_Bank1();
ReleaseFlashPump();
//
// GPIO11 is Set high before entering HALT
//
GpioDataRegs.GPASET.bit.GPIO11 = 1;
HALT(); //enter enter HALT mode
//
// Reconfigure PLL after waking from HALT
// PLLSYSCLK = (XTAL_OSC) * (IMULT + FMULT) / (PLLSYSCLKDIV)
//
InitSysPll(XTAL_OSC,IMULT_20,FMULT_0,PLLCLK_BY_2);
ESTOP0;
//
// loop forever
//
while(1);
}
int main(void){
float Es,E;
unsigned int i, j;
unsigned int doa_aux[3];
int diff[3];
#ifdef _FLASH
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif
/*------------------------------------------------------*/
/* Inicialización */
/*------------------------------------------------------*/
InitSysCtrl();
InitSysPll(XTAL_OSC,IMULT_20,FMULT_0,PLLCLK_BY_2);
EDIS;
InitGpio();
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
//Configura operación del ADC-A
ADC_Configure(ADCA,16000);
//Configura los canales 2,3,4 y 5 del ADC-A
ADC_Init(ADCA, 2);
ADC_Init(ADCA, 3);
ADC_Init(ADCA, 4);
//La interrupción del ADC-A se da cuando termine el canal 4
ADC_Int(ADCA, 4);
hnd_cfft->OutPtr = CFFToutBuff; // Apuntador al Buffer de salida
hnd_cfft->Stages = STAGE; // Número de etapas de la FFT
hnd_cfft->FFTSize = N; // Tamaño de la FFT
hnd_cfft->CoefPtr = CFFTF32Coef; // Auntador a los coeficientes de Fourier
CFFT_f32_sincostable(hnd_cfft); // Calcula los factores de Fourier
//Configura el puerto serial
Serial_Init();
Serial_Configure(BR9600);
Serial_Start();
ADC_Start(ADCA); //Inicia la conversión del ADC-A
cont = 0;
//calculo de la energía del silencio (que filosófico suena esto)
EINT;
Es = 0;
while(cont<(N<<1));
ServiceDog();
cont = 0;
Es = energy(x);
while(cont<(N<<1));
ServiceDog();
cont = 0;
Es += energy(x);
Es = Es/2;
doaG = 0;
while(1){
#ifndef DEBUG
init = false;
while(!init);
#endif
E = Es;
for(j=0;j<3;j++){
//recibe datos y verifica si es ruido o no
do{
ADC_Start(ADCA);
while(cont<(N<<1));
cont = 0; //Una vez llenos los buffers de datos procedemos a realizar el algoritmo
ADC_Stop(ADCA); //detiene la adquisición para obtener las FFT
ServiceDog();
}while(!vad(x,E));
//FFT mic 1
hnd_cfft->InPtr = x1;
CFFT_f32u(hnd_cfft);
for(i=0;i<(N<<1);i++){
xw1[i] = hnd_cfft->CurrentInPtr[i];
}
//FFT mic 2
hnd_cfft->InPtr = x2;
CFFT_f32u(hnd_cfft);
for(i=0;i<(N<<1);i++){
xw2[i] = hnd_cfft->CurrentInPtr[i];
}
//FFT mic 3
hnd_cfft->InPtr = x3;
CFFT_f32u(hnd_cfft);
for(i=0;i<(N<<1);i++){
xw3[i] = hnd_cfft->CurrentInPtr[i];
}
ServiceDog();
doa_aux[j] = doa_est(xw1,xw2,xw3,30); //50
//doaG +=doa_aux[j];
DELAY_US(100000); //retraso de 100ms
ServiceDog();
E = 0.8*E;
}//for j
diff[0] = doa_aux[0]-doa_aux[1]; //diferencia entre primer y segundo frame
diff[1] = doa_aux[1]-doa_aux[2]; //diferencia entre segundo y tercer frame
diff[2] = doa_aux[0]-doa_aux[2]; //diferencia entre primer y tercer frame
if(diff[0]<0)
diff[0] = -diff[0];
if(diff[1]<0)
diff[1] = -diff[1];
if(diff[2]<0)
diff[2] = -diff[2];
if( diff[0]<=diff[1] && diff[0]<=diff[2] )
doaG = (doa_aux[0]+doa_aux[1])>>1;
else if ( diff[1]<=diff[0] && diff[1]<=diff[2] )
doaG = (doa_aux[1]+doa_aux[2])>>1;
else
