static void transfer_register (ThreadId tid, int abs_regno, void * buf, transfer_direction dir, int size, Bool *mod) { ThreadState* tst = VG_(get_ThreadState)(tid); int set = abs_regno / num_regs; int regno = abs_regno % num_regs; *mod = False; VexGuestARMState* arm = (VexGuestARMState*) get_arch (set, tst); switch (regno) { case 0: VG_(transfer) (&arm->guest_R0, buf, dir, size, mod); break; case 1: VG_(transfer) (&arm->guest_R1, buf, dir, size, mod); break; case 2: VG_(transfer) (&arm->guest_R2, buf, dir, size, mod); break; case 3: VG_(transfer) (&arm->guest_R3, buf, dir, size, mod); break; case 4: VG_(transfer) (&arm->guest_R4, buf, dir, size, mod); break; case 5: VG_(transfer) (&arm->guest_R5, buf, dir, size, mod); break; case 6: VG_(transfer) (&arm->guest_R6, buf, dir, size, mod); break; case 7: VG_(transfer) (&arm->guest_R7, buf, dir, size, mod); break; case 8: VG_(transfer) (&arm->guest_R8, buf, dir, size, mod); break; case 9: VG_(transfer) (&arm->guest_R9, buf, dir, size, mod); break; case 10: VG_(transfer) (&arm->guest_R10, buf, dir, size, mod); break; case 11: VG_(transfer) (&arm->guest_R11, buf, dir, size, mod); break; case 12: VG_(transfer) (&arm->guest_R12, buf, dir, size, mod); break; case 13: VG_(transfer) (&arm->guest_R13, buf, dir, size, mod); break; case 14: VG_(transfer) (&arm->guest_R14, buf, dir, size, mod); break; case 15: { VG_(transfer) (&arm->guest_R15T, buf, dir, size, mod); if (dir == gdbserver_to_valgrind && *mod) { arm->guest_R15T = thumb_pc(arm->guest_R15T); } break; } case 16: case 17: case 18: case 19: case 20: case 21: case 22: case 23: case 24: *mod = False; break; case 25: { UInt cpsr = LibVEX_GuestARM_get_cpsr (arm); if (dir == valgrind_to_gdbserver) { VG_(transfer) (&cpsr, buf, dir, size, mod); } else { # if 0 UInt newcpsr; VG_(transfer) (&newcpsr, buf, dir, size, mod); *mod = newcpsr != cpsr; LibVEX_GuestARM_put_flags (newcpsr, arm); # else *mod = False; # endif } break; } case 26: VG_(transfer) (&arm->guest_D0, buf, dir, size, mod); break; case 27: VG_(transfer) (&arm->guest_D1, buf, dir, size, mod); break; case 28: VG_(transfer) (&arm->guest_D2, buf, dir, size, mod); break; case 29: VG_(transfer) (&arm->guest_D3, buf, dir, size, mod); break; case 30: VG_(transfer) (&arm->guest_D4, buf, dir, size, mod); break; case 31: VG_(transfer) (&arm->guest_D5, buf, dir, size, mod); break; case 32: VG_(transfer) (&arm->guest_D6, buf, dir, size, mod); break; case 33: VG_(transfer) (&arm->guest_D7, buf, dir, size, mod); break; case 34: VG_(transfer) (&arm->guest_D8, buf, dir, size, mod); break; case 35: VG_(transfer) (&arm->guest_D9, buf, dir, size, mod); break; case 36: VG_(transfer) (&arm->guest_D10, buf, dir, size, mod); break; case 37: VG_(transfer) (&arm->guest_D11, buf, dir, size, mod); break; case 38: VG_(transfer) (&arm->guest_D12, buf, dir, size, mod); break; case 39: VG_(transfer) (&arm->guest_D13, buf, dir, size, mod); break; case 40: VG_(transfer) (&arm->guest_D14, buf, dir, size, mod); break; case 41: VG_(transfer) (&arm->guest_D15, buf, dir, size, mod); break; case 42: VG_(transfer) (&arm->guest_D16, buf, dir, size, mod); break; case 43: VG_(transfer) (&arm->guest_D17, buf, dir, size, mod); break; case 44: VG_(transfer) (&arm->guest_D18, buf, dir, size, mod); break; case 45: VG_(transfer) (&arm->guest_D19, buf, dir, size, mod); break; case 46: VG_(transfer) (&arm->guest_D20, buf, dir, size, mod); break; case 47: VG_(transfer) (&arm->guest_D21, buf, dir, size, mod); break; case 48: VG_(transfer) (&arm->guest_D22, buf, dir, size, mod); break; case 49: VG_(transfer) (&arm->guest_D23, buf, dir, size, mod); break; case 50: VG_(transfer) (&arm->guest_D24, buf, dir, size, mod); break; case 51: VG_(transfer) (&arm->guest_D25, buf, dir, size, mod); break; case 52: VG_(transfer) (&arm->guest_D26, buf, dir, size, mod); break; case 53: VG_(transfer) (&arm->guest_D27, buf, dir, size, mod); break; case 54: VG_(transfer) (&arm->guest_D28, buf, dir, size, mod); break; case 55: VG_(transfer) (&arm->guest_D29, buf, dir, size, mod); break; case 56: VG_(transfer) (&arm->guest_D30, buf, dir, size, mod); break; case 57: VG_(transfer) (&arm->guest_D31, buf, dir, size, mod); break; case 58: VG_(transfer) (&arm->guest_FPSCR, buf, dir, size, mod); break; default: vg_assert(0); } }
/* store registers in the guest state (gdbserver_to_valgrind) or fetch register from the guest state (valgrind_to_gdbserver). */ static void transfer_register (ThreadId tid, int abs_regno, void * buf, transfer_direction dir, int size, Bool *mod) { ThreadState* tst = VG_(get_ThreadState)(tid); int set = abs_regno / num_regs; int regno = abs_regno % num_regs; *mod = False; VexGuestARMState* arm = (VexGuestARMState*) get_arch (set, tst); switch (regno) { // numbers here have to match the order of regs above // Attention: gdb order does not match valgrind order. case 0: VG_(transfer) (&arm->guest_R0, buf, dir, size, mod); break; case 1: VG_(transfer) (&arm->guest_R1, buf, dir, size, mod); break; case 2: VG_(transfer) (&arm->guest_R2, buf, dir, size, mod); break; case 3: VG_(transfer) (&arm->guest_R3, buf, dir, size, mod); break; case 4: VG_(transfer) (&arm->guest_R4, buf, dir, size, mod); break; case 5: VG_(transfer) (&arm->guest_R5, buf, dir, size, mod); break; case 6: VG_(transfer) (&arm->guest_R6, buf, dir, size, mod); break; case 7: VG_(transfer) (&arm->guest_R7, buf, dir, size, mod); break; case 8: VG_(transfer) (&arm->guest_R8, buf, dir, size, mod); break; case 9: VG_(transfer) (&arm->guest_R9, buf, dir, size, mod); break; case 10: VG_(transfer) (&arm->guest_R10, buf, dir, size, mod); break; case 11: VG_(transfer) (&arm->guest_R11, buf, dir, size, mod); break; case 12: VG_(transfer) (&arm->guest_R12, buf, dir, size, mod); break; case 13: VG_(transfer) (&arm->guest_R13, buf, dir, size, mod); break; case 14: VG_(transfer) (&arm->guest_R14, buf, dir, size, mod); break; case 15: { VG_(transfer) (&arm->guest_R15T, buf, dir, size, mod); if (dir == gdbserver_to_valgrind && *mod) { // If gdb is changing the PC, we have to set the thumb bit // if needed. arm->guest_R15T = thumb_pc(arm->guest_R15T); } break; } case 16: case 17: case 18: case 19: case 20: /* 9 "empty registers". See struct reg regs above. */ case 21: case 22: case 23: case 24: *mod = False; break; case 25: { UInt cpsr = LibVEX_GuestARM_get_cpsr (arm); if (dir == valgrind_to_gdbserver) { VG_(transfer) (&cpsr, buf, dir, size, mod); } else { # if 0 UInt newcpsr; VG_(transfer) (&newcpsr, buf, dir, size, mod); *mod = newcpsr != cpsr; // GDBTD ???? see FIXME in guest_arm_helpers.c LibVEX_GuestARM_put_flags (newcpsr, arm); # else *mod = False; # endif } break; } case 26: VG_(transfer) (&arm->guest_D0, buf, dir, size, mod); break; case 27: VG_(transfer) (&arm->guest_D1, buf, dir, size, mod); break; case 28: VG_(transfer) (&arm->guest_D2, buf, dir, size, mod); break; case 29: VG_(transfer) (&arm->guest_D3, buf, dir, size, mod); break; case 30: VG_(transfer) (&arm->guest_D4, buf, dir, size, mod); break; case 31: VG_(transfer) (&arm->guest_D5, buf, dir, size, mod); break; case 32: VG_(transfer) (&arm->guest_D6, buf, dir, size, mod); break; case 33: VG_(transfer) (&arm->guest_D7, buf, dir, size, mod); break; case 34: VG_(transfer) (&arm->guest_D8, buf, dir, size, mod); break; case 35: VG_(transfer) (&arm->guest_D9, buf, dir, size, mod); break; case 36: VG_(transfer) (&arm->guest_D10, buf, dir, size, mod); break; case 37: VG_(transfer) (&arm->guest_D11, buf, dir, size, mod); break; case 38: VG_(transfer) (&arm->guest_D12, buf, dir, size, mod); break; case 39: VG_(transfer) (&arm->guest_D13, buf, dir, size, mod); break; case 40: VG_(transfer) (&arm->guest_D14, buf, dir, size, mod); break; case 41: VG_(transfer) (&arm->guest_D15, buf, dir, size, mod); break; case 42: VG_(transfer) (&arm->guest_D16, buf, dir, size, mod); break; case 43: VG_(transfer) (&arm->guest_D17, buf, dir, size, mod); break; case 44: VG_(transfer) (&arm->guest_D18, buf, dir, size, mod); break; case 45: VG_(transfer) (&arm->guest_D19, buf, dir, size, mod); break; case 46: VG_(transfer) (&arm->guest_D20, buf, dir, size, mod); break; case 47: VG_(transfer) (&arm->guest_D21, buf, dir, size, mod); break; case 48: VG_(transfer) (&arm->guest_D22, buf, dir, size, mod); break; case 49: VG_(transfer) (&arm->guest_D23, buf, dir, size, mod); break; case 50: VG_(transfer) (&arm->guest_D24, buf, dir, size, mod); break; case 51: VG_(transfer) (&arm->guest_D25, buf, dir, size, mod); break; case 52: VG_(transfer) (&arm->guest_D26, buf, dir, size, mod); break; case 53: VG_(transfer) (&arm->guest_D27, buf, dir, size, mod); break; case 54: VG_(transfer) (&arm->guest_D28, buf, dir, size, mod); break; case 55: VG_(transfer) (&arm->guest_D29, buf, dir, size, mod); break; case 56: VG_(transfer) (&arm->guest_D30, buf, dir, size, mod); break; case 57: VG_(transfer) (&arm->guest_D31, buf, dir, size, mod); break; case 58: VG_(transfer) (&arm->guest_FPSCR, buf, dir, size, mod); break; default: vg_assert(0); } }