//**************************************************************************** // //! Invokes the I2C driver APIs to read from the device. This assumes the //! device local address to read from is set using the I2CWrite API. //! //! \param ucDevAddr is the device I2C slave address //! \param ucBuffer is the pointer to the read data to be placed //! \param ulSize is the length of data to be read //! \param ucFlags Flag //! //! This function works in a polling mode, //! 1. Writes the device register address to be written to. //! 2. In a loop, reads all the bytes over I2C //! //! \return 0: Success, < 0: Failure. // //**************************************************************************** unsigned long I2CBufferRead(unsigned char ucDevAddr, unsigned char *ucBuffer, unsigned long ulSize,unsigned char ucFlags) { unsigned long ulNdx; // Set I2C codec slave address MAP_I2CMasterSlaveAddrSet(I2CA0_BASE,ucDevAddr, true); MAP_I2CMasterIntClearEx(I2CA0_BASE, I2C_INT_MASTER); if(ulSize == 1) { // Start single transfer. MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE); } else { // Start the transfer. MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START); // Wait for transfer completion. while((MAP_I2CMasterIntStatusEx(I2CA0_BASE, false) & I2C_INT_MASTER) == 0) { } // Read first byte from the controller. ucBuffer[0] = MAP_I2CMasterDataGet(I2CA0_BASE); for(ulNdx=1; ulNdx < ulSize-1; ulNdx++) { MT9D111Delay(10); MAP_I2CMasterIntClearEx(I2CA0_BASE, I2C_INT_MASTER); // continue the transfer. MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_CONT); // Wait for transfer completion. while((MAP_I2CMasterIntStatusEx(I2CA0_BASE, false) & I2C_INT_MASTER) == 0) { } // Read next byte from the controller. ucBuffer[ulNdx] = MAP_I2CMasterDataGet(I2CA0_BASE); } MAP_I2CMasterIntClearEx(I2CA0_BASE, I2C_INT_MASTER); MAP_I2CMasterControl(I2CA0_BASE,I2C_MASTER_CMD_BURST_RECEIVE_FINISH); } // Wait for transfer completion. while((MAP_I2CMasterIntStatusEx(I2CA0_BASE, false) & I2C_INT_MASTER) == 0) { } // Read the last byte from the controller. ucBuffer[ulSize-1] = MAP_I2CMasterDataGet(I2CA0_BASE); return 0; }
unsigned long I2CBufferWrite(unsigned char ucDevAddr, unsigned char *ucBuffer, unsigned long ulSize,unsigned char ucFlags) { unsigned long ulNdx; // Set I2C codec slave address MAP_I2CMasterSlaveAddrSet(I2CA0_BASE,ucDevAddr, false); // Write the first byte to the controller. MAP_I2CMasterDataPut(I2CA0_BASE,ucBuffer[0]); MAP_I2CMasterIntClearEx(I2CA0_BASE, I2C_INT_MASTER); if( ulSize == 1) { MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_SINGLE_SEND); } else { // Continue the transfer. MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_SEND_START); // Wait until the current byte has been transferred. while((MAP_I2CMasterIntStatusEx(I2CA0_BASE, false) & I2C_INT_MASTER) == 0) { } for(ulNdx=1; ulNdx < ulSize-1; ulNdx++) { // Write the next byte to the controller. MAP_I2CMasterDataPut(I2CA0_BASE,ucBuffer[ulNdx]); // Clear Master Interrupt MAP_I2CMasterIntClearEx(I2CA0_BASE, I2C_INT_MASTER); // Continue the transfer. MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT); // Wait until the current byte has been transferred. while((MAP_I2CMasterIntStatusEx(I2CA0_BASE, false) & I2C_INT_MASTER) == 0) { } } // Write the last byte to the controller. MAP_I2CMasterDataPut(I2CA0_BASE, ucBuffer[ulSize-1]); MAP_I2CMasterIntClearEx(I2CA0_BASE, I2C_INT_MASTER); // End the transfer. MAP_I2CMasterControl(I2CA0_BASE,I2C_MASTER_CMD_BURST_SEND_FINISH); } // Wait until the current byte has been transferred. while((MAP_I2CMasterIntStatusEx(I2CA0_BASE, false) & I2C_INT_MASTER) == 0) { } return 0; }
uint8_t TwoWire::I2CTransact(unsigned long ulCmd) { MAP_I2CMasterIntClearEx(I2C_BASE, MAP_I2CMasterIntStatusEx(I2C_BASE, false)); MAP_I2CMasterTimeoutSet(I2C_BASE, I2C_TIMEOUT_VAL); MAP_I2CMasterControl(I2C_BASE, ulCmd); while((MAP_I2CMasterIntStatusEx(I2C_BASE, false) & (I2C_INT_MASTER | I2C_MRIS_CLKTOUT)) == 0) { if(!MAP_I2CMasterBusy(I2C_BASE)) return -1; } /* Check for any errors in transfer */ if(MAP_I2CMasterErr(I2C_BASE) != I2C_MASTER_ERR_NONE) { switch(ulCmd) { case I2C_MASTER_CMD_BURST_SEND_START: case I2C_MASTER_CMD_BURST_SEND_CONT: case I2C_MASTER_CMD_BURST_SEND_STOP: MAP_I2CMasterControl(I2C_BASE, I2C_MASTER_CMD_BURST_SEND_ERROR_STOP); break; case I2C_MASTER_CMD_BURST_RECEIVE_START: case I2C_MASTER_CMD_BURST_RECEIVE_CONT: case I2C_MASTER_CMD_BURST_RECEIVE_FINISH: MAP_I2CMasterControl(I2C_BASE, I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP); break; default: break; } return 0; } return -1; }