/* GPIO based wakeup from S3(LPDS) */
static i32 check_n_setup_S3_wakeup_from_gpio()
{
i32 retval, indx;
u8 gpio_num[MAX_GPIO_WAKESOURCE];
u8 int_type[MAX_GPIO_WAKESOURCE];
/* Check for any special purpose GPIO usage */
retval = cc_gpio_get_spl_purpose(&gpio_num[0],
&int_type[0],
MAX_GPIO_WAKESOURCE);
if(retval > 0) {
for(indx = 0; indx < sizeof(gpio_wake_src); indx++) {
if(gpio_wake_src[indx] == gpio_num[0]) {
/* Setup the GPIO to be the wake source */
MAP_PRCMLPDSWakeUpGPIOSelect(
indx, gpio_lpds_inttype[int_type[0]]);
MAP_PRCMLPDSWakeupSourceEnable(PRCM_LPDS_GPIO);
/* Save the GPIO number wake from LPDS */
cc_pm_ctrl.spl_gpio_wakefrom_lpds = gpio_num[0];
break;
}
}
} else {
return -1;
}
return 0;
}
STATIC void pin_irq_enable (mp_obj_t self_in) {
const pin_obj_t *self = self_in;
uint hib_pin, idx;
pin_get_hibernate_pin_and_idx (self, &hib_pin, &idx);
if (idx < PYBPIN_NUM_WAKE_PINS) {
if (pybpin_wake_pin[idx].lpds != PYBPIN_WAKES_NOT) {
// enable GPIO as a wake source during LPDS
MAP_PRCMLPDSWakeUpGPIOSelect(idx, pybpin_wake_pin[idx].lpds);
MAP_PRCMLPDSWakeupSourceEnable(PRCM_LPDS_GPIO);
}
if (pybpin_wake_pin[idx].hib != PYBPIN_WAKES_NOT) {
// enable GPIO as a wake source during hibernate
MAP_PRCMHibernateWakeUpGPIOSelect(hib_pin, pybpin_wake_pin[idx].hib);
MAP_PRCMHibernateWakeupSourceEnable(hib_pin);
}
else {
MAP_PRCMHibernateWakeupSourceDisable(hib_pin);
}
}
// if idx is invalid, the pin supports active interrupts for sure
if (idx >= PYBPIN_NUM_WAKE_PINS || pybpin_wake_pin[idx].active) {
MAP_GPIOIntClear(self->port, self->bit);
MAP_GPIOIntEnable(self->port, self->bit);
}
// in case it was enabled before
else if (idx < PYBPIN_NUM_WAKE_PINS && !pybpin_wake_pin[idx].active) {
MAP_GPIOIntDisable(self->port, self->bit);
}
}
//****************************************************************************
//
//! \brief Setting various wake sources for the device
//!
//! \param target is the lowest power mode that the deveice will exercise
//!
//! \return 0 if success, -1 in case of error
//
//****************************************************************************
int set_wkup_srcs(enum soc_pm target)
{
int iRetVal = -1;
switch(target) {
case e_pm_S0:
case e_pm_S1:
case e_pm_S2:
/* These handle the cases of run, sleep, deepsleep.
Wake source is configured outside this scope in
individual peripherals */
break;
case e_pm_S3:
if(lpds_wk_info.wk_type & WK_RTC)
{
/* Setup the LPDS wake time */
MAP_PRCMLPDSIntervalSet(lpds_wk_info.timer_interval * 32768);
/* Enable the wake source to be timer */
MAP_PRCMLPDSWakeupSourceEnable(PRCM_LPDS_TIMER);
iRetVal = 0;
}
if(lpds_wk_info.wk_type & WK_GPIO)
{
MAP_PRCMLPDSWakeUpGPIOSelect(lpds_wk_info.wk_gpio_pin,lpds_wk_info.trigger_type);
MAP_PRCMLPDSWakeupSourceEnable(PRCM_LPDS_GPIO);
iRetVal = 0;
}
if(lpds_wk_info.wk_type & WK_HOST_IRQ)
{
/* Set LPDS Wakeup source as NWP request */
MAP_PRCMLPDSWakeupSourceEnable(PRCM_LPDS_HOST_IRQ);
iRetVal = 0;
}
if(lpds_wk_info.is_periodic == false)
{
lpds_wk_info.wk_type &= (~WK_RTC);
}
break;
case e_pm_S4:
if(hib_wk_info.wk_type & WK_RTC)
{
/* Setup the LPDS wake time */
MAP_PRCMHibernateIntervalSet(hib_wk_info.timer_interval * 32768);
/* Enable the wake source to be timer */
MAP_PRCMHibernateWakeupSourceEnable(PRCM_HIB_SLOW_CLK_CTR);
iRetVal = 0;
}
if(hib_wk_info.wk_type & WK_GPIO)
{
MAP_PRCMHibernateWakeUpGPIOSelect(hib_wk_info.wk_gpio_pin,hib_wk_info.trigger_type);
MAP_PRCMHibernateWakeupSourceEnable(hib_wk_info.wk_gpio_pin);
iRetVal = 0;
}
break;
default:
return -1;
}
return iRetVal;
}
