/// \method deinit()
/// Turn off the UART bus.
STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) {
pyb_uart_obj_t *self = self_in;
uint uartPerh;
switch (self->uart_id) {
case PYB_UART_0:
uartPerh = PRCM_UARTA0;
break;
case PYB_UART_1:
uartPerh = PRCM_UARTA1;
break;
default:
return mp_const_none;
}
self->enabled = false;
MAP_UARTIntDisable(self->reg, UART_INT_RX | UART_INT_RT);
MAP_UARTIntClear(self->reg, UART_INT_RX | UART_INT_RT);
MAP_UARTIntUnregister(self->reg);
MAP_UARTDisable(self->reg);
MAP_PRCMPeripheralClkDisable(uartPerh, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
return mp_const_none;
}
void HardwareSerial::setModule(unsigned long module)
{
MAP_UARTIntDisable(UART_BASE, UART_INT_RT | UART_INT_TX);
MAP_UARTIntUnregister(UART_BASE);
uartModule = module;
begin(baudRate);
}
void HardwareSerial::end()
{
unsigned long ulInt = MAP_IntMasterDisable();
flushAll();
/* If interrupts were enabled when we turned them off,
* turn them back on again. */
if(!ulInt) {
MAP_IntMasterEnable();
}
MAP_UARTIntDisable(UART_BASE, UART_INT_RT | UART_INT_TX);
MAP_UARTIntUnregister(UART_BASE);
}
//*****************************************************************************
//!
//! The interrupt handler for UART0. This interrupt will occur when a DMA
//! transfer is complete using the UART0 uDMA channel.This interrupt handler will
//! switch between receive ping-pong buffers A and B. It will also restart a TX
//! uDMA transfer if the prior transfer is complete. This will keep the UART
//! running continuously (looping TX data back to RX).
//!
//! \param None
//!
//! \return None
//*****************************************************************************
void
UART0IntHandler(void)
{
unsigned long ulStatus;
unsigned long ulMode;
//
// Read the interrupt status of the UART.
//
ulStatus = MAP_UARTIntStatus(UARTA0_BASE, 1);
//
// Clear any pending status, even though there should be none since no UART
// interrupts were enabled.
//
MAP_UARTIntClear(UARTA0_BASE, ulStatus);
if(uiCount<6)
{
//
// Check the DMA control table to see if the ping-pong "A" transfer is
// complete. The "A" transfer uses receive buffer "A", and the primary
// control structure.
//
ulMode = MAP_uDMAChannelModeGet(UDMA_CH8_UARTA0_RX | UDMA_PRI_SELECT);
//
// If the primary control structure indicates stop, that means the "A"
// receive buffer is done. The uDMA controller should still be receiving
// data into the "B" buffer.
//
if(ulMode == UDMA_MODE_STOP)
{
//
// Increment a counter to indicate data was received into buffer A.
//
g_ulRxBufACount++;
//
// Set up the next transfer for the "A" buffer, using the primary
// control structure. When the ongoing receive into the "B" buffer is
// done, the uDMA controller will switch back to this one.
//
UDMASetupTransfer(UDMA_CH8_UARTA0_RX | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG,
sizeof(g_ucRxBufA),UDMA_SIZE_8, UDMA_ARB_4,
(void *)(UARTA0_BASE + UART_O_DR), UDMA_SRC_INC_NONE,
g_ucRxBufA, UDMA_DST_INC_8);
}
//
// Check the DMA control table to see if the ping-pong "B" transfer is
// complete. The "B" transfer uses receive buffer "B", and the alternate
// control structure.
//
ulMode = MAP_uDMAChannelModeGet(UDMA_CH8_UARTA0_RX | UDMA_ALT_SELECT);
//
// If the alternate control structure indicates stop, that means the "B"
// receive buffer is done. The uDMA controller should still be receiving
// data into the "A" buffer.
//
if(ulMode == UDMA_MODE_STOP)
{
//
// Increment a counter to indicate data was received into buffer A.
//
g_ulRxBufBCount++;
//
// Set up the next transfer for the "B" buffer, using the alternate
// control structure. When the ongoing receive into the "A" buffer is
// done, the uDMA controller will switch back to this one.
//
UDMASetupTransfer(UDMA_CH8_UARTA0_RX | UDMA_ALT_SELECT,
UDMA_MODE_PINGPONG, sizeof(g_ucRxBufB),UDMA_SIZE_8,
UDMA_ARB_4,(void *)(UARTA0_BASE + UART_O_DR),
UDMA_SRC_INC_NONE, g_ucRxBufB, UDMA_DST_INC_8);
}
//
// If the UART0 DMA TX channel is disabled, that means the TX DMA transfer
// is done.
//
if(!MAP_uDMAChannelIsEnabled(UDMA_CH9_UARTA0_TX))
{
g_ulTxCount++;
//
// Start another DMA transfer to UART0 TX.
//
UDMASetupTransfer(UDMA_CH9_UARTA0_TX| UDMA_PRI_SELECT, UDMA_MODE_BASIC,
sizeof(g_ucTxBuf),UDMA_SIZE_8, UDMA_ARB_4,g_ucTxBuf, UDMA_SRC_INC_8,
(void *)(UARTA0_BASE + UART_O_DR), UDMA_DST_INC_NONE);
//
// The uDMA TX channel must be re-enabled.
//
MAP_uDMAChannelEnable(UDMA_CH9_UARTA0_TX);
}
}
else
{
UARTDone=1;
MAP_UARTIntUnregister(UARTA0_BASE);
}
}
