void gpio_init(void) { /* * Set Port UA to initialize URXD0/UTXD0 */ MCF_GPIO_PUAPAR = 0 | MCF_GPIO_PUAPAR_URXD0_URXD0 | MCF_GPIO_PUAPAR_UTXD0_UTXD0; MCF_GPIO_PUBPAR = 0 | MCF_GPIO_PUBPAR_URXD1_URXD1 | MCF_GPIO_PUBPAR_UTXD1_UTXD1; MCF_GPIO_PUCPAR = 0 | MCF_GPIO_PUCPAR_URXD2_URXD2 | MCF_GPIO_PUCPAR_UTXD2_UTXD2; /* * Initialize PLDPAR to enable Ethernet Leds */ MCF_GPIO_PLDPAR = (0 | MCF_GPIO_PLDPAR_ACTLED_ACTLED | MCF_GPIO_PLDPAR_LINKLED_LINKLED | MCF_GPIO_PLDPAR_SPDLED_SPDLED | MCF_GPIO_PLDPAR_DUPLED_DUPLED | MCF_GPIO_PLDPAR_COLLED_COLLED | MCF_GPIO_PLDPAR_RXLED_RXLED | MCF_GPIO_PLDPAR_TXLED_TXLED); #if 0 /* Implemented in the Ethernet driver.*/ { uint32 myctr; //generic counter variable // set phy address to zero MCF_EPHY_EPHYCTL1 = MCF_EPHY_EPHYCTL1_PHYADD(FEC_PHY0); //Enable EPHY module with PHY clocks disabled //Do not turn on PHY clocks until both FEC and EPHY are completely setup (see Below) MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0_DIS100 | MCF_EPHY_EPHYCTL0_DIS10); //Enable auto_neg at start-up MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0 & (MCF_EPHY_EPHYCTL0_ANDIS)); //Enable EPHY module MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0_EPHYEN | MCF_EPHY_EPHYCTL0); //Let PHY PLLs be determined by PHY MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0 & ~(MCF_EPHY_EPHYCTL0_DIS100 | MCF_EPHY_EPHYCTL0_DIS10)); //DELAY, Delay start-up for (myctr=200000; myctr >0; myctr--) { } } #endif }
static void gpio_init(void) { uint32 myctr; //generic counter variable /* * Initialize PLDPAR to enable Ethernet Leds */ MCF_GPIO_PLDPAR = (0 | MCF_GPIO_PLDPAR_ACTLED_ACTLED | MCF_GPIO_PLDPAR_LINKLED_LINKLED | MCF_GPIO_PLDPAR_SPDLED_SPDLED | MCF_GPIO_PLDPAR_DUPLED_DUPLED | MCF_GPIO_PLDPAR_COLLED_COLLED | MCF_GPIO_PLDPAR_RXLED_RXLED | MCF_GPIO_PLDPAR_TXLED_TXLED); // set phy address to zero MCF_EPHY_EPHYCTL1 = MCF_EPHY_EPHYCTL1_PHYADD(FEC_PHY0); //Enable EPHY module with PHY clocks disabled //Do not turn on PHY clocks until both FEC and EPHY are completely setup (see Below) MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0_DIS100 | MCF_EPHY_EPHYCTL0_DIS10); //Enable auto_neg at start-up MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0 & (MCF_EPHY_EPHYCTL0_ANDIS)); //Enable EPHY module MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0_EPHYEN | MCF_EPHY_EPHYCTL0); //Let PHY PLLs be determined by PHY MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0 & ~(MCF_EPHY_EPHYCTL0_DIS100 | MCF_EPHY_EPHYCTL0_DIS10)); //DELAY, Delay start-up for (myctr=200000; myctr >0; myctr--) { } }