コード例 #1
0
ファイル: yam.c プロジェクト: 383530895/linux
static enum uart yam_check_uart(unsigned int iobase)
{
	unsigned char b1, b2, b3;
	enum uart u;
	enum uart uart_tab[] =
	{c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A};

	b1 = inb(MCR(iobase));
	outb(b1 | 0x10, MCR(iobase));	/* loopback mode */
	b2 = inb(MSR(iobase));
	outb(0x1a, MCR(iobase));
	b3 = inb(MSR(iobase)) & 0xf0;
	outb(b1, MCR(iobase));		/* restore old values */
	outb(b2, MSR(iobase));
	if (b3 != 0x90)
		return c_uart_unknown;
	inb(RBR(iobase));
	inb(RBR(iobase));
	outb(0x01, FCR(iobase));	/* enable FIFOs */
	u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
	if (u == c_uart_16450) {
		outb(0x5a, SCR(iobase));
		b1 = inb(SCR(iobase));
		outb(0xa5, SCR(iobase));
		b2 = inb(SCR(iobase));
		if ((b1 != 0x5a) || (b2 != 0xa5))
			u = c_uart_8250;
	}
	return u;
}
コード例 #2
0
ファイル: yam.c プロジェクト: 383530895/linux
static int fpga_download(int iobase, int bitrate)
{
	int i, rc;
	unsigned char *pbits;

	pbits = get_mcs(bitrate);
	if (pbits == NULL)
		return -1;

	fpga_reset(iobase);
	for (i = 0; i < YAM_FPGA_SIZE; i++) {
		if (fpga_write(iobase, pbits[i])) {
			printk(KERN_ERR "yam: error in write cycle\n");
			return -1;			/* write... */
		}
	}

	fpga_write(iobase, 0xFF);
	rc = inb(MSR(iobase));		/* check DONE signal */

	/* Needed for some hardwares */
	delay(50);

	return (rc & MSR_DSR) ? 0 : -1;
}
コード例 #3
0
ファイル: baycom_ser_hdx.c プロジェクト: ena30/snake-os
static inline void ser12_rx(struct net_device *dev, struct baycom_state *bc)
{
	unsigned char cur_s;
	/*
	 * do demodulator
	 */
	cur_s = inb(MSR(dev->base_addr)) & 0x10;	/* the CTS line */
	hdlcdrv_channelbit(&bc->hdrv, cur_s);
	bc->modem.ser12.dcd_shreg = (bc->modem.ser12.dcd_shreg << 1) |
		(cur_s != bc->modem.ser12.last_sample);
	bc->modem.ser12.last_sample = cur_s;
	if(bc->modem.ser12.dcd_shreg & 1) {
		if (!bc->opt_dcd) {
			unsigned int dcdspos, dcdsneg;

			dcdspos = dcdsneg = 0;
			dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
			if (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
				dcdspos += 2;
			dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
			dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
			dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);

			bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
		} else
コード例 #4
0
ファイル: pxclock.c プロジェクト: BillTheBest/WinNT4
/*++
Routine Description:

    Clock interrupt handler for processor 0.

Arguments:

    Interrupt

    ServiceContext

    TrapFrame

Return Value:

    TRUE

--*/
BOOLEAN
HalpHandleDecrementerInterrupt(
    IN PKINTERRUPT Interrupt,
    IN PVOID ServiceContext,
    IN PVOID TrapFrame
    )
{
	KIRQL OldIrql;
    static int recurse = FALSE;
	ULONG CpuId;
	
	HASSERT(!MSR(EE));

	CpuId = GetCpuId();

	//
	// Raise irql via updating the PCR
	//
	OldIrql = PCR->CurrentIrql;
	PCR->CurrentIrql = CLOCK2_LEVEL;
	RInterruptMask(CpuId) = (Irql2Mask[CLOCK2_LEVEL] & registeredInts[CpuId]);
	WaitForRInterruptMask(CpuId);
	
	//
	// Reset DECREMENTER, accounting for interrupt latency.
	//
	HalpUpdateDecrementer(HalpClockCount);
	
	//
	// Call the kernel to update system time
	//
	KeUpdateSystemTime(TrapFrame,HalpCurrentTimeIncrement);
	HalpCurrentTimeIncrement = HalpNewTimeIncrement;
	
    if (!recurse) {
        //
        // In some circumstances the KdPollBreakIn can
        // take longer than a decrementer interrupt
        // to complete.  This is do to a conflict
        // between DMA and PIO.  For now, just avoid
        // recursing into the debugger check.
        //
        recurse = TRUE;
        if (KdDebuggerEnabled && KdPollBreakIn()) {
            HalpEnableInterrupts();
            DbgBreakPointWithStatus(DBG_STATUS_CONTROL_C);
            HalpDisableInterrupts();
        }
        recurse = FALSE;
    }

	//
	// Lower Irql to original value and enable interrupts
	//
	PCR->CurrentIrql = OldIrql;
	RInterruptMask(CpuId) = (Irql2Mask[OldIrql] & registeredInts[CpuId]);
	WaitForRInterruptMask(CpuId);
	return (TRUE);
}
コード例 #5
0
ファイル: yam.c プロジェクト: 383530895/linux
static irqreturn_t yam_interrupt(int irq, void *dev_id)
{
	struct net_device *dev;
	struct yam_port *yp;
	unsigned char iir;
	int counter = 100;
	int i;
	int handled = 0;

	for (i = 0; i < NR_PORTS; i++) {
		dev = yam_devs[i];
		yp = netdev_priv(dev);

		if (!netif_running(dev))
			continue;

		while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) {
			unsigned char msr = inb(MSR(dev->base_addr));
			unsigned char lsr = inb(LSR(dev->base_addr));
			unsigned char rxb;

			handled = 1;

			if (lsr & LSR_OE)
				++dev->stats.rx_fifo_errors;

			yp->dcd = (msr & RX_DCD) ? 1 : 0;

			if (--counter <= 0) {
				printk(KERN_ERR "%s: too many irq iir=%d\n",
						dev->name, iir);
				goto out;
			}
			if (msr & TX_RDY) {
				++yp->nb_mdint;
				yam_tx_byte(dev, yp);
			}
			if (lsr & LSR_RXC) {
				++yp->nb_rxint;
				rxb = inb(RBR(dev->base_addr));
				if (msr & RX_FLAG)
					yam_rx_flag(dev, yp);
				else
					yam_rx_byte(dev, yp, rxb);
			}
		}
	}
out:
	return IRQ_RETVAL(handled);
}
コード例 #6
0
ファイル: idle.c プロジェクト: mewbak/seL4
/** DONT_TRANSLATE */
void NORETURN NO_INLINE VISIBLE halt(void)
{
    /* halt is actually, idle thread without the interrupts */
    MSR("daif", (DAIF_DEBUG | DAIF_SERROR | DAIF_IRQ | DAIF_FIRQ));

#ifdef CONFIG_PRINTING
    printf("halting...");
#ifdef CONFIG_DEBUG_BUILD
    debug_printKernelEntryReason();
#endif
#endif
    idle_thread();
    UNREACHABLE();
}
コード例 #7
0
ファイル: pxclock.c プロジェクト: BillTheBest/WinNT4
/*++

Routine Description:

    Clock interrupt handler for processors other than 0.

Arguments:

    Interrupt

    ServiceContext

    TrapFrame

Return Value:

    TRUE

--*/
BOOLEAN
HalpHandleDecrementerInterrupt1(
    IN PKINTERRUPT Interrupt,
    IN PVOID ServiceContext,
    IN PVOID TrapFrame
    )
{
	KIRQL OldIrql;
	ULONG CpuId;
	
	HASSERT(!MSR(EE));

	CpuId = GetCpuId();
	
	//
	// Raise irql via updating the PCR
	//
	OldIrql = PCR->CurrentIrql;
	PCR->CurrentIrql = CLOCK2_LEVEL;
	RInterruptMask(CpuId) = (Irql2Mask[CLOCK2_LEVEL] & registeredInts[CpuId]);
	WaitForRInterruptMask(CpuId);
	
	//
	// Reset DECREMENTER (no account for latency)
	//
	HalpUpdateDecrementer(HalpFullTickClockCount);
	
	//
	// Call the kernel to update run time for this thread and process.
	//
	KeUpdateRunTime(TrapFrame);

	HDBG(DBG_PROC1DBG,
		{
			//
			// Check for the debugger BreakIn only every minute or so.
			// (decrementer is interms of ms so we multiple by 10,000
			// on the order of a minute).
			//
			static Count = 0;
			if (++Count > 10000) {
				Count = 0;
				if (KdDebuggerEnabled && KdPollBreakIn()) {
					HalpEnableInterrupts();
					DbgBreakPointWithStatus(DBG_STATUS_CONTROL_C);
					HalpDisableInterrupts();
				}
			}
		}
	);
コード例 #8
0
ファイル: yam.c プロジェクト: 383530895/linux
static void fpga_reset(int iobase)
{
	outb(0, IER(iobase));
	outb(LCR_DLAB | LCR_BIT5, LCR(iobase));
	outb(1, DLL(iobase));
	outb(0, DLM(iobase));

	outb(LCR_BIT5, LCR(iobase));
	inb(LSR(iobase));
	inb(MSR(iobase));
	/* turn off FPGA supply voltage */
	outb(MCR_OUT1 | MCR_OUT2, MCR(iobase));
	delay(100);
	/* turn on FPGA supply voltage again */
	outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase));
	delay(100);
}
コード例 #9
0
ファイル: yam.c プロジェクト: 383530895/linux
static void yam_set_uart(struct net_device *dev)
{
	struct yam_port *yp = netdev_priv(dev);
	int divisor = 115200 / yp->baudrate;

	outb(0, IER(dev->base_addr));
	outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr));
	outb(divisor, DLL(dev->base_addr));
	outb(0, DLM(dev->base_addr));
	outb(LCR_BIT8, LCR(dev->base_addr));
	outb(PTT_OFF, MCR(dev->base_addr));
	outb(0x00, FCR(dev->base_addr));

	/* Flush pending irq */

	inb(RBR(dev->base_addr));
	inb(MSR(dev->base_addr));

	/* Enable rx irq */

	outb(ENABLE_RTXINT, IER(dev->base_addr));
}
コード例 #10
0
ファイル: pwr_rapldev.c プロジェクト: bfeng/pwrapi-ref
plugin_devops_t *pwr_rapldev_init( const char *initstr )
{
    char file[80] = "";
    int core = 0;
    long long msr;
    plugin_devops_t *dev = malloc( sizeof(plugin_devops_t) );
    *dev = devops;

    dev->private_data = malloc( sizeof(pwr_rapldev_t) );
    bzero( dev->private_data, sizeof(pwr_rapldev_t) );

    DBGP( "Info: PWR RAPL device open\n" );

    if( rapldev_parse_init( initstr, &core ) < 0 ) {
        fprintf( stderr, "Error: PWR RAPL device initialization string %s invalid\n", initstr );
        return 0x0;
    }

    if( rapldev_identify( &(PWR_RAPLDEV(dev->private_data)->cpu_model) ) < 0 ) {
        fprintf( stderr, "Error: PWR RAPL device model identification failed\n" );
        return 0x0;
    }

    sprintf( file, "/dev/cpu/%d/msr", core );
    if( (PWR_RAPLDEV(dev->private_data)->fd=open( file, O_RDONLY )) < 0 ) {
        fprintf( stderr, "Error: PWR RAPL device open failed\n" );
        return 0x0;
    }

    if( rapldev_read( PWR_RAPLDEV(dev->private_data)->fd, MSR_RAPL_POWER_UNIT, &msr ) < 0 ) {
        fprintf( stderr, "Error: PWR RAPL device read failed\n" );
        return 0x0;
    }
    PWR_RAPLDEV(dev->private_data)->units.power =
        pow( 0.5, (double)(MSR(msr, POWER_UNITS_SHIFT, POWER_UNITS_MASK)) );
    PWR_RAPLDEV(dev->private_data)->units.energy =
        pow( 0.5, (double)(MSR(msr, ENERGY_UNITS_SHIFT, ENERGY_UNITS_MASK)) );
    PWR_RAPLDEV(dev->private_data)->units.time =
        pow( 0.5, (double)(MSR(msr, TIME_UNITS_SHIFT, TIME_UNITS_MASK)) );

    DBGP( "Info: units.power    - %g\n", PWR_RAPLDEV(dev->private_data)->units.power );
    DBGP( "Info: units.energy   - %g\n", PWR_RAPLDEV(dev->private_data)->units.energy );
    DBGP( "Info: units.time     - %g\n", PWR_RAPLDEV(dev->private_data)->units.time );

    if( rapldev_read( PWR_RAPLDEV(dev->private_data)->fd, MSR_POWER_INFO, &msr ) < 0 ) {
        fprintf( stderr, "Error: PWR RAPL device read failed\n" );
        return 0x0;
    }
    PWR_RAPLDEV(dev->private_data)->power.thermal =
        PWR_RAPLDEV(dev->private_data)->units.power * (double)(MSR(msr, THERMAL_POWER_SHIFT, THERMAL_POWER_MASK));
    PWR_RAPLDEV(dev->private_data)->power.minimum =
        PWR_RAPLDEV(dev->private_data)->units.power * (double)(MSR(msr, MINIMUM_POWER_SHIFT, MINIMUM_POWER_MASK));
    PWR_RAPLDEV(dev->private_data)->power.maximum =
        PWR_RAPLDEV(dev->private_data)->units.power * (double)(MSR(msr, MAXIMUM_POWER_SHIFT, MAXIMUM_POWER_MASK));
    PWR_RAPLDEV(dev->private_data)->power.window =
        PWR_RAPLDEV(dev->private_data)->units.time * (double)(MSR(msr, WINDOW_POWER_SHIFT, WINDOW_POWER_MASK));

    DBGP( "Info: power.thermal  - %g\n", PWR_RAPLDEV(dev->private_data)->power.thermal );
    DBGP( "Info: power.minimum  - %g\n", PWR_RAPLDEV(dev->private_data)->power.minimum );
    DBGP( "Info: power.maximum  - %g\n", PWR_RAPLDEV(dev->private_data)->power.maximum );
    DBGP( "Info: power.window   - %g\n", PWR_RAPLDEV(dev->private_data)->power.window );

    if( rapldev_read( PWR_RAPLDEV(dev->private_data)->fd, MSR_POWER_LIMIT, &msr ) < 0 ) {
        fprintf( stderr, "Error: PWR RAPL device read failed\n" );
        return 0x0;
    }
    PWR_RAPLDEV(dev->private_data)->limit.power1 =
        PWR_RAPLDEV(dev->private_data)->units.power * (double)(MSR(msr, POWER1_LIMIT_SHIFT, POWER1_LIMIT_MASK));
    PWR_RAPLDEV(dev->private_data)->limit.window1 =
        PWR_RAPLDEV(dev->private_data)->units.time * (double)(MSR(msr, WINDOW1_LIMIT_SHIFT, WINDOW1_LIMIT_MASK));
    PWR_RAPLDEV(dev->private_data)->limit.enabled1 =
        (unsigned short)(MSR_BIT(msr, ENABLED1_LIMIT_BIT));
    PWR_RAPLDEV(dev->private_data)->limit.clamped1 =
        (unsigned short)(MSR_BIT(msr, CLAMPED1_LIMIT_BIT));
    PWR_RAPLDEV(dev->private_data)->limit.power2 =
        PWR_RAPLDEV(dev->private_data)->units.power * (double)(MSR(msr, POWER2_LIMIT_SHIFT, POWER2_LIMIT_MASK));
    PWR_RAPLDEV(dev->private_data)->limit.window2 =
        PWR_RAPLDEV(dev->private_data)->units.time * (double)(MSR(msr, WINDOW2_LIMIT_SHIFT, WINDOW2_LIMIT_MASK));
    PWR_RAPLDEV(dev->private_data)->limit.enabled2 =
        (unsigned short)(MSR_BIT(msr, ENABLED2_LIMIT_BIT));
    PWR_RAPLDEV(dev->private_data)->limit.clamped2 =
        (unsigned short)(MSR_BIT(msr, CLAMPED2_LIMIT_BIT));

    DBGP( "Info: limit.power1   - %g\n", PWR_RAPLDEV(dev->private_data)->limit.power1 );
    DBGP( "Info: limit.window1  - %g\n", PWR_RAPLDEV(dev->private_data)->limit.window1 );
    DBGP( "Info: limit.enabled1 - %u\n", PWR_RAPLDEV(dev->private_data)->limit.enabled1 );
    DBGP( "Info: limit.clamped1 - %u\n", PWR_RAPLDEV(dev->private_data)->limit.clamped1 );
    DBGP( "Info: limit.power2   - %g\n", PWR_RAPLDEV(dev->private_data)->limit.power1 );
    DBGP( "Info: limit.window2  - %g\n", PWR_RAPLDEV(dev->private_data)->limit.window1 );
    DBGP( "Info: limit.enabled2 - %u\n", PWR_RAPLDEV(dev->private_data)->limit.enabled2 );
    DBGP( "Info: limit.clamped2 - %u\n", PWR_RAPLDEV(dev->private_data)->limit.clamped2 );

    return dev;
}
コード例 #11
0
ファイル: pwr_rapldev.c プロジェクト: bfeng/pwrapi-ref
static int rapldev_gather( int fd, int cpu_model, layer_t layer, units_t units,
        double *energy, double *time, int *policy )
{
    long long msr;

    if( layer == INTEL_LAYER_PKG ) {
        if( rapldev_read( fd, MSR_ENERGY_STATUS, &msr ) < 0 ) {
            fprintf( stderr, "Error: PWR RAPL device read failed\n" );
            return -1;
        }
        *energy = (double)msr * units.energy;

        if( cpu_model == CPU_MODEL_SANDY_EP ||
                cpu_model == CPU_MODEL_IVY_EP ) {
            if( rapldev_read( fd, MSR_PERF_STATUS, &msr ) < 0 ) {
                fprintf( stderr, "Error: PWR RAPL device read failed\n" );
                return -1;
            }
            *time = (double)msr * units.time;
        }
    }
    else if( layer == INTEL_LAYER_PP0 ) {
        if( rapldev_read( fd, MSR_PP0_ENERGY_STATUS, &msr ) < 0 ) {
            fprintf( stderr, "Error: PWR RAPL device read failed\n" );
            return -1;
        }
        *energy = (double)msr * units.energy;

        if( rapldev_read( fd, MSR_PP0_POLICY_STATUS, &msr ) < 0 ) {
            fprintf( stderr, "Error: PWR RAPL device read failed\n" );
            return -1;
        }
        *policy = (int)(MSR(msr, PP0_POLICY_SHIFT, PP0_POLICY_MASK));

        if( cpu_model == CPU_MODEL_SANDY_EP ||
                cpu_model == CPU_MODEL_IVY_EP ) {
            if( rapldev_read( fd, MSR_PP0_PERF_STATUS, &msr ) < 0 ) {
                fprintf( stderr, "Error: PWR RAPL device read failed\n" );
                return -1;
            }
            *time = (double)msr * units.time;
        }
    }
    else if( layer == INTEL_LAYER_PP1 ) {
        if( cpu_model == CPU_MODEL_SANDY  ||
                cpu_model == CPU_MODEL_IVY    ||
                cpu_model == CPU_MODEL_HASWELL ) {
            if( rapldev_read( fd, MSR_PP1_ENERGY_STATUS, &msr ) < 0 ) {
                fprintf( stderr, "Error: PWR RAPL device read failed\n" );
                return -1;
            }
            *energy = (double)msr * units.energy;

            if( rapldev_read( fd, MSR_PP1_POLICY_STATUS, &msr ) < 0 ) {
                fprintf( stderr, "Error: PWR RAPL device read failed\n" );
                return -1;
            }
            *policy = (int)(MSR(msr, PP1_POLICY_SHIFT, PP1_POLICY_MASK));
        }
        else {
            if( rapldev_read( fd, MSR_DRAM_ENERGY_STATUS, &msr ) < 0 ) {
                fprintf( stderr, "Error: PWR RAPL device read failed\n" );
                return -1;
            }
            *energy = (double)msr * units.energy;
        }
    }

    return 0;
}