static unsigned ni_m_series_source_select_bits(lsampl_t clock_source) { unsigned ni_m_series_clock; unsigned i; const unsigned clock_select_bits = clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK; switch (clock_select_bits) { case NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS: ni_m_series_clock = NI_M_Series_Timebase_1_Clock; break; case NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS: ni_m_series_clock = NI_M_Series_Timebase_2_Clock; break; case NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS: ni_m_series_clock = NI_M_Series_Timebase_3_Clock; break; case NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS: ni_m_series_clock = NI_M_Series_Logic_Low_Clock; break; case NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS: ni_m_series_clock = NI_M_Series_Next_Gate_Clock; break; case NI_GPCT_NEXT_TC_CLOCK_SRC_BITS: ni_m_series_clock = NI_M_Series_Next_TC_Clock; break; case NI_GPCT_PXI10_CLOCK_SRC_BITS: ni_m_series_clock = NI_M_Series_PXI10_Clock; break; case NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS: ni_m_series_clock = NI_M_Series_PXI_Star_Trigger_Clock; break; case NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS: ni_m_series_clock = NI_M_Series_Analog_Trigger_Out_Clock; break; default: for (i = 0; i <= ni_m_series_max_rtsi_channel; ++i) { if (clock_select_bits == NI_GPCT_RTSI_CLOCK_SRC_BITS(i)) { ni_m_series_clock = NI_M_Series_RTSI_Clock(i); break; } } if (i <= ni_m_series_max_rtsi_channel) break; for (i = 0; i <= ni_m_series_max_pfi_channel; ++i) { if (clock_select_bits == NI_GPCT_PFI_CLOCK_SRC_BITS(i)) { ni_m_series_clock = NI_M_Series_PFI_Clock(i); break; } } if (i <= ni_m_series_max_pfi_channel) break; rt_printk("invalid clock source 0x%lx\n", (unsigned long)clock_source); BUG(); ni_m_series_clock = 0; break; } return Gi_Source_Select_Bits(ni_m_series_clock); };
static unsigned ni_660x_clock_src_select(const struct ni_gpct *counter) { unsigned clock_source = 0; unsigned i; const unsigned input_select = (ni_tio_get_soft_copy(counter, NITIO_Gi_Input_Select_Reg (counter->counter_index)) & Gi_Source_Select_Mask) >> Gi_Source_Select_Shift; switch (input_select) { case NI_660x_Timebase_1_Clock: clock_source = NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS; break; case NI_660x_Timebase_2_Clock: clock_source = NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS; break; case NI_660x_Timebase_3_Clock: clock_source = NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS; break; case NI_660x_Logic_Low_Clock: clock_source = NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS; break; case NI_660x_Source_Pin_i_Clock: clock_source = NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS; break; case NI_660x_Next_Gate_Clock: clock_source = NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS; break; case NI_660x_Next_TC_Clock: clock_source = NI_GPCT_NEXT_TC_CLOCK_SRC_BITS; break; default: for (i = 0; i <= ni_660x_max_rtsi_channel; ++i) { if (input_select == NI_660x_RTSI_Clock(i)) { clock_source = NI_GPCT_RTSI_CLOCK_SRC_BITS(i); break; } } if (i <= ni_660x_max_rtsi_channel) break; for (i = 0; i <= ni_660x_max_source_pin; ++i) { if (input_select == NI_660x_Source_Pin_Clock(i)) { clock_source = NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(i); break; } } if (i <= ni_660x_max_source_pin) break; BUG(); break; } clock_source |= ni_tio_clock_src_modifiers(counter); return clock_source; }
static unsigned ni_660x_source_select_bits(lsampl_t clock_source) { unsigned ni_660x_clock; unsigned i; const unsigned clock_select_bits = clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK; switch (clock_select_bits) { case NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS: ni_660x_clock = NI_660x_Timebase_1_Clock; break; case NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS: ni_660x_clock = NI_660x_Timebase_2_Clock; break; case NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS: ni_660x_clock = NI_660x_Timebase_3_Clock; break; case NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS: ni_660x_clock = NI_660x_Logic_Low_Clock; break; case NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS: ni_660x_clock = NI_660x_Source_Pin_i_Clock; break; case NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS: ni_660x_clock = NI_660x_Next_Gate_Clock; break; case NI_GPCT_NEXT_TC_CLOCK_SRC_BITS: ni_660x_clock = NI_660x_Next_TC_Clock; break; default: for (i = 0; i <= ni_660x_max_rtsi_channel; ++i) { if (clock_select_bits == NI_GPCT_RTSI_CLOCK_SRC_BITS(i)) { ni_660x_clock = NI_660x_RTSI_Clock(i); break; } } if (i <= ni_660x_max_rtsi_channel) break; for (i = 0; i <= ni_660x_max_source_pin; ++i) { if (clock_select_bits == NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(i)) { ni_660x_clock = NI_660x_Source_Pin_Clock(i); break; } } if (i <= ni_660x_max_source_pin) break; ni_660x_clock = 0; BUG(); break; } return Gi_Source_Select_Bits(ni_660x_clock); }
static unsigned ni_m_series_clock_src_select(const struct ni_gpct *counter) { struct ni_gpct_device *counter_dev = counter->counter_dev; const unsigned second_gate_reg = NITIO_Gi_Second_Gate_Reg(counter->counter_index); unsigned clock_source = 0; unsigned i; const unsigned input_select = (ni_tio_get_soft_copy(counter, NITIO_Gi_Input_Select_Reg(counter-> counter_index)) & Gi_Source_Select_Mask) >> Gi_Source_Select_Shift; switch (input_select) { case NI_M_Series_Timebase_1_Clock: clock_source = NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS; break; case NI_M_Series_Timebase_2_Clock: clock_source = NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS; break; case NI_M_Series_Timebase_3_Clock: if (counter_dev-> regs[second_gate_reg] & Gi_Source_Subselect_Bit) clock_source = NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS; else clock_source = NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS; break; case NI_M_Series_Logic_Low_Clock: clock_source = NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS; break; case NI_M_Series_Next_Gate_Clock: if (counter_dev-> regs[second_gate_reg] & Gi_Source_Subselect_Bit) clock_source = NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS; else clock_source = NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS; break; case NI_M_Series_PXI10_Clock: clock_source = NI_GPCT_PXI10_CLOCK_SRC_BITS; break; case NI_M_Series_Next_TC_Clock: clock_source = NI_GPCT_NEXT_TC_CLOCK_SRC_BITS; break; default: for (i = 0; i <= ni_m_series_max_rtsi_channel; ++i) { if (input_select == NI_M_Series_RTSI_Clock(i)) { clock_source = NI_GPCT_RTSI_CLOCK_SRC_BITS(i); break; } } if (i <= ni_m_series_max_rtsi_channel) break; for (i = 0; i <= ni_m_series_max_pfi_channel; ++i) { if (input_select == NI_M_Series_PFI_Clock(i)) { clock_source = NI_GPCT_PFI_CLOCK_SRC_BITS(i); break; } } if (i <= ni_m_series_max_pfi_channel) break; BUG(); break; } clock_source |= ni_tio_clock_src_modifiers(counter); return clock_source; }