/** * PWM configuration. * * @param ch operation channel * @return none */ void pwm_config(enum pwm_channel ch) { pwm_init_ch = ch; /* Configure pins from GPIOs to PWM */ if (ch == PWM_CH_FAN) gpio_config_module(MODULE_PWM_FAN, 1); else gpio_config_module(MODULE_PWM_KBLIGHT, 1); /* Disable PWM for module configuration */ pwm_enable(ch, 0); /* Set PWM heartbeat mode is no heartbeat*/ NPCX_PWMCTL(pwm_channels[ch].channel) = (NPCX_PWMCTL(pwm_channels[ch].channel) &(~(((1<<2)-1)<<NPCX_PWMCTL_HB_DC_CTL))) |(NPCX_PWM_HBM_NORMAL<<NPCX_PWMCTL_HB_DC_CTL); /* Set PWM operation frequence */ pwm_freq_changed(); /* Set PWM cycle time */ NPCX_CTR(pwm_channels[ch].channel) = (pwm_channels[ch].cycle_pulses - 1); /* Set the duty cycle */ NPCX_DCR(pwm_channels[ch].channel) = 0; /* Set PWM polarity is normal*/ CLEAR_BIT(NPCX_PWMCTL(pwm_channels[ch].channel), NPCX_PWMCTL_INVP); /* Set PWM open drain output is push-pull type*/ CLEAR_BIT(NPCX_PWMCTL(pwm_channels[ch].channel), NPCX_PWMCTLEX_OD_OUT); /* Select default CLK or LFCLK clock input to PWM module */ NPCX_PWMCTLEX(pwm_channels[ch].channel) = (NPCX_PWMCTLEX(pwm_channels[ch].channel) & (~(((1<<2)-1)<<NPCX_PWMCTLEX_FCK_SEL))) | (NPCX_PWM_CLOCK_APB2_LFCLK<<NPCX_PWMCTLEX_FCK_SEL); if (ch == PWM_CH_FAN) { #ifdef CONFIG_PWM_INPUT_LFCLK /* Select default LFCLK clock input to PWM module */ SET_BIT(NPCX_PWMCTL(pwm_channels[ch].channel), NPCX_PWMCTL_CKSEL); #else /* Select default core clock input to PWM module */ CLEAR_BIT(NPCX_PWMCTL(pwm_channels[ch].channel), NPCX_PWMCTL_CKSEL); #endif } else { /* Select default core clock input to PWM module */ CLEAR_BIT(NPCX_PWMCTL(pwm_channels[ch].channel), NPCX_PWMCTL_CKSEL); } }
/** * PWM configuration. * * @param ch operation channel * @return none */ void pwm_config(enum pwm_channel ch) { int mdl = pwm_channels[ch].channel; /* Disable PWM for module configuration */ pwm_enable(mdl, 0); /* Set PWM heartbeat mode is no heartbeat */ SET_FIELD(NPCX_PWMCTL(mdl), NPCX_PWMCTL_HB_DC_CTL_FIELD, NPCX_PWM_HBM_NORMAL); /* Select default CLK or LFCLK clock input to PWM module */ SET_FIELD(NPCX_PWMCTLEX(mdl), NPCX_PWMCTLEX_FCK_SEL_FIELD, NPCX_PWM_CLOCK_APB2_LFCLK); /* Set PWM polarity normal first */ CLEAR_BIT(NPCX_PWMCTL(mdl), NPCX_PWMCTL_INVP); /* Select PWM clock source */ UPDATE_BIT(NPCX_PWMCTL(mdl), NPCX_PWMCTL_CKSEL, (pwm_channels[ch].flags & PWM_CONFIG_DSLEEP_CLK)); /* Set PWM operation frequency */ pwm_set_freq(ch, pwm_channels[ch].freq, DUTY_CYCLE_RESOLUTION); }