nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t channel) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(channel<p_instance->cc_channel_count); nrfx_err_t err_code; uint32_t int_mask = RTC_CHANNEL_INT_MASK(channel); nrf_rtc_event_t event = RTC_CHANNEL_EVENT_ADDR(channel); nrf_rtc_event_disable(p_instance->p_reg,int_mask); if (nrf_rtc_int_is_enabled(p_instance->p_reg,int_mask)) { nrf_rtc_int_disable(p_instance->p_reg,int_mask); if (nrf_rtc_event_pending(p_instance->p_reg,event)) { nrf_rtc_event_clear(p_instance->p_reg,event); err_code = NRFX_ERROR_TIMEOUT; NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } } NRFX_LOG_INFO("RTC id: %d, channel disabled: %lu.", p_instance->instance_id, channel); err_code = NRFX_SUCCESS; NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; }
nrfx_err_t nrfx_dppi_channel_alloc(uint8_t * p_channel) { nrfx_err_t err_code; // Get mask of available DPPI channels uint32_t remaining_channels = DPPI_AVAILABLE_CHANNELS_MASK & ~(m_allocated_channels); uint8_t channel = 0; if (!remaining_channels) { err_code = NRFX_ERROR_NO_MEM; NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } // Find first free channel while (!(remaining_channels & DPPI_BIT_SET(channel))) { channel++; } m_allocated_channels |= DPPI_BIT_SET(channel); *p_channel = channel; err_code = NRFX_SUCCESS; NRFX_LOG_INFO("Allocated channel: %d.", channel); return err_code; }
nrfx_err_t nrfx_twim_xfer(nrfx_twim_t const * p_instance, nrfx_twim_xfer_desc_t const * p_xfer_desc, uint32_t flags) { NRFX_ASSERT(TWIM_LENGTH_VALIDATE(p_instance->drv_inst_idx, p_xfer_desc->primary_length, p_xfer_desc->secondary_length)); nrfx_err_t err_code = NRFX_SUCCESS; twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; // TXRX and TXTX transfers are supported only in non-blocking mode. NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWIM_XFER_TXRX))); NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWIM_XFER_TXTX))); NRFX_LOG_INFO("Transfer type: %s.", TRANSFER_TO_STR(p_xfer_desc->type)); NRFX_LOG_INFO("Transfer buffers length: primary: %d, secondary: %d.", p_xfer_desc->primary_length, p_xfer_desc->secondary_length); NRFX_LOG_DEBUG("Primary buffer data:"); NRFX_LOG_HEXDUMP_DEBUG(p_xfer_desc->p_primary_buf, p_xfer_desc->primary_length * sizeof(p_xfer_desc->p_primary_buf[0])); NRFX_LOG_DEBUG("Secondary buffer data:"); NRFX_LOG_HEXDUMP_DEBUG(p_xfer_desc->p_secondary_buf, p_xfer_desc->secondary_length * sizeof(p_xfer_desc->p_secondary_buf[0])); err_code = twim_xfer(p_cb, (NRF_TWIM_Type *)p_instance->p_twim, p_xfer_desc, flags); NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; }
nrfx_err_t nrfx_dppi_group_alloc(nrf_dppi_channel_group_t * p_group) { nrfx_err_t err_code; // Get mask of available DPPI groups uint32_t remaining_groups = DPPI_AVAILABLE_GROUPS_MASK & ~(m_allocated_groups); nrf_dppi_channel_group_t group = NRF_DPPI_CHANNEL_GROUP0; if (!remaining_groups) { err_code = NRFX_ERROR_NO_MEM; NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } // Find first free group while (!(remaining_groups & DPPI_BIT_SET(group))) { group++; } m_allocated_groups |= DPPI_BIT_SET(group); *p_group = group; err_code = NRFX_SUCCESS; NRFX_LOG_INFO("Allocated channel: %d.", group); return err_code; }
nrfx_err_t nrfx_uart_tx(nrfx_uart_t const * p_instance, uint8_t const * p_data, size_t length) { uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(p_data); NRFX_ASSERT(length > 0); nrfx_err_t err_code; if (nrfx_uart_tx_in_progress(p_instance)) { err_code = NRFX_ERROR_BUSY; NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } p_cb->tx_buffer_length = length; p_cb->p_tx_buffer = p_data; p_cb->tx_counter = 0; p_cb->tx_abort = false; NRFX_LOG_INFO("Transfer tx_len: %d.", p_cb->tx_buffer_length); NRFX_LOG_DEBUG("Tx data:"); NRFX_LOG_HEXDUMP_DEBUG(p_cb->p_tx_buffer, p_cb->tx_buffer_length * sizeof(p_cb->p_tx_buffer[0])); err_code = NRFX_SUCCESS; nrf_uart_event_clear(p_instance->p_reg, NRF_UART_EVENT_TXDRDY); nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STARTTX); tx_byte(p_instance->p_reg, p_cb); if (p_cb->handler == NULL) { if (!tx_blocking(p_instance->p_reg, p_cb)) { // The transfer has been aborted. err_code = NRFX_ERROR_FORBIDDEN; } else { // Wait until the last byte is completely transmitted. while (!nrf_uart_event_check(p_instance->p_reg, NRF_UART_EVENT_TXDRDY)) {} nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPTX); } p_cb->tx_buffer_length = 0; } NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; }
nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance, uint32_t channel, uint32_t val, bool enable_irq) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(channel<p_instance->cc_channel_count); nrfx_err_t err_code; uint32_t int_mask = RTC_CHANNEL_INT_MASK(channel); nrf_rtc_event_t event = RTC_CHANNEL_EVENT_ADDR(channel); nrf_rtc_event_disable(p_instance->p_reg, int_mask); nrf_rtc_int_disable(p_instance->p_reg, int_mask); val = RTC_WRAP(val); if (m_cb[p_instance->instance_id].reliable) { nrf_rtc_cc_set(p_instance->p_reg,channel,val); uint32_t cnt = nrf_rtc_counter_get(p_instance->p_reg); int32_t diff = cnt - val; if (cnt < val) { diff += RTC_COUNTER_COUNTER_Msk; } if (diff < m_cb[p_instance->instance_id].tick_latency) { err_code = NRFX_ERROR_TIMEOUT; NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } } else { nrf_rtc_cc_set(p_instance->p_reg,channel,val); } if (enable_irq) { nrf_rtc_event_clear(p_instance->p_reg,event); nrf_rtc_int_enable(p_instance->p_reg, int_mask); } nrf_rtc_event_enable(p_instance->p_reg,int_mask); NRFX_LOG_INFO("RTC id: %d, channel enabled: %lu, compare value: %lu.", p_instance->instance_id, channel, val); err_code = NRFX_SUCCESS; NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; }
nrfx_err_t nrfx_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size) { NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); nrfx_err_t err_code; NRFX_LOG_INFO("Number of samples requested to convert: %d.", size); if (m_cb.state == NRFX_DRV_STATE_POWERED_ON) { err_code = NRFX_ERROR_BUSY; NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } else { m_cb.state = NRFX_DRV_STATE_POWERED_ON; m_cb.p_current_conv = m_cb.p_head; m_cb.size = size; m_cb.idx = 0; m_cb.p_buffer = buffer; nrf_adc_config_set(m_cb.p_current_conv->config.data); nrf_adc_event_clear(NRF_ADC_EVENT_END); nrf_adc_enable(); if (m_cb.event_handler) { nrf_adc_int_enable(NRF_ADC_INT_END_MASK); } else { while (1) { while (!nrf_adc_event_check(NRF_ADC_EVENT_END)){} if (adc_sample_process()) { m_cb.state = NRFX_DRV_STATE_INITIALIZED; break; } } } err_code = NRFX_SUCCESS; NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } }
bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance, bool wait_until_stopped) { NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); bool ret_val = false; if (nrfx_pwm_is_stopped(p_instance)) { ret_val = true; } else { nrf_pwm_task_trigger(p_instance->p_registers, NRF_PWM_TASK_STOP); do { if (nrfx_pwm_is_stopped(p_instance)) { ret_val = true; break; } } while (wait_until_stopped); } NRFX_LOG_INFO("%s returned %d.", __func__, ret_val); return ret_val; }
nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config, nrfx_adc_event_handler_t event_handler) { NRFX_ASSERT(p_config); nrfx_err_t err_code; if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) { err_code = NRFX_ERROR_INVALID_STATE; NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } nrf_adc_event_clear(NRF_ADC_EVENT_END); if (event_handler) { NRFX_IRQ_PRIORITY_SET(ADC_IRQn, p_config->interrupt_priority); NRFX_IRQ_ENABLE(ADC_IRQn); } m_cb.event_handler = event_handler; m_cb.state = NRFX_DRV_STATE_INITIALIZED; err_code = NRFX_SUCCESS; NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; }
nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const p_instance, nrfx_rtc_config_t const * p_config, nrfx_rtc_handler_t handler) { NRFX_ASSERT(p_config); NRFX_ASSERT(handler); nrfx_err_t err_code; m_handlers[p_instance->instance_id] = handler; if (m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED) { err_code = NRFX_ERROR_INVALID_STATE; NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } NRFX_IRQ_PRIORITY_SET(p_instance->irq, p_config->interrupt_priority); NRFX_IRQ_ENABLE(p_instance->irq); nrf_rtc_prescaler_set(p_instance->p_reg, p_config->prescaler); m_cb[p_instance->instance_id].reliable = p_config->reliable; m_cb[p_instance->instance_id].tick_latency = p_config->tick_latency; m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED; err_code = NRFX_SUCCESS; NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; }
nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const p_instance, nrfx_pwm_config_t const * p_config, nrfx_pwm_handler_t handler) { NRFX_ASSERT(p_config); nrfx_err_t err_code; pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { err_code = NRFX_ERROR_INVALID_STATE; NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } p_cb->handler = handler; configure_pins(p_instance, p_config); nrf_pwm_enable(p_instance->p_registers); nrf_pwm_configure(p_instance->p_registers, p_config->base_clock, p_config->count_mode, p_config->top_value); nrf_pwm_decoder_set(p_instance->p_registers, p_config->load_mode, p_config->step_mode); nrf_pwm_shorts_set(p_instance->p_registers, 0); nrf_pwm_int_set(p_instance->p_registers, 0); nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_LOOPSDONE); nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND0); nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND1); nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_STOPPED); // The workaround for nRF52 Anomaly 109 "protects" DMA transfers by handling // interrupts generated on SEQEND0 and SEQEND1 events (this ensures that // the 64 MHz clock is ready when data for the next sequence to be played // is read). Therefore, the PWM interrupt must be enabled even if the event // handler is not used. #if defined(USE_DMA_ISSUE_WORKAROUND) NRFX_IRQ_PRIORITY_SET(DMA_ISSUE_EGU_IRQn, p_config->irq_priority); NRFX_IRQ_ENABLE(DMA_ISSUE_EGU_IRQn); #else if (p_cb->handler) #endif { NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_registers), p_config->irq_priority); NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_registers)); } p_cb->state = NRFX_DRV_STATE_INITIALIZED; err_code = NRFX_SUCCESS; NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; }
void nrfx_rtc_disable(nrfx_rtc_t const * const p_instance) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_STOP); m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED; NRFX_LOG_INFO("Disabled."); }
void nrfx_clock_uninit(void) { NRFX_ASSERT(m_clock_cb.module_initialized); nrfx_clock_lfclk_stop(); nrfx_clock_hfclk_stop(); m_clock_cb.module_initialized = false; NRFX_LOG_INFO("Uninitialized."); }
void nrfx_qdec_disable(void) { NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); nrf_qdec_task_trigger(NRF_QDEC_TASK_STOP); nrf_qdec_disable(); m_state = NRFX_DRV_STATE_INITIALIZED; NRFX_LOG_INFO("Disabled."); }
void nrfx_qdec_uninit(void) { NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); nrfx_qdec_disable(); NRFX_IRQ_DISABLE(QDEC_IRQn); m_state = NRFX_DRV_STATE_UNINITIALIZED; NRFX_LOG_INFO("Uninitialized."); }
void nrfx_uart_rx_abort(nrfx_uart_t const * p_instance) { nrf_uart_int_disable(p_instance->p_reg, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR); nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPRX); NRFX_LOG_INFO("RX transaction aborted."); }
void nrfx_rtc_tick_disable(nrfx_rtc_t const * const p_instance) { uint32_t mask = NRF_RTC_INT_TICK_MASK; nrf_rtc_event_disable(p_instance->p_reg, mask); nrf_rtc_int_disable(p_instance->p_reg, mask); NRFX_LOG_INFO("Tick events disabled."); }
void nrfx_rtc_enable(nrfx_rtc_t const * const p_instance) { NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_START); m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_POWERED_ON; NRFX_LOG_INFO("Enabled."); }
uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const * const p_instance, nrf_pwm_sequence_t const * p_sequence_0, nrf_pwm_sequence_t const * p_sequence_1, uint16_t playback_count, uint32_t flags) { pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(playback_count > 0); NRFX_ASSERT(nrfx_is_in_ram(p_sequence_0->values.p_raw)); NRFX_ASSERT(nrfx_is_in_ram(p_sequence_1->values.p_raw)); nrf_pwm_sequence_set(p_instance->p_registers, 0, p_sequence_0); nrf_pwm_sequence_set(p_instance->p_registers, 1, p_sequence_1); nrf_pwm_loop_set(p_instance->p_registers, playback_count); uint32_t shorts_mask; if (flags & NRFX_PWM_FLAG_STOP) { shorts_mask = NRF_PWM_SHORT_LOOPSDONE_STOP_MASK; } else if (flags & NRFX_PWM_FLAG_LOOP) { shorts_mask = NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK; } else { shorts_mask = 0; } nrf_pwm_shorts_set(p_instance->p_registers, shorts_mask); NRFX_LOG_INFO("Function: %s, sequence 0 length: %d.", __func__, p_sequence_0->length); NRFX_LOG_INFO("Function: %s, sequence 1 length: %d.", __func__, p_sequence_1->length); NRFX_LOG_DEBUG("Sequence 0 data:"); NRFX_LOG_HEXDUMP_DEBUG(p_sequence_0->values.p_raw, p_sequence_0->length * sizeof(uint16_t)); NRFX_LOG_DEBUG("Sequence 1 data:"); NRFX_LOG_HEXDUMP_DEBUG(p_sequence_1->values.p_raw, p_sequence_1->length * sizeof(uint16_t)); return start_playback(p_instance, p_cb, flags, NRF_PWM_TASK_SEQSTART0); }
void nrfx_comp_stop(void) { NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); nrf_comp_shorts_disable(UINT32_MAX); nrf_comp_int_disable(UINT32_MAX); nrf_comp_task_trigger(NRF_COMP_TASK_STOP); m_state = NRFX_DRV_STATE_INITIALIZED; NRFX_LOG_INFO("Disabled."); }
void nrfx_comp_start(uint32_t comp_int_mask, uint32_t comp_shorts_mask) { NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); nrf_comp_int_enable(comp_int_mask); nrf_comp_shorts_enable(comp_shorts_mask); nrf_comp_task_trigger(NRF_COMP_TASK_START); m_state = NRFX_DRV_STATE_POWERED_ON; NRFX_LOG_INFO("Enabled."); }
void nrfx_twim_enable(nrfx_twim_t const * p_instance) { twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); nrf_twim_enable(p_instance->p_twim); p_cb->state = NRFX_DRV_STATE_POWERED_ON; NRFX_LOG_INFO("Instance enabled: %d.", p_instance->drv_inst_idx); }
void nrfx_rng_uninit(void) { NRFX_ASSERT(m_rng_state == NRFX_DRV_STATE_INITIALIZED); nrf_rng_int_disable(NRF_RNG_INT_VALRDY_MASK); nrf_rng_task_trigger(NRF_RNG_TASK_STOP); NRFX_IRQ_DISABLE(RNG_IRQn); m_rng_state = NRFX_DRV_STATE_UNINITIALIZED; NRFX_LOG_INFO("Uninitialized."); }
void nrfx_comp_uninit(void) { NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_IRQ_DISABLE(COMP_LPCOMP_IRQn); nrf_comp_disable(); #if NRFX_CHECK(NRFX_PRS_ENABLED) nrfx_prs_release(NRF_COMP); #endif m_state = NRFX_DRV_STATE_UNINITIALIZED; m_comp_event_handler = NULL; NRFX_LOG_INFO("Uninitialized."); }
void nrfx_clock_enable(void) { NRFX_ASSERT(m_clock_cb.module_initialized); nrfx_power_clock_irq_init(); nrf_clock_lf_src_set((nrf_clock_lfclk_t)NRFX_CLOCK_CONFIG_LF_SRC); #if NRFX_CHECK(NRFX_POWER_ENABLED) nrfx_clock_irq_enabled = true; #endif NRFX_LOG_INFO("Module enabled."); }
void nrfx_uarte_rx_abort(nrfx_uarte_t const * p_instance) { uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; // Short between ENDRX event and STARTRX task must be disabled before // aborting transmission. if (p_cb->rx_secondary_buffer_length != 0) { nrf_uarte_shorts_disable(p_instance->p_reg, NRF_UARTE_SHORT_ENDRX_STARTRX); } nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPRX); NRFX_LOG_INFO("RX transaction aborted."); }
void nrfx_rtc_tick_enable(nrfx_rtc_t const * const p_instance, bool enable_irq) { nrf_rtc_event_t event = NRF_RTC_EVENT_TICK; uint32_t mask = NRF_RTC_INT_TICK_MASK; nrf_rtc_event_clear(p_instance->p_reg, event); nrf_rtc_event_enable(p_instance->p_reg, mask); if (enable_irq) { nrf_rtc_int_enable(p_instance->p_reg, mask); } NRFX_LOG_INFO("Tick events enabled."); }
void nrfx_uarte_tx_abort(nrfx_uarte_t const * p_instance) { uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED); nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPTX); if (p_cb->handler == NULL) { while (!nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED)) {} } NRFX_LOG_INFO("TX transaction aborted."); }
void nrfx_uart_tx_abort(nrfx_uart_t const * p_instance) { uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; p_cb->tx_abort = true; nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPTX); if (p_cb->handler) { tx_done_event(p_cb, p_cb->tx_counter); } NRFX_LOG_INFO("TX transaction aborted."); }
void nrfx_twim_disable(nrfx_twim_t const * p_instance) { twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); NRF_TWIM_Type * p_twim = p_instance->p_twim; p_cb->int_mask = 0; nrf_twim_int_disable(p_twim, NRF_TWIM_ALL_INTS_MASK); nrf_twim_shorts_disable(p_twim, NRF_TWIM_ALL_SHORTS_MASK); nrf_twim_disable(p_twim); p_cb->state = NRFX_DRV_STATE_INITIALIZED; NRFX_LOG_INFO("Instance disabled: %d.", p_instance->drv_inst_idx); }