/**
Stalls the CPU for at least the given number of microseconds.
Stalls the CPU for the number of microseconds specified by MicroSeconds.
@param MicroSeconds The minimum number of microseconds to delay.
@return The value of MicroSeconds inputted.
**/
UINTN
EFIAPI
MicroSecondDelay (
IN UINTN MicroSeconds
)
{
return NanoSecondDelay (MicroSeconds * 1000);
}
UINTN
EFIAPI
MicroSecondDelay (
IN UINTN MicroSeconds
)
{
UINT64 NanoSeconds;
NanoSeconds = MultU64x32(MicroSeconds, 1000);
while (NanoSeconds > (UINTN)-1) {
NanoSecondDelay((UINTN)-1);
NanoSeconds -= (UINTN)-1;
}
NanoSecondDelay(NanoSeconds);
return MicroSeconds;
}
/**
Waits for the specified number of ticks.
This function implements EFI_METRONOME_ARCH_PROTOCOL.WaitForTick().
The WaitForTick() function waits for the number of ticks specified by
TickNumber from a known time source in the platform. If TickNumber of
ticks are detected, then EFI_SUCCESS is returned. The actual time passed
between entry of this function and the first tick is between 0 and
TickPeriod 100 nS units. If you want to guarantee that at least TickPeriod
time has elapsed, wait for two ticks. This function waits for a hardware
event to determine when a tick occurs. It is possible for interrupt
processing, or exception processing to interrupt the execution of the
WaitForTick() function. Depending on the hardware source for the ticks, it
is possible for a tick to be missed. This function cannot guarantee that
ticks will not be missed. If a timeout occurs waiting for the specified
number of ticks, then EFI_TIMEOUT is returned.
@param This The EFI_METRONOME_ARCH_PROTOCOL instance.
@param TickNumber Number of ticks to wait.
@retval EFI_SUCCESS The wait for the number of ticks specified by TickNumber
succeeded.
@retval EFI_TIMEOUT A timeout occurred waiting for the specified number of ticks.
**/
EFI_STATUS
EFIAPI
WaitForTick (
IN EFI_METRONOME_ARCH_PROTOCOL *This,
IN UINT32 TickNumber
)
{
//
// Check the value of TickNumber, so a 32-bit overflow can be avoided
// when TickNumber of converted to nanosecond units
//
if (TickNumber < 10000000) {
//
// If TickNumber is small, then use NanoSecondDelay()
//
NanoSecondDelay (TickNumber * 100);
} else {
//
// If TickNumber is large, then use MicroSecondDelay()
//
MicroSecondDelay (TickNumber / 10);
}
return EFI_SUCCESS;
}
STATIC EFI_STATUS prepare_cmd (
struct hisi_hba *hba,
EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
)
{
struct hisi_sas_slot *slot;
struct hisi_sas_cmd_hdr *hdr;
struct hisi_sas_sge_page *sge;
struct hisi_sas_sts *sts;
struct hisi_sas_cmd *cmd;
EFI_SCSI_SENSE_DATA *SensePtr = Packet->SenseData;
VOID *Buffer = NULL;
UINT32 BufferSize = 0;
int queue = hba->queue;
UINT32 r, w = 0, slot_idx = 0;
UINT8 *p;
while (1) {
w = READ_REG32(DLVRY_Q_0_WR_PTR + (queue * 0x14));
r = READ_REG32(DLVRY_Q_0_RD_PTR + (queue * 0x14));
slot_idx = queue * QUEUE_SLOTS + w;
slot = &hba->slots[slot_idx];
if (slot->used || (r == (w+1) % QUEUE_SLOTS)) {
queue = (queue + 1) % QUEUE_CNT;
if (queue == hba->queue) {
DEBUG ((EFI_D_ERROR, "could not find free slot\n"));
return EFI_NOT_READY;
}
continue;
}
break;
}
hdr = &hba->cmd_hdr[queue][w];
cmd = &hba->command_table[queue][w];
sts = &hba->status_buf[queue][w];
sge = &hba->sge[queue][w];
ZeroMem (cmd, sizeof (struct hisi_sas_cmd));
ZeroMem (sts, sizeof (struct hisi_sas_sts));
if (SensePtr)
ZeroMem (SensePtr, sizeof (EFI_SCSI_SENSE_DATA));
slot->used = TRUE;
slot->sts = sts;
hba->queue = (queue + 1) % QUEUE_CNT;
//only consider ssp
//prep_ssp_v1_hw
/* create header */
hdr->dw0 = (1 << CMD_HDR_RESP_REPORT_OFF) |
(0x2 << CMD_HDR_TLR_CTRL_OFF) |
(hba->port_id << CMD_HDR_PORT_OFF) |
(1 << CMD_HDR_MODE_OFF) | /* ini mode */
(1 << CMD_HDR_CMD_OFF); /* ssp */
hdr->dw1 = 1 << CMD_HDR_VERIFY_DTL_OFF;
/* device_id = 0 */
hdr->dw1 |= 0 << CMD_HDR_DEVICE_ID_OFF;
hdr->dw2 = 0x83000d;
hdr->transfer_tags = slot_idx << CMD_HDR_IPTT_OFF;
if (Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_READ) {
Buffer = Packet->InDataBuffer;
BufferSize = Packet->InTransferLength;
if (Buffer) {
hdr->dw1 |= 1 << CMD_HDR_SSP_FRAME_TYPE_OFF;
InvalidateDataCacheRange (Buffer, BufferSize);
}
} else if (Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_WRITE) {
Buffer = Packet->OutDataBuffer;
BufferSize = Packet->OutTransferLength;
if (Buffer)
hdr->dw1 |= 2 << CMD_HDR_SSP_FRAME_TYPE_OFF;
} else {
hdr->dw1 |= 0 << CMD_HDR_SSP_FRAME_TYPE_OFF;
}
if (Buffer != NULL) {
struct hisi_sas_sge *sg;
UINT32 remain, len, pos = 0;
int i = 0;
remain = len = BufferSize;
while (remain) {
if (len > SGE_LIMIT)
len = SGE_LIMIT;
sg = &sge->sg[i];
sg->addr = (UINT64)(Buffer + pos);
sg->page_ctrl_0 = sg->page_ctrl_1 = 0;
sg->data_len = len;
sg->data_off = 0;
remain -= len;
pos += len;
len = remain;
i++;
}
hdr->prd_table_addr = (UINT64)sge;
hdr->sg_len = i << CMD_HDR_DATA_SGL_LEN_OFF;
}
hdr->data_transfer_len = BufferSize;
hdr->cmd_table_addr = (UINT64)cmd;
hdr->sts_buffer_addr = (UINT64)sts;
CopyMem (&cmd->cmd[36], Packet->Cdb, Packet->CdbLength);
if (Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_WRITE)
WriteBackDataCacheRange (Buffer, BufferSize);
asm("dsb sy");
asm("isb sy");
//start_delivery_v1_hw
WRITE_REG32(DLVRY_Q_0_WR_PTR + queue * 0x14, ++w % QUEUE_SLOTS);
//waiting for slot free, dma completed
while (slot->used) {
if (READ_REG32(OQ_INT_SRC) & BIT(queue)) {
MicroSecondDelay(500);
break;
}
NanoSecondDelay (100);
}
p = (UINT8 *)&slot->sts->status[0];
if (p[SENSE_DATA_PRES]) {
/* hack for spin up */
SensePtr->Sense_Key = EFI_SCSI_SK_NOT_READY;
SensePtr->Addnl_Sense_Code = EFI_SCSI_ASC_NOT_READY;
SensePtr->Addnl_Sense_Code_Qualifier = EFI_SCSI_ASCQ_IN_PROGRESS;
MicroSecondDelay(1000000);
}
return EFI_SUCCESS;
}
