/**
* Gets the lowest soc power state supported by the hardware
*
* @returns information about the SocPowerState
*/
const NvOdmSocPowerStateInfo* NvOdmQueryLowestSocPowerState(void)
{
static NvOdmSocPowerStateInfo PowerStateInfo;
const static NvOdmSocPowerStateInfo* pPowerStateInfo = NULL;
NvOdmServicesKeyListHandle hKeyList;
NvU32 LPStateSelection = 0;
if (pPowerStateInfo == NULL)
{
hKeyList = NvOdmServicesKeyListOpen();
if (hKeyList)
{
LPStateSelection = NvOdmServicesGetKeyValue(hKeyList,
NvOdmKeyListId_ReservedBctCustomerOption);
NvOdmServicesKeyListClose(hKeyList);
LPStateSelection = NV_DRF_VAL(TEGRA_DEVKIT, BCT_CUSTOPT, LPSTATE, LPStateSelection);
}
// Lowest power state controlled by the flashed custom option.
PowerStateInfo.LowestPowerState = ((LPStateSelection != TEGRA_DEVKIT_BCT_CUSTOPT_0_LPSTATE_LP1)?
NvOdmSocPowerState_Suspend : NvOdmSocPowerState_DeepSleep);
//remove the next hardcode line when we want to read from odmdata
// PowerStateInfo.LowestPowerState = NvOdmSocPowerState_DeepSleep;
pPowerStateInfo = (const NvOdmSocPowerStateInfo*) &PowerStateInfo;
}
return (pPowerStateInfo);
}
static NvU32
GetBctKeyValue(void)
{
NvOdmServicesKeyListHandle hKeyList = NULL;
NvU32 BctCustOpt = 0;
hKeyList = NvOdmServicesKeyListOpen();
if (hKeyList)
{
BctCustOpt =
NvOdmServicesGetKeyValue(hKeyList,
NvOdmKeyListId_ReservedBctCustomerOption);
NvOdmServicesKeyListClose(hKeyList);
}
return BctCustOpt;
}
void
NvOdmQueryPinMux(
NvOdmIoModule IoModule,
const NvU32 **pPinMuxConfigTable,
NvU32 *pCount)
{
NvU32 CustomerOption = 0;
NvU32 Personality = 0;
NvU32 Ril = 0;
NvOdmServicesKeyListHandle hKeyList;
hKeyList = NvOdmServicesKeyListOpen();
if (hKeyList)
{
CustomerOption =
NvOdmServicesGetKeyValue(hKeyList,
NvOdmKeyListId_ReservedBctCustomerOption);
NvOdmServicesKeyListClose(hKeyList);
Personality =
NV_DRF_VAL(TEGRA_DEVKIT, BCT_CUSTOPT, PERSONALITY, CustomerOption);
Ril =
NV_DRF_VAL(TEGRA_DEVKIT, BCT_CUSTOPT, RIL, CustomerOption);
}
if (!Personality)
Personality = TEGRA_DEVKIT_DEFAULT_PERSONALITY;
if (!Ril)
Ril = TEGRA_DEVKIT_BCT_CUSTOPT_0_RIL_DEFAULT;
switch (IoModule)
{
case NvOdmIoModule_Display:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Display;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Display);
break;
case NvOdmIoModule_Dap:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Dap;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Dap);
break;
case NvOdmIoModule_Hdcp:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Hdcp;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Hdcp);
break;
case NvOdmIoModule_Hdmi:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Hdmi;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Hdmi);
break;
case NvOdmIoModule_I2c:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_I2c;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_I2c);
break;
case NvOdmIoModule_I2c_Pmu:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_I2c_Pmu;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_I2c_Pmu);
break;
case NvOdmIoModule_Kbd:
if ((Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_11) ||
(Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_15) ||
(Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_C1))
{
// Disable KBD pin-mux when PTM trace enabled (shares kbcc pin-group)
*pPinMuxConfigTable = NULL;
*pCount = 0;
}
else
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Kbd;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Kbd);
}
break;
case NvOdmIoModule_Mio:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Mio;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Mio);
break;
case NvOdmIoModule_Nand:
if ((Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_05) ||
(Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_15))
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Nand_05;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Nand_05);
}
else
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Nand;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Nand);
}
break;
case NvOdmIoModule_Sdio:
if ((Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_05) ||
(Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_15) ||
(Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_C4))
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Sdio_05;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Sdio_05);
}
else
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Sdio;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Sdio);
}
break;
case NvOdmIoModule_Spdif:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Spdif;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Spdif);
break;
case NvOdmIoModule_Spi:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Spi;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Spi);
break;
case NvOdmIoModule_Uart:
if (Ril == TEGRA_DEVKIT_BCT_CUSTOPT_0_RIL_EMP_RAINBOW_ULPI)
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Uart_Hsi_Ulpi;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Uart_Hsi_Ulpi);
}
else if (Ril == TEGRA_DEVKIT_BCT_CUSTOPT_0_RIL_EMP_RAINBOW)
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Uart_Ril_Emp;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Uart_Ril_Emp);
}
else
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Uart;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Uart);
}
break;
case NvOdmIoModule_ExternalClock:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_ExternalClock;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_ExternalClock);
break;
case NvOdmIoModule_VideoInput:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_VideoInput;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_VideoInput);
break;
case NvOdmIoModule_Crt:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Crt;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Crt);
break;
case NvOdmIoModule_Tvo:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Tvo;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Tvo);
break;
case NvOdmIoModule_Ata:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Ata;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Ata);
break;
case NvOdmIoModule_Pwm:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Pwm;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Pwm);
break;
case NvOdmIoModule_Dsi:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Dsi;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Dsi);
break;
case NvOdmIoModule_Hsi:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Hsi;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Hsi);
break;
case NvOdmIoModule_Twc:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Twc;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Twc);
break;
case NvOdmIoModule_Ulpi:
if (Ril == TEGRA_DEVKIT_BCT_CUSTOPT_0_RIL_EMP_RAINBOW_ULPI)
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Ulpi;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Ulpi);
}
else
{
*pPinMuxConfigTable = NULL;
*pCount = 0;
}
break;
case NvOdmIoModule_OneWire:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_OneWire;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_OneWire);
break;
case NvOdmIoModule_SyncNor:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_SyncNor;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_SyncNor);
break;
case NvOdmIoModule_PciExpress:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_PciExpress;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_PciExpress);
break;
case NvOdmIoModule_Trace:
if ((Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_11) ||
(Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_15) ||
(Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_C1))
{
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_Ptm;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_Ptm);
}
else
{
*pCount = 0;
}
break;
case NvOdmIoModule_BacklightPwm:
*pPinMuxConfigTable = s_NvOdmPinMuxConfig_BacklightPwm;
*pCount = NV_ARRAY_SIZE(s_NvOdmPinMuxConfig_BacklightPwm);
break;
case NvOdmIoModule_Hsmmc:
case NvOdmIoModule_Csi:
case NvOdmIoModule_Sflash:
case NvOdmIoModule_Slink:
case NvOdmIoModule_Gpio:
case NvOdmIoModule_I2s:
case NvOdmIoModule_Usb:
case NvOdmIoModule_Vdd:
case NvOdmIoModule_Xio:
case NvOdmIoModule_Tsense:
*pCount = 0;
break;
default:
NV_ASSERT(!"Bad Parameter!");
*pCount = 0;
break;
}
}
const NvOdmGpioPinInfo *NvOdmQueryGpioPinMap(NvOdmGpioPinGroup Group,
NvU32 Instance, NvU32 *pCount)
{
NvU32 CustomerOption = 0;
NvU32 Personality = 0;
NvOdmServicesKeyListHandle hKeyList;
hKeyList = NvOdmServicesKeyListOpen();
if (hKeyList)
{
CustomerOption =
NvOdmServicesGetKeyValue(hKeyList,
NvOdmKeyListId_ReservedBctCustomerOption);
NvOdmServicesKeyListClose(hKeyList);
Personality =
NV_DRF_VAL(TEGRA_DEVKIT, BCT_CUSTOPT, PERSONALITY, CustomerOption);
}
if (!Personality)
Personality = TEGRA_DEVKIT_DEFAULT_PERSONALITY;
switch (Group)
{
case NvOdmGpioPinGroup_Display:
*pCount = NVODM_ARRAY_SIZE(s_display);
return s_display;
case NvOdmGpioPinGroup_Sdio:
if (Instance == 2)
{
*pCount = NVODM_ARRAY_SIZE(s_Sdio2);
return s_Sdio2;
}
else
{
*pCount = 0;
return NULL;
}
case NvOdmGpioPinGroup_ScrollWheel:
if ((Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_11) ||
(Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_15) ||
(Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_C1))
{
*pCount = NVODM_ARRAY_SIZE(s_ScrollWheel_TraceMode);
return s_ScrollWheel_TraceMode;
}
else
{
*pCount = NVODM_ARRAY_SIZE(s_ScrollWheel);
return s_ScrollWheel;
}
case NvOdmGpioPinGroup_NandFlash:
*pCount = NVODM_ARRAY_SIZE(s_NandFlash);
return s_NandFlash;
case NvOdmGpioPinGroup_Bluetooth:
*pCount = NVODM_ARRAY_SIZE(s_Bluetooth);
return s_Bluetooth;
case NvOdmGpioPinGroup_Wlan:
*pCount = NVODM_ARRAY_SIZE(s_Wlan);
return s_Wlan;
case NvOdmGpioPinGroup_SpiEthernet:
*pCount = NVODM_ARRAY_SIZE(s_spi_ethernet);
return s_spi_ethernet;
case NvOdmGpioPinGroup_Vi:
*pCount = NVODM_ARRAY_SIZE(s_vi);
return s_vi;
case NvOdmGpioPinGroup_Hdmi:
*pCount = NVODM_ARRAY_SIZE(s_hdmi);
return s_hdmi;
default:
*pCount = 0;
return NULL;
}
}
