コード例 #1
0
ファイル: disp_hdmi.c プロジェクト: Gucan/h3_lichee
s32 hdmi_clk_exit(struct disp_hdmi *hdmi)
{
	struct disp_hdmi_private_data *hdmip = disp_hdmi_get_priv(hdmi);
	if(!hdmi || !hdmip) {
	    DE_WRN("hdmi clk init null hdl!\n");
	    return DIS_FAIL;
	    }

	if(hdmi_init_flags == 1) {
		hdmi_init_flags = 0;

		hdmip->hdmi_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->hdmi_clk.clk);
		OSAL_CCMU_MclkOnOff(hdmip->hdmi_clk.h_clk, CLK_OFF);
		OSAL_CCMU_CloseMclk(hdmip->hdmi_clk.h_clk);

		hdmip->hdmi_ddc_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->hdmi_ddc_clk.clk);
		OSAL_CCMU_MclkOnOff(hdmip->hdmi_ddc_clk.h_clk, CLK_OFF);
		OSAL_CCMU_CloseMclk(hdmip->hdmi_ddc_clk.h_clk);

#if defined(__LINUX_PLAT__)
				{
					unsigned long flags;
					spin_lock_irqsave(&hdmi_data_lock, flags);
#endif
					hdmip->hdmi_clk.enabled = 0;
					hdmip->hdmi_ddc_clk.enabled = 0;
#if defined(__LINUX_PLAT__)
					spin_unlock_irqrestore(&hdmi_data_lock, flags);
				}
#endif
	}
	return 0;
}
コード例 #2
0
ファイル: disp_hdmi.c プロジェクト: Gucan/h3_lichee
s32 hdmi_clk_config(struct disp_hdmi *hdmi)
{
//	u32 pll_freq;
//	u32 clk_div;

	struct disp_hdmi_private_data *hdmip = disp_hdmi_get_priv(hdmi);
	if(!hdmi || !hdmip) {
	    DE_WRN("hdmi clk init null hdl!\n");
	    return DIS_FAIL;
	    }

	//set hdmi clk
	hdmip->hdmi_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->hdmi_clk.clk);
	if(hdmip->hdmi_clk.enabled == 0) {
		OSAL_CCMU_MclkOnOff(hdmip->hdmi_clk.h_clk, CLK_ON);

#if defined(__LINUX_PLAT__)
		{
		unsigned long flags;
		spin_lock_irqsave(&hdmi_data_lock, flags);
#endif
			hdmip->hdmi_clk.enabled = 1;
#if defined(__LINUX_PLAT__)
		spin_unlock_irqrestore(&hdmi_data_lock, flags);
		}
#endif
	}

	OSAL_CCMU_SetMclkFreq(hdmip->hdmi_clk.h_clk, hdmip->video_info->pixel_clk * (hdmip->video_info->avi_pr + 1));

	OSAL_CCMU_CloseMclk(hdmip->hdmi_clk.h_clk);

	hdmip->hdmi_ddc_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->hdmi_ddc_clk.clk);
	if(hdmip->hdmi_ddc_clk.enabled == 0) {
		OSAL_CCMU_MclkOnOff(hdmip->hdmi_ddc_clk.h_clk, CLK_ON);

#if defined(__LINUX_PLAT__)
			{
			unsigned long flags;
			spin_lock_irqsave(&hdmi_data_lock, flags);
#endif
				hdmip->hdmi_ddc_clk.enabled = 1;
#if defined(__LINUX_PLAT__)
			spin_unlock_irqrestore(&hdmi_data_lock, flags);
			}
#endif
	}

	OSAL_CCMU_CloseMclk(hdmip->hdmi_ddc_clk.h_clk);

	//set lcd clk
	hdmip->lcd_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->lcd_clk.clk);
	OSAL_CCMU_SetMclkSrc(hdmip->lcd_clk.h_clk);
	//OSAL_CCMU_SetSrcFreq(hdmip->lcd_clk.clk, 0);
	OSAL_CCMU_SetMclkFreq(hdmip->lcd_clk.h_clk, hdmip->video_info->pixel_clk * (hdmip->video_info->avi_pr + 1));
	OSAL_CCMU_MclkOnOff(hdmip->lcd_clk.h_clk, CLK_ON);
	OSAL_CCMU_CloseMclk(hdmip->lcd_clk.h_clk);
	return 0;
}
コード例 #3
0
__s32 dsi_clk_exit(void)
{
	OSAL_CCMU_MclkOnOff(h_dsiahbclk, CLK_OFF);
	OSAL_CCMU_MclkOnOff(h_dsimclk_s, CLK_OFF);
	OSAL_CCMU_MclkOnOff(h_dsimclk_p, CLK_OFF);
	OSAL_CCMU_CloseMclk(h_dsiahbclk);
	OSAL_CCMU_CloseMclk(h_dsimclk_s);
	OSAL_CCMU_CloseMclk(h_dsimclk_p);

	g_clk_status &= (CLK_DSI_AHB_OFF & CLK_DSI_MOD_OFF);

	return DIS_SUCCESS;
}
コード例 #4
0
__s32 hdmi_clk_exit(void)
{
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_hdmimclk, RST_VAILD);
#endif	
	OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_OFF);
	OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_OFF);
	OSAL_CCMU_CloseMclk(h_hdmiahbclk);
	OSAL_CCMU_CloseMclk(h_hdmimclk);

	g_clk_status &= (CLK_HDMI_AHB_OFF & CLK_HDMI_MOD_OFF);
	
	return DIS_SUCCESS;
}
コード例 #5
0
__s32 lcdc_clk_exit(__u32 sel)
{
	if (sel == 0) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd0ch0mclk0, RST_VALID);
#endif
		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_lcd0ahbclk);
		OSAL_CCMU_CloseMclk(h_lcd0ch0mclk0);
		OSAL_CCMU_CloseMclk(h_lcd0ch1mclk1);
		OSAL_CCMU_CloseMclk(h_lcd0ch1mclk2);

		g_clk_status &= ~(CLK_LCDC0_AHB_ON | CLK_LCDC0_MOD0_ON |
				  CLK_LCDC0_MOD1_ON);
	} else if (sel == 1) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd1ch0mclk0, RST_VALID);
#endif
		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk2, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_lcd1ahbclk);
		OSAL_CCMU_CloseMclk(h_lcd1ch0mclk0);
		OSAL_CCMU_CloseMclk(h_lcd1ch1mclk1);
		OSAL_CCMU_CloseMclk(h_lcd1ch1mclk2);

		g_clk_status &= ~(CLK_LCDC1_AHB_ON | CLK_LCDC1_MOD0_ON |
				  CLK_LCDC1_MOD1_ON);
	}
	return DIS_SUCCESS;
}
コード例 #6
0
__s32 tve_clk_exit(__u32 screen_id)
{
	if(screen_id == 0) {
		OSAL_CCMU_MclkOnOff(h_tvenc0ahbclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_tvenc0ahbclk);

		g_clk_status &= CLK_TVENC0_AHB_OFF;
	}	else if(screen_id == 1)	{
		OSAL_CCMU_MclkOnOff(h_tvenc1ahbclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_tvenc1ahbclk);

		g_clk_status &= CLK_TVENC1_AHB_OFF;
	}
	return DIS_SUCCESS;
}
コード例 #7
0
__s32 hdmi_clk_exit(void)
{
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_hdmimclk, RST_VALID);
#endif
	OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_OFF);
	OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_OFF);
	OSAL_CCMU_CloseMclk(h_hdmiahbclk);
	OSAL_CCMU_CloseMclk(h_hdmimclk);
#ifdef CONFIG_ARCH_SUN5I
	OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_OFF);
#endif

	g_clk_status &= ~(CLK_HDMI_AHB_ON | CLK_HDMI_MOD_ON);

	return DIS_SUCCESS;
}
コード例 #8
0
ファイル: disp_clk.c プロジェクト: pocketbook/Platform_A13
__s32 lvds_clk_exit(void)
{
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_lvdsmclk, RST_VAILD);
#endif				
	OSAL_CCMU_CloseMclk(AW_MOD_CLK_LVDS);
		
	return DIS_SUCCESS;
}
コード例 #9
0
__s32 tve_clk_exit(__u32 sel)
{
	if (sel == 0) {
		OSAL_CCMU_MclkOnOff(h_tvenc0ahbclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_tvenc0ahbclk);
#ifdef CONFIG_ARCH_SUN5I
		OSAL_CCMU_MclkReset(h_lcd0ch1mclk2, RST_VALID);
#endif

		g_clk_status &= ~CLK_TVENC0_AHB_ON;
	} else if (sel == 1) {
		OSAL_CCMU_MclkOnOff(h_tvenc1ahbclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_tvenc1ahbclk);

		g_clk_status &= ~CLK_TVENC1_AHB_ON;
	}
	return DIS_SUCCESS;
}
コード例 #10
0
__s32 iep_clk_exit(__u32 sel)
{
	OSAL_CCMU_MclkReset(h_iepmclk, RST_VALID);

	if (g_clk_status & CLK_IEP_DRAM_ON)
		OSAL_CCMU_MclkOnOff(h_iepdramclk, CLK_OFF);

	if (g_clk_status & CLK_IEP_MOD_ON)
		OSAL_CCMU_MclkOnOff(h_iepmclk, CLK_OFF);

	OSAL_CCMU_MclkOnOff(h_iepahbclk, CLK_OFF);

	OSAL_CCMU_CloseMclk(h_iepahbclk);
	OSAL_CCMU_CloseMclk(h_iepdramclk);
	OSAL_CCMU_CloseMclk(h_iepmclk);

	g_clk_status &= ~(CLK_IEP_AHB_ON | CLK_IEP_MOD_ON | CLK_IEP_DRAM_ON);
	return DIS_SUCCESS;
}
コード例 #11
0
ファイル: disp_clk.c プロジェクト: pocketbook/Platform_A13
__s32 tve_clk_exit(__u32 sel)
{
	if(sel == 0)
	{
		OSAL_CCMU_MclkOnOff(h_tvenc0ahbclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_tvenc0ahbclk);
		OSAL_CCMU_MclkReset(h_lcd0ch1mclk2, RST_VAILD);

		g_clk_status &= CLK_TVENC0_AHB_OFF;
	}
	else if(sel == 1)
	{
		OSAL_CCMU_MclkOnOff(h_tvenc1ahbclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_tvenc1ahbclk);

		g_clk_status &= CLK_TVENC1_AHB_OFF;
	}
	return DIS_SUCCESS;
}
コード例 #12
0
ファイル: disp_clk.c プロジェクト: pocketbook/Platform_A13
__s32 scaler_clk_exit(__u32 sel)
{		
	if(sel == 0)
	{
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_defe0mclk, RST_VAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_defe0ahbclk);
		OSAL_CCMU_CloseMclk(h_defe0dramclk);		
		OSAL_CCMU_CloseMclk(h_defe0mclk);
	
		g_clk_status &= (CLK_DEFE0_AHB_OFF & CLK_DEFE0_MOD_OFF & CLK_DEFE0_DRAM_OFF);
			
	}
	else if(sel == 1)
	{
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_defe1mclk, RST_VAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_defe1ahbclk);
		OSAL_CCMU_CloseMclk(h_defe1dramclk);		
		OSAL_CCMU_CloseMclk(h_defe1mclk);
	
		g_clk_status &= (CLK_DEFE1_AHB_OFF & CLK_DEFE1_MOD_OFF & CLK_DEFE1_DRAM_OFF);
	}
		
	return DIS_SUCCESS;
}
コード例 #13
0
__s32 image_clk_exit(__u32 sel)
{
	if (sel == 0) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe0mclk, RST_VALID);
#endif
		OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_debe0ahbclk);
		OSAL_CCMU_CloseMclk(h_debe0dramclk);
		OSAL_CCMU_CloseMclk(h_debe0mclk);

		g_clk_status &= ~(CLK_DEBE0_AHB_ON | CLK_DEBE0_MOD_ON |
				  CLK_DEBE0_DRAM_ON);
	} else if (sel == 1) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe1mclk, RST_VALID);
#endif
		OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_debe1ahbclk);
		OSAL_CCMU_CloseMclk(h_debe1dramclk);
		OSAL_CCMU_CloseMclk(h_debe1mclk);

		g_clk_status &= ~(CLK_DEBE1_AHB_ON | CLK_DEBE1_MOD_ON |
				  CLK_DEBE1_DRAM_ON);
	}

	return DIS_SUCCESS;
}
コード例 #14
0
ファイル: disp_hdmi.c プロジェクト: GREYFOXRGR/BPI-M3-bsp
static s32 hdmi_clk_config(struct disp_hdmi *hdmi)
{
	struct disp_hdmi_private_data *hdmip = disp_hdmi_get_priv(hdmi);
	if(!hdmi || !hdmip) {
	    DE_WRN("hdmi clk init null hdl!\n");
	    return DIS_FAIL;
	}

	//set hdmi clk
	hdmip->hdmi_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->hdmi_clk.clk);

	OSAL_CCMU_SetMclkFreq(hdmip->hdmi_clk.h_clk, hdmip->video_info->pixel_clk * (hdmip->video_info->avi_pr + 1));

	OSAL_CCMU_CloseMclk(hdmip->hdmi_clk.h_clk);

	//set lcd clk
	hdmip->lcd_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->lcd_clk.clk);
	OSAL_CCMU_SetMclkSrc(hdmip->lcd_clk.h_clk);
	OSAL_CCMU_SetMclkFreq(hdmip->lcd_clk.h_clk, hdmip->video_info->pixel_clk * (hdmip->video_info->avi_pr + 1));
	OSAL_CCMU_MclkOnOff(hdmip->lcd_clk.h_clk, CLK_ON);
	OSAL_CCMU_CloseMclk(hdmip->lcd_clk.h_clk);

	return 0;
}
コード例 #15
0
ファイル: iep_deu.c プロジェクト: dwlinux/a31_422_v33_lichee
__s32 deu_clk_exit(__u32 sel)
{
	if(!sel)
	{
		OSAL_CCMU_MclkReset(h_deumclk0, RST_VAILD);

		if(g_deu_clk_status & CLK_DEU0_DRAM_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deudramclk0, CLK_OFF);
		}

		if(g_deu_clk_status & CLK_DEU0_MOD_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_OFF);
		}

		if(g_deu_clk_status & CLK_DEU0_AHB_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_OFF);
		}

		OSAL_CCMU_CloseMclk(h_deuahbclk0);
	    OSAL_CCMU_CloseMclk(h_deudramclk0);
	    OSAL_CCMU_CloseMclk(h_deumclk0);

		g_deu_clk_status &= (CLK_DEU0_AHB_OFF & CLK_DEU0_MOD_OFF & CLK_DEU0_DRAM_OFF);
	}
	else
	{
		OSAL_CCMU_MclkReset(h_deumclk1, RST_VAILD);

		if(g_deu_clk_status & CLK_DEU1_DRAM_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deudramclk1, CLK_OFF);
		}

		if(g_deu_clk_status & CLK_DEU1_MOD_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_OFF);
		}

		if(g_deu_clk_status & CLK_DEU1_AHB_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_OFF);
		}

		OSAL_CCMU_CloseMclk(h_deuahbclk1);
	    OSAL_CCMU_CloseMclk(h_deudramclk1);
	    OSAL_CCMU_CloseMclk(h_deumclk1);

		g_deu_clk_status &= (CLK_DEU1_AHB_OFF & CLK_DEU1_MOD_OFF & CLK_DEU1_DRAM_OFF);
	}
    return DIS_SUCCESS;
}
コード例 #16
0
ファイル: disp_hdmi.c プロジェクト: GREYFOXRGR/BPI-M3-bsp
static s32 hdmi_clk_disable(struct disp_hdmi *hdmi)
{
	struct disp_hdmi_private_data *hdmip = disp_hdmi_get_priv(hdmi);
	if(!hdmi || !hdmip) {
	    DE_WRN("hdmi clk init null hdl!\n");
	    return DIS_FAIL;
	}

	disp_al_hdmi_disable(hdmi->channel_id);

	hdmip->lcd_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->lcd_clk.clk);
	OSAL_CCMU_MclkOnOff(hdmip->lcd_clk.h_clk, CLK_OFF);
	OSAL_CCMU_CloseMclk(hdmip->lcd_clk.h_clk);

	if(hdmip->drc_clk.clk)
		disp_al_hdmi_clk_disable(hdmip->drc_clk.clk);

	return 0;
}
コード例 #17
0
ファイル: iep_drc.c プロジェクト: Aorjoa/bootloader
__s32 drc_clk_exit(__u32 sel)
{
	if(!sel) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_drcmclk0, RST_VAILD);
#endif

		if(g_drc_clk_status & CLK_DRC0_DRAM_ON) {
			OSAL_CCMU_MclkOnOff(h_drcdramclk0, CLK_OFF);
		}

		if(g_drc_clk_status & CLK_DRC0_MOD_ON) {
			OSAL_CCMU_MclkOnOff(h_drcmclk0, CLK_OFF);
		}

		if(g_drc_clk_status & CLK_DRC0_AHB_ON) {
			OSAL_CCMU_MclkOnOff(h_drcahbclk0, CLK_OFF);
		}

		OSAL_CCMU_CloseMclk(h_drcahbclk0);
		OSAL_CCMU_CloseMclk(h_drcdramclk0);
		OSAL_CCMU_CloseMclk(h_drcmclk0);
		g_drc_clk_status &= (CLK_DRC0_AHB_OFF & CLK_DRC0_MOD_OFF & CLK_DRC0_DRAM_OFF);
	} else {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_drcmclk1, RST_VAILD);
#endif

		if(g_drc_clk_status & CLK_DRC1_DRAM_ON) {
			OSAL_CCMU_MclkOnOff(h_drcdramclk1, CLK_OFF);
		}

		if(g_drc_clk_status & CLK_DRC1_MOD_ON) {
			OSAL_CCMU_MclkOnOff(h_drcmclk1, CLK_OFF);
		}

		if(g_drc_clk_status & CLK_DRC1_AHB_ON) {
			OSAL_CCMU_MclkOnOff(h_drcahbclk1, CLK_OFF);
		}

		OSAL_CCMU_CloseMclk(h_drcahbclk1);
		OSAL_CCMU_CloseMclk(h_drcdramclk1);
		OSAL_CCMU_CloseMclk(h_drcmclk1);
		g_drc_clk_status &= (CLK_DRC1_AHB_OFF & CLK_DRC1_MOD_OFF & CLK_DRC1_DRAM_OFF);
	}
    return DIS_SUCCESS;
}