void main (void) { Init(); // Init periphery OS_Init(); // Init OS OS_Task_Create(0, Task_Rolling); // Create tasks. OS_Task_Create(0, Task_SetSpeed); // OS_Task_Create(0, Task_Button); // // Starting values: m_ucPosition = 0; // rotation phase m_scDirection = 1; // dircetion OS_EI(); // Enable interrupts OS_Run(); // Running scheduler }
BOOL OS_Read(FIFO f, int *val) { fifo_t *fifo = &Fifos[f]; BOOL I; /* If there is nothing in the FIFO, fail at reading */ if(!fifo->nElems) { return FALSE; } I = CheckInterruptMask(); if (!I) { OS_DI(); } *val = fifo->elems[fifo->read]; /* Circularly increment the read position */ incrementFifoRead(fifo); fifo->nElems--; if (!I) { OS_EI(); } return TRUE; }
void OS_Write(FIFO f, int val) { fifo_t *fifo; BOOL I; fifo = &Fifos[f]; I = CheckInterruptMask(); OS_DI(); fifo->elems[fifo->write] = val; /* Increment the write counter. */ incrementFifoWrite(fifo); if(fifo->nElems >= FIFOSIZE) { incrementFifoRead(fifo); } else { fifo->nElems++; } if (!I) { OS_EI(); } }
FIFO OS_InitFiFo() { int i; FIFO id = INVALIDFIFO; BOOL I; I = CheckInterruptMask(); if (!I) { OS_DI(); } for(i = 0; i < MAXFIFO; i++) { if(INVALIDFIFO == Fifos[i].fid) { Fifos[i].fid = id = i + 1; Fifos[i].write = 0; Fifos[i].read = 0; Fifos[i].nElems = 0; break; } } if (!I) { OS_EI(); } return id; }
//**************************************************************************** //**** main //**************************************************************************** void main(void){ Inicio(); OS_Init(); // Init OS OS_Task_Define(USB); // Define tasks. OS_Task_Define(Gla); OS_Task_Define(Glc_PIDdiscreto); OS_Task_Define(MotorX); OS_Task_Define(MotorY); OS_Task_Define(MotorZ); OS_Task_Define(MotorE); // Create tasks. // if 0 = no priorities OS_Task_Create(0, USB); OS_Task_Create(0, Gla); OS_Task_Create(0, Glc_PIDdiscreto); OS_Task_Create(0, MotorX); OS_Task_Create(0, MotorY); OS_Task_Create(0, MotorZ); OS_Task_Create(0, MotorE); // Create tasks, Task priority. Allowed values from 0(highest) to 7(lowest) /*OS_Task_Create(0, USB); OS_Task_Create(7, Gla); OS_Task_Create(1, Glc_PIDdiscreto); OS_Task_Create(2, MotorX); OS_Task_Create(2, MotorY); OS_Task_Create(2, MotorZ); OS_Task_Create(2, MotorE); OS_Bsem_Set(BS_GLAGLC_FREE);*/ OS_EI(); // Enable interrupts OS_Run(); // Running scheduler }
/*------------------------------------------- | Name : dev_at91sam9261_uart_x_read | Description: Called by Read Posix interface | Parameters : desc : descriptor | buf : pointer on read buffer | size : size | Return Type: integer cb: number of bytes readed | Comments : - | See : - ---------------------------------------------*/ int dev_at91sam9261_uart_x_read(desc_t desc, char* buf,int size) { board_inf_uart_t *p_inf_uart = (board_inf_uart_t *)ofile_lst[desc].p; AT91_REG *p_adr = (AT91_REG *)p_inf_uart->base_adr; int r = p_inf_uart->input_r; int _buf_in_rcv_no = p_inf_uart->buf_in_rcv_no; int _buf_in_dma_no = -1; int cb = 0, w; kernel_pthread_mutex_lock (&p_inf_uart->mutex); #if defined(__KERNEL_UCORE_EMBOS) || defined(__KERNEL_UCORE_FREERTOS) OS_DI(); #elif defined(__KERNEL_UCORE_ECOS) __clr_irq(); #endif _buf_in_dma_no = p_inf_uart->buf_in_dma_no; //p_inf_uart->buf_in_rcv_no; #if defined(__KERNEL_UCORE_EMBOS) || defined(__KERNEL_UCORE_FREERTOS) OS_EI(); #elif defined(__KERNEL_UCORE_ECOS) __set_irq(); #endif do { w=0; if ( !p_inf_uart->fifo_buf_pool[_buf_in_rcv_no].cb || cb == size) break; w = (size < (cb + p_inf_uart->fifo_buf_pool[_buf_in_rcv_no].cb) ? (size-cb) : p_inf_uart->fifo_buf_pool[_buf_in_rcv_no].cb); memcpy (buf+cb, p_inf_uart->fifo_buf_pool[_buf_in_rcv_no].p, w); cb += w; p_inf_uart->fifo_buf_pool[_buf_in_rcv_no].cb -= w; p_inf_uart->fifo_buf_pool[_buf_in_rcv_no].p += w; if (p_inf_uart->fifo_buf_pool[_buf_in_rcv_no].cb <= 0) { p_inf_uart->fifo_buf_pool[_buf_in_rcv_no].p = (uchar8_t *)&p_inf_uart->fifo_input_buffer[ _buf_in_rcv_no*MAX_POOL_BUF_SZ]; _buf_in_rcv_no = ((_buf_in_rcv_no+1)&(~MAX_POOL)); } } while( _buf_in_rcv_no != _buf_in_dma_no); //si tout à été lu reconnecter la reception si au cas elle à été deconnecté if((_buf_in_rcv_no==_buf_in_dma_no)&&p_inf_uart->fifo_buf_pool[_buf_in_rcv_no].cb==0) { *(p_adr+US_CR) = AT91C_US_RXEN; p_inf_uart->flag_overrun = 0; } #if defined(__KERNEL_UCORE_EMBOS) || defined(__KERNEL_UCORE_FREERTOS) OS_DI(); #elif defined(__KERNEL_UCORE_ECOS) __clr_irq(); #endif p_inf_uart->input_r = ((p_inf_uart->input_r+cb) & (~UART_FIFO_INPUT_BUFFER_SZ)); p_inf_uart->buf_in_rcv_no = _buf_in_rcv_no; #if defined(__KERNEL_UCORE_EMBOS) || defined(__KERNEL_UCORE_FREERTOS) OS_EI(); #elif defined(__KERNEL_UCORE_ECOS) __set_irq(); #endif kernel_pthread_mutex_unlock (&p_inf_uart->mutex); return cb; }