int OpTas(int op, int gen_special) { int ea=0; int use=0; ea=op&0x003f; // See if we can do this opcode: if (EaCanWrite(ea)==0 || EaAn(ea)) return 1; use=OpBase(op,0); if (op!=use) { OpUse(op,use); return 0; } // Use existing handler if (!gen_special) OpStart(op,ea); else ot("Op%.4x_%s\n", op, ms?"":":"); Cycles=4; if(ea>=8) Cycles+=10; EaCalc (11,0x003f,ea,0,1); EaRead (11, 1,ea,0,0x003f,1); ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); OpGetFlags(0,0); ot("\n"); #if CYCLONE_FOR_GENESIS // the original Sega hardware ignores write-back phase (to memory only) if (ea < 0x10 || gen_special) { #endif ot(" orr r1,r1,#0x80000000 ;@ set bit7\n"); EaWrite(11, 1,ea,0,0x003f,1); #if CYCLONE_FOR_GENESIS } #endif OpEnd(ea); #if (CYCLONE_FOR_GENESIS == 2) if (!gen_special && ea >= 0x10) { OpTas(op, 1); } #endif return 0; }
// --------------------- Opcodes 0x4840+ --------------------- // Swap, 01001000 01000nnn swap Dn int OpSwap(int op) { int ea=0,use=0; ea=op&7; use=op&~0x0007; // Use same opcode for all An if (op!=use) { OpUse(op,use); return 0; } // Use existing handler OpStart(op); Cycles=4; EaCalc (11,0x0007,ea,2,1); EaRead (11, 0,ea,2,0x0007,1); ot(" mov r1,r0,ror #16\n"); ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); OpGetFlags(0,0); EaWrite(11, 1,8,2,0x0007,1); OpEnd(); return 0; }
// Emit a Asr/Lsr/Roxr/Ror opcode static int EmitAsr(int op,int type,int dir,int count,int size,int usereg) { char pct[8]=""; // count int shift=32-(8<<size); if (count>=1) sprintf(pct,"#%d",count); // Fixed count if (usereg) { ot(";@ Use Dn for count:\n"); ot(" and r2,r8,#0x0e00\n"); ot(" ldr r2,[r7,r2,lsr #7]\n"); ot(" and r2,r2,#63\n"); ot("\n"); strcpy(pct,"r2"); } else if (count<0) { ot(" mov r2,r8,lsr #9 ;@ Get 'n'\n"); ot(" and r2,r2,#7\n\n"); strcpy(pct,"r2"); } // Take 2*n cycles: if (count<0) ot(" sub r5,r5,r2,asl #1 ;@ Take 2*n cycles\n\n"); else Cycles+=count<<1; if (type<2) { // Asr/Lsr if (dir==0 && size<2) { ot(";@ For shift right, use loworder bits for the operation:\n"); ot(" mov r0,r0,%s #%d\n",type?"lsr":"asr",32-(8<<size)); ot("\n"); } if (type==0 && dir) ot(" adds r3,r0,#0 ;@ save old value for V flag calculation, also clear V\n"); ot(";@ Shift register:\n"); if (type==0) ot(" movs r0,r0,%s %s\n",dir?"asl":"asr",pct); if (type==1) ot(" movs r0,r0,%s %s\n",dir?"lsl":"lsr",pct); OpGetFlags(0,0); if (usereg) { // store X only if count is not 0 ot(" cmp %s,#0 ;@ shifting by 0?\n",pct); ot(" biceq r10,r10,#0x20000000 ;@ if so, clear carry\n"); ot(" strne r10,[r7,#0x4c] ;@ else Save X bit\n"); } else { // count will never be 0 if we use immediate ot(" str r10,[r7,#0x4c] ;@ Save X bit\n"); } ot("\n"); if (dir==0 && size<2) { ot(";@ restore after right shift:\n"); ot(" movs r0,r0,lsl #%d\n",32-(8<<size)); if (type) ot(" orrmi r10,r10,#0x80000000 ;@ Potentially missed N flag\n"); ot("\n"); } if (type==0 && dir) { ot(";@ calculate V flag (set if sign bit changes at anytime):\n"); ot(" mov r1,#0x80000000\n"); ot(" ands r3,r3,r1,asr %s\n", pct); ot(" cmpne r3,r1,asr %s\n", pct); ot(" eoreq r1,r0,r3\n"); // above check doesn't catch (-1)<<(32+), so we need this ot(" tsteq r1,#0x80000000\n"); ot(" orrne r10,r10,#0x10000000\n"); ot("\n"); } } // -------------------------------------- if (type==2) { int wide=8<<size; // Roxr if(count == 1) { if(dir==0) { if(size!=2) { ot(" orr r0,r0,r0,lsr #%i\n", size?16:24); ot(" bic r0,r0,#0x%x\n", 1<<(32-wide)); } GetXBit(0); ot(" movs r0,r0,rrx\n"); OpGetFlags(0,1); } else { ot(" ldr r3,[r7,#0x4c]\n"); ot(" movs r0,r0,lsl #1\n"); OpGetFlags(0,1); ot(" tst r3,#0x20000000\n"); ot(" orrne r0,r0,#0x%x\n", 1<<(32-wide)); ot(" bicne r10,r10,#0x40000000 ;@ clear Z in case it got there\n"); } ot(" bic r10,r10,#0x10000000 ;@ make suve V is clear\n"); return 0; } if (usereg) { if (size==2) { ot(" subs r2,r2,#33\n"); ot(" addmis r2,r2,#33 ;@ Now r2=0-%d\n",wide); } else { ot(";@ Reduce r2 until <0:\n"); ot("Reduce_%.4x%s\n",op,ms?"":":"); ot(" subs r2,r2,#%d\n",wide+1); ot(" bpl Reduce_%.4x\n",op); ot(" adds r2,r2,#%d ;@ Now r2=0-%d\n",wide+1,wide); } ot(" beq norotx_%.4x\n",op); ot("\n"); } if (usereg||count < 0) { if (dir) ot(" rsb r2,r2,#%d ;@ Reverse direction\n",wide+1); } else { if (dir) ot(" mov r2,#%d ;@ Reversed\n",wide+1-count); else ot(" mov r2,#%d\n",count); } if (shift) ot(" mov r0,r0,lsr #%d ;@ Shift down\n",shift); ot("\n"); ot(";@ First get X bit (middle):\n"); ot(" ldr r3,[r7,#0x4c]\n"); ot(" rsb r1,r2,#%d\n",wide); ot(" and r3,r3,#0x20000000\n"); ot(" mov r3,r3,lsr #29\n"); ot(" mov r3,r3,lsl r1\n"); ot(";@ Rotate bits:\n"); ot(" orr r3,r3,r0,lsr r2 ;@ Orr right part\n"); ot(" rsbs r2,r2,#%d ;@ should also clear ARM V\n",wide+1); ot(" orrs r0,r3,r0,lsl r2 ;@ Orr left part, set flags\n"); ot("\n"); if (shift) ot(" movs r0,r0,lsl #%d ;@ Shift up and get correct NC flags\n",shift); OpGetFlags(0,!usereg); if (usereg) { // store X only if count is not 0 ot(" str r10,[r7,#0x4c] ;@ if not 0, Save X bit\n"); ot(" b nozerox%.4x\n",op); ot("norotx_%.4x%s\n",op,ms?"":":"); ot(" ldr r2,[r7,#0x4c]\n"); ot(" adds r0,r0,#0 ;@ Define flags\n"); OpGetFlagsNZ(0); ot(" and r2,r2,#0x20000000\n"); ot(" orr r10,r10,r2 ;@ C = old_X\n"); ot("nozerox%.4x%s\n",op,ms?"":":"); } ot("\n"); } // -------------------------------------- if (type==3) { // Ror if (size<2) { ot(";@ Mirror value in whole 32 bits:\n"); if (size<=0) ot(" orr r0,r0,r0,lsr #8\n"); if (size<=1) ot(" orr r0,r0,r0,lsr #16\n"); ot("\n"); } ot(";@ Rotate register:\n"); if (!dir) ot(" adds r0,r0,#0 ;@ first clear V and C\n"); // ARM does not clear C if rot count is 0 if (count<0) { if (dir) ot(" rsb %s,%s,#32\n",pct,pct); ot(" movs r0,r0,ror %s\n",pct); } else { int ror=count; if (dir) ror=32-ror; if (ror&31) ot(" movs r0,r0,ror #%d\n",ror); } OpGetFlags(0,0); if (dir) { ot(" bic r10,r10,#0x30000000 ;@ clear CV\n"); ot(";@ Get carry bit from bit 0:\n"); if (usereg) { ot(" cmp %s,#32 ;@ rotating by 0?\n",pct); ot(" tstne r0,#1 ;@ no, check bit 0\n"); } else ot(" tst r0,#1\n"); ot(" orrne r10,r10,#0x20000000\n"); } ot("\n"); } // -------------------------------------- return 0; }
// --------------------- Opcodes 0x4000+ --------------------- int OpNeg(int op) { // 01000tt0 xxeeeeee (tt=negx/clr/neg/not, xx=size, eeeeee=EA) int type=0,size=0,ea=0,use=0; type=(op>>9)&3; ea =op&0x003f; size=(op>>6)&3; if (size>=3) return 1; // See if we can do this opcode: if (EaCanRead (ea,size)==0||EaAn(ea)) return 1; if (EaCanWrite(ea )==0) return 1; use=OpBase(op,size); if (op!=use) { OpUse(op,use); return 0; } // Use existing handler OpStart(op,ea); Cycles=size<2?4:6; if(ea >= 0x10) Cycles*=2; EaCalc (11,0x003f,ea,size,earwt_msb_dont_care); if (type!=1) EaRead (11,0,ea,size,0x003f,earwt_msb_dont_care); // Don't need to read for 'clr' (or do we, for a dummy read?) if (type==1) ot("\n"); if (type==0) { ot(";@ Negx:\n"); GetXBit(1); if(size!=2) ot(" mov r0,r0,asl #%i\n",size?16:24); ot(" rscs r1,r0,#0 ;@ do arithmetic\n"); ot(" orr r3,r10,#0xb0000000 ;@ for old Z\n"); OpGetFlags(1,1,0); if(size!=2) { ot(" movs r1,r1,asr #%i\n",size?16:24); ot(" orreq r10,r10,#0x40000000 ;@ possily missed Z\n"); } ot(" andeq r10,r10,r3 ;@ fix Z\n"); ot("\n"); } if (type==1) { ot(";@ Clear:\n"); ot(" mov r1,#0\n"); ot(" mov r10,#0x40000000 ;@ NZCV=0100\n"); ot("\n"); } if (type==2) { ot(";@ Neg:\n"); if(size!=2) ot(" mov r0,r0,asl #%i\n",size?16:24); ot(" rsbs r1,r0,#0\n"); OpGetFlags(1,1); if(size!=2) ot(" mov r1,r1,asr #%i\n",size?16:24); ot("\n"); } if (type==3) { ot(";@ Not:\n"); if(size!=2) { ot(" mov r0,r0,asl #%i\n",size?16:24); ot(" mvns r1,r0,asr #%i\n",size?16:24); } else ot(" mvns r1,r0\n"); OpGetFlagsNZ(1); ot("\n"); } if (type==1) eawrite_check_addrerr=1; EaWrite(11, 1,ea,size,0x003f,earwt_msb_dont_care); OpEnd(ea); return 0; }
// --------------------- Opcodes 0x5000+ --------------------- int OpAddq(int op) { // 0101nnnt xxeeeeee (nnn=#8,1-7 t=addq/subq xx=size, eeeeee=EA) int num=0,type=0,size=0,ea=0; int use=0; char count[16]=""; int shift=0; num =(op>>9)&7; if (num==0) num=8; type=(op>>8)&1; size=(op>>6)&3; if (size>=3) return 1; ea = op&0x3f; // See if we can do this opcode: if (EaCanRead (ea,size)==0) return 1; if (EaCanWrite(ea) ==0) return 1; if (size == 0 && EaAn(ea) ) return 1; use=OpBase(op,size,1); if (num!=8) use|=0x0e00; // If num is not 8, use same handler if (op!=use) { OpUse(op,use); return 0; } // Use existing handler OpStart(op,ea); Cycles=ea<8?4:8; if(type==0&&size==1) Cycles=ea<0x10?4:8; if(size>=2) Cycles=ea<0x10?8:12; if (size>0 && (ea&0x38)==0x08) size=2; // addq.w #n,An is also 32-bit EaCalcReadNoSE(10,0,ea,size,0x003f); shift=32-(8<<size); if (num!=8) { int lsr=9-shift; ot(" and r2,r8,#0x0e00 ;@ Get quick value\n"); if (lsr>=0) sprintf(count,"r2,lsr #%d", lsr); else sprintf(count,"r2,lsl #%d", -lsr); ot("\n"); } else { sprintf(count,"#0x%.4x",8<<shift); } if (size<2) ot(" mov r0,r0,asl #%d\n\n",size?16:24); if (type==0) ot(" adds r1,r0,%s\n",count); if (type==1) ot(" subs r1,r0,%s\n",count); if ((ea&0x38)!=0x08) OpGetFlags(type,1); ot("\n"); EaWrite(10, 1, ea,size,0x003f,1); OpEnd(ea); return 0; }
// --------------------- Opcodes 0x0000+ --------------------- // Emit an Ori/And/Sub/Add/Eor/Cmp Immediate opcode, 0000ttt0 ssaaaaaa int OpArith(int op) { int type=0,size=0; int sea=0,tea=0; int use=0; char *shiftstr=""; // Get source and target EA type=(op>>9)&7; if (type==4 || type>=7) return 1; size=(op>>6)&3; if (size>=3) return 1; sea= 0x003c; tea=op&0x003f; // See if we can do this opcode: if (EaCanRead(tea,size)==0) return 1; if (EaCanWrite(tea)==0 || EaAn(tea)) return 1; use=OpBase(op,size); if (op!=use) { OpUse(op,use); return 0; } // Use existing handler OpStart(op, sea, tea); Cycles=4; // imm must be read first EaCalcReadNoSE(-1,10,sea,size,0); EaCalcReadNoSE((type!=6)?11:-1,0,tea,size,0x003f); if (size<2) shiftstr=(char *)(size?",asl #16":",asl #24"); if (size<2) ot(" mov r10,r10,asl #%i\n",size?16:24); ot(";@ Do arithmetic:\n"); if (type==0) ot(" orr r1,r10,r0%s\n",shiftstr); if (type==1) ot(" and r1,r10,r0%s\n",shiftstr); if (type==2||type==6) ot(" rsbs r1,r10,r0%s ;@ Defines NZCV\n",shiftstr); if (type==3) ot(" adds r1,r10,r0%s ;@ Defines NZCV\n",shiftstr); if (type==5) ot(" eor r1,r10,r0%s\n",shiftstr); if (type<2 || type==5) ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); // 0,1,5 if (type< 2) OpGetFlags(0,0); // Ori/And if (type==2) OpGetFlags(1,1); // Sub: Subtract/X-bit if (type==3) OpGetFlags(0,1); // Add: X-bit if (type==5) OpGetFlags(0,0); // Eor if (type==6) OpGetFlags(1,0); // Cmp: Subtract ot("\n"); if (type!=6) { EaWrite(11, 1, tea,size,0x003f,1); } // Correct cycles: if (type==6) { if (size>=2 && tea<0x10) Cycles+=2; } else { if (size>=2) Cycles+=4; if (tea>=8) Cycles+=4; if (type==1 && size>=2 && tea<8) Cycles-=2; } OpEnd(sea,tea); return 0; }
// --------------------- Opcodes 0x80c0+ --------------------- int OpMul(int op) { // Div/Mul: 1m00nnns 11eeeeee (m=Mul, nnn=Register Dn, s=signed, eeeeee=EA) int type=0,rea=0,sign=0,ea=0; int use=0; type=(op>>14)&1; // div/mul rea =(op>> 9)&7; sign=(op>> 8)&1; ea = op&0x3f; // See if we can do this opcode: if (EaCanRead(ea,1)==0||EaAn(ea)) return 1; use=OpBase(op,1); use&=~0x0e00; // Use same for all registers if (op!=use) { OpUse(op,use); return 0; } // Use existing handler OpStart(op,ea); if(type) Cycles=54; else Cycles=sign?158:140; EaCalcReadNoSE(-1,0,ea,1,0x003f); EaCalc(10,0x0e00,rea, 2); EaRead(10, 2,rea, 2,0x0e00); ot(" movs r1,r0,asl #16\n"); if (type==0) // div { // the manual says C is always cleared, but neither Musashi nor FAME do that //ot(" bic r9,r9,#0x20000000 ;@ always clear C\n"); ot(" beq divzero%.4x ;@ division by zero\n",op); ot("\n"); if (sign) { ot(" mov r11,#0 ;@ r11 = 1 or 2 if the result is negative\n"); ot(" tst r2,r2\n"); ot(" orrmi r11,r11,#2\n"); ot(" rsbmi r2,r2,#0 ;@ Make r2 positive\n"); ot("\n"); ot(" movs r0,r1,asr #16\n"); ot(" orrmi r11,r11,#1\n"); ot(" rsbmi r0,r0,#0 ;@ Make r0 positive\n"); ot("\n"); ot(";@ detect the nasty 0x80000000 / -1 situation\n"); ot(" mov r3,r2,asr #31\n"); ot(" eors r3,r3,r1,asr #16\n"); ot(" beq wrendofop%.4x\n",op); } else { ot(" mov r0,r1,lsr #16 ;@ use only 16 bits of divisor\n"); } ot("\n"); ot(";@ Divide r2 by r0\n"); ot(" mov r3,#0\n"); ot(" mov r1,r0\n"); ot("\n"); ot(";@ Shift up divisor till it's just less than numerator\n"); ot("Shift%.4x%s\n",op,ms?"":":"); ot(" cmp r1,r2,lsr #1\n"); ot(" movls r1,r1,lsl #1\n"); ot(" bcc Shift%.4x\n",op); ot("\n"); ot("Divide%.4x%s\n",op,ms?"":":"); ot(" cmp r2,r1\n"); ot(" adc r3,r3,r3 ;@ Double r3 and add 1 if carry set\n"); ot(" subcs r2,r2,r1\n"); ot(" teq r1,r0\n"); ot(" movne r1,r1,lsr #1\n"); ot(" bne Divide%.4x\n",op); ot("\n"); ot(";@r3==quotient,r2==remainder\n"); if (sign) { // sign correction ot(" and r1,r11,#1\n"); ot(" teq r1,r11,lsr #1\n"); ot(" rsbne r3,r3,#0 ;@ negate if quotient is negative\n"); ot(" tst r11,#2\n"); ot(" rsbne r2,r2,#0 ;@ negate the remainder if divident was negative\n"); ot("\n"); // signed overflow check ot(" mov r1,r3,asl #16\n"); ot(" cmp r3,r1,asr #16 ;@ signed overflow?\n"); ot(" orrne r9,r9,#0x10000000 ;@ set overflow flag\n"); ot(" bne endofop%.4x ;@ overflow!\n",op); ot("\n"); ot("wrendofop%.4x%s\n",op,ms?"":":"); } else { // overflow check ot(" movs r1,r3,lsr #16 ;@ check for overflow condition\n"); ot(" orrne r9,r9,#0x10000000 ;@ set overflow flag\n"); ot(" bne endofop%.4x ;@ overflow!\n",op); ot("\n"); } ot(" mov r1,r3,lsl #16 ;@ Clip to 16-bits\n"); ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); OpGetFlags(0,0); ot(" mov r1,r1,lsr #16\n"); ot(" orr r1,r1,r2,lsl #16 ;@ Insert remainder\n"); } if (type==1) { ot(";@ Get 16-bit signs right:\n"); ot(" mov r0,r1,%s #16\n",sign?"asr":"lsr"); ot(" mov r2,r2,lsl #16\n"); ot(" mov r2,r2,%s #16\n",sign?"asr":"lsr"); ot("\n"); ot(" mul r1,r2,r0\n"); ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); OpGetFlags(0,0); } ot("\n"); EaWrite(10, 1,rea, 2,0x0e00,1); if (type==0) ot("endofop%.4x%s\n",op,ms?"":":"); OpEnd(ea); if (type==0) // div { ot("divzero%.4x%s\n",op,ms?"":":"); ot(" mov r0,#5 ;@ Divide by zero\n"); ot(" bl Exception\n"); Cycles+=38; OpEnd(ea); ot("\n"); } return 0; }
// --------------------- Opcodes 0x8000+ --------------------- // 1t0tnnnd xxeeeeee (tt=type:or/sub/and/add xx=size, eeeeee=EA) int OpArithReg(int op) { int use=0; int type=0,size=0,dir=0,rea=0,ea=0; char *asl=""; char *strop=0; type=(op>>12)&5; rea =(op>> 9)&7; dir =(op>> 8)&1; // er,re size=(op>> 6)&3; if (size>=3) return 1; ea = op&0x3f; if (dir && ea<0x10) return 1; // addx/subx opcode // See if we can do this opcode: if (dir==0 && EaCanRead (ea,size)==0) return 1; if (dir && EaCanWrite(ea)==0) return 1; if ((size==0||!(type&1))&&EaAn(ea)) return 1; use=OpBase(op,size); use&=~0x0e00; // Use same opcode for Dn if (op!=use) { OpUse(op,use); return 0; } // Use existing handler OpStart(op,ea); Cycles=4; EaCalcReadNoSE(dir?10:-1,0,ea,size,0x003f); EaCalcReadNoSE(dir?-1:10,1,rea,size,0x0e00); ot(";@ Do arithmetic:\n"); if (type==0) strop = "orr"; if (type==1) strop = (char *) (dir ? "subs" : "rsbs"); if (type==4) strop = "and"; if (type==5) strop = "adds"; if (size==0) asl=",asl #24"; if (size==1) asl=",asl #16"; if (size<2) ot(" mov r0,r0%s\n",asl); ot(" %s r1,r0,r1%s\n",strop,asl); if ((type&1)==0) ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); OpGetFlags(type==1,type&1); // 1==subtract ot("\n"); ot(";@ Save result:\n"); if (size<2) ot(" mov r1,r1,asr #%d\n",size?16:24); if (dir) EaWrite(10, 1, ea,size,0x003f,0,0); else EaWrite(10, 1,rea,size,0x0e00,0,0); if(rea==ea) { if(ea<8) Cycles=(size>=2)?8:4; else Cycles+=(size>=2)?26:14; } else if(dir) { Cycles+=4; if(size>=2) Cycles+=4; } else { if(size>=2) { Cycles+=2; if(ea<0x10||ea==0x3c) Cycles+=2; } } OpEnd(ea); return 0; }