/**
* @brief Performs CCA twice
*/
static uint8_t perform_cca_twice(void)
{
uint8_t cca_status;
uint8_t cca_done;
uint8_t CW = 2;
uint32_t now_time_us;
do
{
pal_get_current_time(&now_time_us);
} while (pal_add_time_us(now_time_us, (SLEEP_TO_TRX_OFF_US + CCA_PREPARATION_DURATION_US)) <
cca_starttime_us);
#ifndef RFD
if (tal_beacon_transmission)
{
#if (DEBUG > 0)
ASSERT("Ongoing beacon transmission, slotted CSMA busy" == 0);
#endif
return PHY_BUSY;
}
#endif
// Ensure that trx is at least in TRX_OFF mode at this time.
if (tal_trx_status == TRX_SLEEP)
{
set_trx_state(CMD_TRX_OFF);
}
do
{
pal_get_current_time(&now_time_us);
} while (pal_add_time_us(now_time_us, (PLL_LOCK_TIME_US + CCA_PREPARATION_DURATION_US)) <
cca_starttime_us);
/*
* Set trx to PLL_ON.
* If trx is busy and trx cannot be set to PLL_ON, assess channel as busy.
*/
if (set_trx_state(CMD_PLL_ON) != PLL_ON)
{
return PHY_BUSY;
}
// no interest in receiving frames while doing CCA
pal_trx_bit_write(SR_RX_PDT_DIS, RX_DISABLE); // disable frame reception indication
// do CCA twice
do
{
// wait here until 16us before backoff boundary
// assume TRX is in PLL_ON
do
{
pal_get_current_time(&now_time_us);
} while (pal_add_time_us(now_time_us, CCA_PRE_START_DURATION_US) <
cca_starttime_us);
pal_trx_reg_write(RG_TRX_STATE, CMD_RX_ON);
// debug pin to switch on: define ENABLE_DEBUG_PINS, pal_config.h
PIN_CCA_START();
/* Start CCA */
pal_trx_bit_write(SR_CCA_REQUEST, CCA_START);
// wait until CCA is done and get status
pal_timer_delay(TAL_CONVERT_SYMBOLS_TO_US(CCA_DURATION_SYM));
do
{
// poll until CCA is really done;
cca_done = pal_trx_bit_read(SR_CCA_DONE);
} while (cca_done != CCA_DETECTION_DONE);
// between both CCA switch trx to PLL_ON to reduce power consumption
pal_trx_reg_write(RG_TRX_STATE, CMD_PLL_ON);
// debug pin to switch on: define ENABLE_DEBUG_PINS, pal_config.h
PIN_CCA_END();
// check if channel was idle or busy
if (pal_trx_bit_read(SR_CCA_STATUS) == CCA_STATUS_CHANNEL_IS_IDLE)
{
// do next CCA at next backoff boundary
cca_starttime_us = pal_add_time_us(cca_starttime_us,
TAL_CONVERT_SYMBOLS_TO_US(aUnitBackoffPeriod));
CW--;
cca_status = PHY_IDLE;
}
else // PHY busy
{
cca_status = PHY_BUSY;
break; // if channel is busy do no do CCA for the second time
}
}
while (CW > 0);
/*
* Keep trx ready for transmission if channel is idle.
* The transceiver is still in PLL_ON.
* If the channel is not idle, the trx handling is done in csma_backoff().
*/
/*
* Clear CCA interrupt flag.
* This is only necessary for debugging, because only in debug mode
* interrupt that are not handled cause an assert in the ISR.
*/
#if (DEBUG > 0)
pal_trx_reg_read(RG_IRQ_STATUS);
#endif
/*
* Since we are not interested in any frames that might be received
* during CCA, reject any information that indicates a previous frame
* reception.
*/
pal_trx_bit_write(SR_RX_PDT_DIS, RX_ENABLE); // enable frame reception indication
return cca_status;
}
/**
* \brief Performs CCA twice
*/
static uint8_t perform_cca_twice(void)
{
uint8_t cca_status;
uint8_t cca_done;
uint8_t CW = 2;
uint32_t now_time_us;
do {
pal_get_current_time(&now_time_us);
} while (pal_add_time_us(now_time_us,
(SLEEP_TO_TRX_OFF_TYP_US +
CCA_PREPARATION_DURATION_US)) <
cca_starttime_us);
#if ((MAC_START_REQUEST_CONFIRM == 1) && (defined BEACON_SUPPORT))
if (tal_beacon_transmission) {
#if (_DEBUG_ > 0)
Assert("Ongoing beacon transmission, slotted CSMA busy" == 0);
#endif
return PHY_BUSY;
}
#endif /* ((MAC_START_REQUEST_CONFIRM == 1) && (defined BEACON_SUPPORT)) */
/* Ensure that trx is at least in TRX_OFF mode at this time. */
if (tal_trx_status == TRX_SLEEP) {
set_trx_state(CMD_TRX_OFF);
}
do {
pal_get_current_time(&now_time_us);
} while (pal_add_time_us(now_time_us,
(TRX_OFF_TO_PLL_ON_TIME_US +
CCA_PREPARATION_DURATION_US)) <
cca_starttime_us);
/*
* Set trx to PLL_ON.
* If trx is busy and trx cannot be set to PLL_ON, assess channel as
* busy.
*/
if (set_trx_state(CMD_PLL_ON) != PLL_ON) {
return PHY_BUSY;
}
/* no interest in receiving frames while doing CCA */
trx_bit_write(SR_RX_PDT_DIS, RX_DISABLE); /* disable frame reception
* indication */
/* do CCA twice */
do {
/* wait here until 16us before backoff boundary */
/* assume TRX is in PLL_ON */
do {
pal_get_current_time(&now_time_us);
} while (pal_add_time_us(now_time_us,
CCA_PRE_START_DURATION_US) <
cca_starttime_us);
set_trx_state(CMD_RX_ON);
/* debug pin to switch on: define ENABLE_DEBUG_PINS,
* pal_config.h */
PIN_CCA_START();
/* Start CCA */
trx_bit_write(SR_CCA_REQUEST, CCA_START);
/* wait until CCA is done and get status */
pal_timer_delay(TAL_CONVERT_SYMBOLS_TO_US(CCA_DURATION_SYM));
do {
/* poll until CCA is really done; */
cca_done = trx_bit_read(SR_CCA_DONE);
} while (cca_done != CCA_COMPLETED);
/* between both CCA switch trx to PLL_ON to reduce power
* consumption */
set_trx_state(CMD_PLL_ON);
/* debug pin to switch on: define ENABLE_DEBUG_PINS,
* pal_config.h */
PIN_CCA_END();
/* check if channel was idle or busy */
if (trx_bit_read(SR_CCA_STATUS) == CCA_CH_IDLE) {
/* do next CCA at next backoff boundary */
cca_starttime_us = pal_add_time_us(cca_starttime_us,
TAL_CONVERT_SYMBOLS_TO_US(
aUnitBackoffPeriod));
CW--;
cca_status = PHY_IDLE;
} else { /* PHY busy */
cca_status = PHY_BUSY;
set_trx_state(CMD_RX_AACK_ON);
break; /* if channel is busy do no do CCA for the second
* time */
}
} while (CW > 0);
/*
* Keep trx ready for transmission if channel is idle.
* The transceiver is still in PLL_ON.
* If the channel is not idle, the trx handling is done in
* csma_backoff().
*/
/*
* Clear CCA interrupt flag.
* This is only necessary for debugging, because only in debug mode
* interrupt that are not handled cause an assert in the ISR.
*/
#if (_DEBUG_ > 0)
trx_reg_read(RG_IRQ_STATUS);
#endif
/*
* Since we are not interested in any frames that might be received
* during CCA, reject any information that indicates a previous frame
* reception.
*/
trx_bit_write(SR_RX_PDT_DIS, RX_ENABLE); /* enable frame reception
* indication */
return cca_status;
}
/**
* \brief Performs CCA twice
*/
static uint8_t perform_cca_twice(void)
{
tal_trx_status_t trx_status;
uint8_t cca_status;
uint8_t CW = 2;
uint32_t now_time_us;
do {
pal_get_current_time(&now_time_us);
} while (pal_add_time_us(now_time_us,
(SLEEP_TO_TRX_OFF_US + CCA_PREPARATION_DURATION_US)) <
cca_starttime_us);
/* Ensure that trx is at least in TRX_OFF mode at this time. */
if (tal_trx_status == TRX_SLEEP) {
set_trx_state(CMD_TRX_OFF);
}
do {
pal_get_current_time(&now_time_us);
} while (pal_add_time_us(now_time_us,
(PLL_LOCK_TIME_US + CCA_PREPARATION_DURATION_US)) <
cca_starttime_us);
/*
* Set trx to PLL_ON.
* If trx is busy and trx cannot be set to PLL_ON, assess channel as
*busy.
*/
if (set_trx_state(CMD_PLL_ON) != PLL_ON) {
return PHY_BUSY;
}
/* no interest in trx interrupts while doing CCA */
pal_trx_irq_dis();
/* do CCA twice */
do {
/* wait here until 16us before backoff boundary */
/* assume TRX is in PLL_ON */
do {
pal_get_current_time(&now_time_us);
} while (pal_add_time_us(now_time_us,
CCA_PRE_START_DURATION_US) <
cca_starttime_us);
set_trx_state(CMD_RX_ON);
/* debug pin to switch on: define ENABLE_DEBUG_PINS,
*pal_config.h */
PIN_CCA_START();
/* Start CCA by writing any dummy value to this register */
pal_trx_bit_write(SR_CCA_REQUEST, 1);
/* wait until CCA is done and get status */
pal_timer_delay(TAL_CONVERT_SYMBOLS_TO_US(CCA_DURATION_SYM));
do {
/* poll until CCA is really done; */
trx_status = (tal_trx_status_t)pal_trx_reg_read(
RG_TRX_STATUS);
} while ((trx_status & CCA_DONE_BIT) != CCA_DONE_BIT);
/* between both CCA switch trx to PLL_ON to reduce power
*consumption */
set_trx_state(CMD_PLL_ON);
/* debug pin to switch on: define ENABLE_DEBUG_PINS,
*pal_config.h */
PIN_CCA_END();
/* check if channel was idle or busy */
if (trx_status & CCA_STATUS_BIT) {
/* do next CCA at next backoff boundary */
cca_starttime_us = pal_add_time_us(cca_starttime_us,
TAL_CONVERT_SYMBOLS_TO_US(
aUnitBackoffPeriod));
CW--;
cca_status = PHY_IDLE;
} else { /* PHY busy */
cca_status = PHY_BUSY;
set_trx_state(CMD_RX_AACK_ON);
break; /* if channel is busy do no do CCA for the second
* time */
}
} while (CW > 0);
/*
* Keep trx ready for transmission if channel is idle.
* The transceiver is still in PLL_ON.
* If the channel is not idle, the trx handling is done in
*csma_backoff().
*/
/*
* Since we are not interested in any frames that might be received
* during CCA, reject any information that indicates a previous frame
* reception.
*/
pal_trx_reg_read(RG_IRQ_STATUS);
pal_trx_irq_flag_clr();
pal_trx_irq_en();
return cca_status;
}