static void
nv17_gr_mthd_lma_window(struct nv10_gr_chan *chan, u32 mthd, u32 data)
{
struct nvkm_device *device = chan->object.engine->subdev.device;
struct nvkm_gr *gr = &chan->gr->base;
struct pipe_state *pipe = &chan->pipe_state;
u32 pipe_0x0040[1], pipe_0x64c0[8], pipe_0x6a80[3], pipe_0x6ab0[3];
u32 xfmode0, xfmode1;
int i;
chan->lma_window[(mthd - 0x1638) / 4] = data;
if (mthd != 0x1644)
return;
nv04_gr_idle(gr);
PIPE_SAVE(device, pipe_0x0040, 0x0040);
PIPE_SAVE(device, pipe->pipe_0x0200, 0x0200);
PIPE_RESTORE(device, chan->lma_window, 0x6790);
nv04_gr_idle(gr);
xfmode0 = nvkm_rd32(device, NV10_PGRAPH_XFMODE0);
xfmode1 = nvkm_rd32(device, NV10_PGRAPH_XFMODE1);
PIPE_SAVE(device, pipe->pipe_0x4400, 0x4400);
PIPE_SAVE(device, pipe_0x64c0, 0x64c0);
PIPE_SAVE(device, pipe_0x6ab0, 0x6ab0);
PIPE_SAVE(device, pipe_0x6a80, 0x6a80);
nv04_gr_idle(gr);
nvkm_wr32(device, NV10_PGRAPH_XFMODE0, 0x10000000);
nvkm_wr32(device, NV10_PGRAPH_XFMODE1, 0x00000000);
nvkm_wr32(device, NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0);
for (i = 0; i < 4; i++)
nvkm_wr32(device, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
for (i = 0; i < 4; i++)
nvkm_wr32(device, NV10_PGRAPH_PIPE_DATA, 0x00000000);
nvkm_wr32(device, NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0);
for (i = 0; i < 3; i++)
nvkm_wr32(device, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
nvkm_wr32(device, NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80);
for (i = 0; i < 3; i++)
nvkm_wr32(device, NV10_PGRAPH_PIPE_DATA, 0x00000000);
nvkm_wr32(device, NV10_PGRAPH_PIPE_ADDRESS, 0x00000040);
nvkm_wr32(device, NV10_PGRAPH_PIPE_DATA, 0x00000008);
PIPE_RESTORE(device, pipe->pipe_0x0200, 0x0200);
nv04_gr_idle(gr);
PIPE_RESTORE(device, pipe_0x0040, 0x0040);
nvkm_wr32(device, NV10_PGRAPH_XFMODE0, xfmode0);
nvkm_wr32(device, NV10_PGRAPH_XFMODE1, xfmode1);
PIPE_RESTORE(device, pipe_0x64c0, 0x64c0);
PIPE_RESTORE(device, pipe_0x6ab0, 0x6ab0);
PIPE_RESTORE(device, pipe_0x6a80, 0x6a80);
PIPE_RESTORE(device, pipe->pipe_0x4400, 0x4400);
nvkm_wr32(device, NV10_PGRAPH_PIPE_ADDRESS, 0x000000c0);
nvkm_wr32(device, NV10_PGRAPH_PIPE_DATA, 0x00000000);
nv04_gr_idle(gr);
}
static int
nv17_graph_mthd_lma_window(struct nouveau_object *object, u32 mthd,
void *args, u32 size)
{
struct nv10_graph_chan *chan = (void *)object->parent;
struct nv10_graph_priv *priv = nv10_graph_priv(chan);
struct pipe_state *pipe = &chan->pipe_state;
u32 pipe_0x0040[1], pipe_0x64c0[8], pipe_0x6a80[3], pipe_0x6ab0[3];
u32 xfmode0, xfmode1;
u32 data = *(u32 *)args;
int i;
chan->lma_window[(mthd - 0x1638) / 4] = data;
if (mthd != 0x1644)
return 0;
nv04_graph_idle(priv);
PIPE_SAVE(priv, pipe_0x0040, 0x0040);
PIPE_SAVE(priv, pipe->pipe_0x0200, 0x0200);
PIPE_RESTORE(priv, chan->lma_window, 0x6790);
nv04_graph_idle(priv);
xfmode0 = nv_rd32(priv, NV10_PGRAPH_XFMODE0);
xfmode1 = nv_rd32(priv, NV10_PGRAPH_XFMODE1);
PIPE_SAVE(priv, pipe->pipe_0x4400, 0x4400);
PIPE_SAVE(priv, pipe_0x64c0, 0x64c0);
PIPE_SAVE(priv, pipe_0x6ab0, 0x6ab0);
PIPE_SAVE(priv, pipe_0x6a80, 0x6a80);
nv04_graph_idle(priv);
nv_wr32(priv, NV10_PGRAPH_XFMODE0, 0x10000000);
nv_wr32(priv, NV10_PGRAPH_XFMODE1, 0x00000000);
nv_wr32(priv, NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0);
for (i = 0; i < 4; i++)
nv_wr32(priv, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
for (i = 0; i < 4; i++)
nv_wr32(priv, NV10_PGRAPH_PIPE_DATA, 0x00000000);
nv_wr32(priv, NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0);
for (i = 0; i < 3; i++)
nv_wr32(priv, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
nv_wr32(priv, NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80);
for (i = 0; i < 3; i++)
nv_wr32(priv, NV10_PGRAPH_PIPE_DATA, 0x00000000);
nv_wr32(priv, NV10_PGRAPH_PIPE_ADDRESS, 0x00000040);
nv_wr32(priv, NV10_PGRAPH_PIPE_DATA, 0x00000008);
PIPE_RESTORE(priv, pipe->pipe_0x0200, 0x0200);
nv04_graph_idle(priv);
PIPE_RESTORE(priv, pipe_0x0040, 0x0040);
nv_wr32(priv, NV10_PGRAPH_XFMODE0, xfmode0);
nv_wr32(priv, NV10_PGRAPH_XFMODE1, xfmode1);
PIPE_RESTORE(priv, pipe_0x64c0, 0x64c0);
PIPE_RESTORE(priv, pipe_0x6ab0, 0x6ab0);
PIPE_RESTORE(priv, pipe_0x6a80, 0x6a80);
PIPE_RESTORE(priv, pipe->pipe_0x4400, 0x4400);
nv_wr32(priv, NV10_PGRAPH_PIPE_ADDRESS, 0x000000c0);
nv_wr32(priv, NV10_PGRAPH_PIPE_DATA, 0x00000000);
nv04_graph_idle(priv);
return 0;
}
