static void ak98_sdio_pio_irq(struct ak98_mci_host *host, unsigned int status)
{
u32 *p;
if (host->sg_ptr == NULL) {
printk("%s ERROR\n", __func__);
return;
}
p = sg_virt(host->sg_ptr) + host->sg_off;
if ((status & MCI_FIFOFULL) && (status & MCI_RXACTIVE)) {
*p = readl(host->base + AK88MCIFIFO);
PK("read: 0x%08x\n", *p);
} else if ((status & MCI_FIFOEMPTY) && (status & MCI_TXACTIVE)) {
writel(*p, host->base + AK88MCIFIFO);
PK("write: 0x%08x\n", *p);
} else {
return;
}
host->data_xfered += 4;
host->size -= 4;
host->sg_off += 4;
if (host->sg_off >= host->sg_ptr->length) {
ak98_mci_next_sg(host);
}
}
static void ak98_sdio_cmd_irq(struct ak98_mci_host *host, struct mmc_command *cmd,
unsigned int status)
{
void __iomem *base = host->base;
PK("+%s\n", __func__);
host->cmd = NULL;
cmd->resp[0] = readl(base + AK98MCIRESPONSE0);
cmd->resp[1] = readl(base + AK98MCIRESPONSE1);
cmd->resp[2] = readl(base + AK98MCIRESPONSE2);
cmd->resp[3] = readl(base + AK98MCIRESPONSE3);
PK("base=0x%x,resp[0]=0x%x, [1]=0x%x,resp[2]=0x%x, [3]=0x%x",base,cmd->resp[0],
cmd->resp[1],cmd->resp[2],cmd->resp[3]);
if (status & MCI_RESPTIMEOUT) {
cmd->error = -ETIMEDOUT;
} else if (status & MCI_RESPCRCFAIL && cmd->flags & MMC_RSP_CRC) {
cmd->error = -EILSEQ;
}
writel(readl(base + AK98MCIMASK) & ~MCI_CMDIRQMASKS, base + AK98MCIMASK);
PK("DISABLE CMD IRQ\n");
if (!cmd->data || cmd->error) {
if (host->data)
ak98_sdio_stop_data(host);
ak98_sdio_request_end(host, cmd->mrq);
} else if (!(cmd->data->flags & MMC_DATA_READ)) {
ak98_sdio_start_data(host, cmd->data);
}
PK("-%s\n", __func__);
}
static void ak98_sdio_start_command(struct ak98_mci_host *host, struct mmc_command *cmd)
{
unsigned int c;
void __iomem *base = host->base;
PK1("%s: op %i arg 0x%08x flags 0x%08x\n",
__func__, cmd->opcode, cmd->arg, cmd->flags);
if (readl(base + AK98MCICOMMAND) & MCI_CPSM_ENABLE) {
writel(0, base + AK98MCICOMMAND);
udelay(1);
}
c = MCI_CPSM_CMD(cmd->opcode) | MCI_CPSM_ENABLE;
if (cmd->flags & MMC_RSP_PRESENT) {
c |= MCI_CPSM_RESPONSE;
if (cmd->flags & MMC_RSP_136)
c |= MCI_CPSM_LONGRSP;
}
if (cmd->data)
c |= MCI_CPSM_WITHDATA;
host->cmd = cmd;
writel(cmd->arg, base + AK98MCIARGUMENT);
writel(readl(base + AK98MCIMASK) | MCI_CMDIRQMASKS, base + AK98MCIMASK);
PK("ENABLE CMD IRQ\n");
PK("irqmask: 0x%08x\n", readl(base+AK98MCIMASK));
writel(c, base + AK98MCICOMMAND);
}
/**
* @brief set sd bus mode,bus width,clock.
*
* @author Hanyang
* @date 2011-05-10
* @param [in] *mmc information of host .
* @param [in] *ios information of sd interface .
* @return void.
*/
static void ak98_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
struct ak98_mci_host *host = mmc_priv(mmc);
hydbg("bus_mode=%d,bus_width=%d\n", ios->bus_mode, ios->bus_width);
/* ak98 (and SD spec) don't support MMC_BUSMODE_OPENDRAIN */
host->bus_mode = ios->bus_mode;
host->bus_width = ios->bus_width;
//printk("%ubits(%u); ", (unsigned)1 >> (host->bus_width), host->bus_width);
/* we can't control external power supply unit */
switch (ios->power_mode) {
case MMC_POWER_UP:
PK("MMC_POWER_UP; ");
break;
case MMC_POWER_ON:
PK("MMC_POWER_ON; ");
break;
case MMC_POWER_OFF:
PK("MMC_POWER_OFF; ");
break;
}
#ifdef CONFIG_CPU_FREQ
down(&host->freq_lock);
#endif
#ifdef CONFIG_MTD_NAND_AK98
down(&nand_lock);
#endif
ak98_group_pin_config();
if (ios->clock != host->bus_clkrate)
{
ak98mci_set_clk(host,ios);
}
#ifdef CONFIG_MTD_NAND_AK98
up(&nand_lock);
#endif
#ifdef CONFIG_CPU_FREQ
up(&host->freq_lock);
#endif
/* no matter high-speed mode or not, ak88 mci use the same timing */
//printk("ios->clock(%dkhz), host->bus_clkrate(%lukhz), host->asic_clkrate(%lumhz), MMC_CLK_CTRL(0x%08x)\n",
// ios->clock/1000, host->bus_clkrate/1000, host->asic_clkrate/1000000, readl(host->base + AK98MCICLOCK));
}
/*
* Handle completion of command and data transfers.
*/
static irqreturn_t ak98_sdio_irq(int irq, void *dev_id)
{
struct ak98_mci_host *host = dev_id;
u32 status;
int ret = 0;
PK("+%s ", __func__);
spin_lock(&host->lock);
do {
struct mmc_command *cmd;
struct mmc_data *data;
status = readl(host->base + AK98MCISTATUS);
PK(" status= 0x%08x\n", status);
#ifdef AKMCI_INNERFIFO_PIO
if (host->data)
ak98_sdio_pio_irq(host, status);
#endif
cmd = host->cmd;
if (status & (MCI_RESPCRCFAIL|MCI_RESPTIMEOUT|MCI_CMDSENT|MCI_RESPEND)
&& cmd)
ak98_sdio_cmd_irq(host, cmd, status);
data = host->data;
if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_DATAEND|MCI_DATABLOCKEND|MCI_STARTBIT_ERR)
&& data)
ak98_sdio_data_irq(host, data, status);
if (status & MCI_SDIOINT) {
/*must disable sdio irq ,than read status to clear the sdio status,
else sdio irq will come again.
*/
ak98_enable_sdio_irq(host->mmc,0);
readl(host->base + AK98MCISTATUS);
mmc_signal_sdio_irq(host->mmc);
}
ret = 1;
} while (0);
spin_unlock(&host->lock);
PK("-%s, irqmask: 0x%08x\n", __func__, readl(host->base + AK98MCIMASK));
return IRQ_RETVAL(ret);
}
void RSA::decryptRSA (char* fileText,char* fileKey,char *fileDecrypt)
{
ifstream filetext(fileText);
ofstream decrypt(fileDecrypt);
ifstream PK(fileKey);
if(!PK){
cout<<"Fail!publicKey.txt isn't exist";
return;
}
if(!filetext){
cout<<"Fail!filetext.txt isn't exist";
return;
}
ZZZ n,d,code;
string a;
/*read key from fileKey*/
PK>>a; n=a;
PK>>a; d=a;
/*read text from fileText*/
filetext>>a;
/*decrypto base64 to bits*/
code.set_str(de_convert_base64(a),2);
/*M=C^d mode n*/
mpz_powm(code.get_mpz_t(),code.get_mpz_t(),d.get_mpz_t(),n.get_mpz_t());
/*convert to bit and crop length of KEY{128,192,256}*/
a=code.get_str(2);
a=a.substr(2048-KEY,KEY);
/********************/
code.set_str(a,2);
decrypt<<code.get_str();
filetext.close();
decrypt.close();
PK.close();
}
static void ak98_sdio_stop_data(struct ak98_mci_host *host)
{
u32 masks;
PK1("%s\n", __func__);
writel(0, host->base + AK98MCIDMACTRL);
writel(0, host->base + AK98MCIDATACTRL);
masks = readl(host->base + AK98MCIMASK);
masks &= ~(MCI_DATAIRQMASKS|MCI_FIFOFULLMASK|MCI_FIFOEMPTYMASK);
writel(masks, host->base + AK98MCIMASK);
PK("DISABLE DATA IRQ\n");
#ifdef MCI_USE_L2FIFO_DMA
if (host->data->flags & MMC_DATA_WRITE) {
dma_sync_sg_for_cpu(mmc_dev(host->mmc), host->data->sg, host->data->sg_len, DMA_TO_DEVICE);
dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->data->sg_len, DMA_TO_DEVICE);
} else {
dma_sync_sg_for_cpu(mmc_dev(host->mmc), host->data->sg, host->data->sg_len, DMA_FROM_DEVICE);
dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->data->sg_len, DMA_FROM_DEVICE);
}
#endif
host->data = NULL;
}
static void mci_xfer(struct ak98_mci_host *host)
{
int sg_remain;
u32 *tempbuf,xferlen;
u8 dir;
PK("%s\n", __func__);
if (host->data->flags & MMC_DATA_WRITE) {
dir = MEM2BUF;
} else {
//ak98_l2_clr_status(l2_sdio_bufid);
dir = BUF2MEM;
}
tempbuf = sg_virt(host->sg_ptr) + host->sg_off;
sg_remain = host->sg_ptr->length - host->sg_off;
if (sg_remain <= 0)
{
host->sg_ptr = sg_next(host->sg_ptr);
if (host->sg_ptr == NULL)
return;
host->sg_off = 0;
tempbuf = sg_virt(host->sg_ptr) + host->sg_off;
sg_remain = host->sg_ptr->length - host->sg_off;
}
xferlen = (sg_remain > host->data->blksz) ? host->data->blksz : sg_remain;
ak98_l2_combuf_cpu((unsigned long)tempbuf, l2_sdio_bufid, xferlen, dir);
host->sg_off += xferlen;
host->data_xfered += xferlen;
}
static void ak98_sdio_dump_regs(void *base)
{
int i;
for (i = 0; i <= 0x40; i+=4) {
PK("%02x - %08x\n", i, ioread32(base+i));
}
}
static irqreturn_t ak98_sdio_card_detect_irq(int irq, void *dev)
{
struct ak98_mci_host *host = dev;
PK("%s##################\n", __func__);
disable_irq_nosync(irq);
mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(400));
return IRQ_HANDLED;
}
/** * @Copyright (C) Anyka 2012 * @brief read battery voltage * @author Gao wangsheng * @email [email protected] * @date 2012-11-2 * @param[out] void * @param[in] *info * @return voltage */ int ak_bat_read_voltage(struct ak_bat_mach_info *info) { int voltage; PK("\n###############%s; \n",__func__); // read voltage sample PK("############adc1_read_bat:\n"); voltage = (int)adc1_read_bat(); PK("ad4_voltage = %d:\n",voltage); voltage = voltage * (info->bat_adc.up_resistance + info->bat_adc.dw_resistance) / info->bat_adc.dw_resistance; PK("bat_voltage = %d:\n",voltage); voltage += info->bat_adc.voltage_correct; // correct battery voltage PK("correct_voltage = %d:\n",voltage); return voltage; }
static void ak98_sdio_detect_change(unsigned long data)
{
struct ak98_mci_host *host = (struct ak98_mci_host *)data;
PK("%s\n", __func__);
mmc_detect_change(host->mmc, 0);
if (host->irq_cd_type == IRQ_TYPE_LEVEL_LOW) {
host->irq_cd_type = IRQ_TYPE_LEVEL_HIGH;
} else {
host->irq_cd_type = IRQ_TYPE_LEVEL_LOW;
}
set_irq_type(host->irq_cd, host->irq_cd_type);
enable_irq(host->irq_cd);
}
static void ak98_sdio_data_irq(struct ak98_mci_host *host, struct mmc_data *data,
unsigned int status)
{
if (status & MCI_DATABLOCKEND) {
PK("BLOCKEND\n");
#ifdef AKMCI_L2FIFO_PIO
if (data->flags & MMC_DATA_WRITE)
{
ak98_l2_clr_status(l2_sdio_bufid);
}
if (host->size > 0)
mci_xfer(host);
#endif
}
if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT)) {
PK1("DATA ERROR: 0x%08x\n", status);
if (status & MCI_DATACRCFAIL )
data->error = -EILSEQ;
else if (status & MCI_DATATIMEOUT)
data->error = -ETIMEDOUT;
status |= MCI_DATAEND;
/*
* We hit an error condition. Ensure that any data
* partially written to a page is properly coherent.
*/
if (host->sg_len && data->flags & MMC_DATA_READ)
flush_dcache_page(sg_page(host->sg_ptr));
}
if (status & MCI_DATAEND) {
ak98_sdio_stop_data(host);
//dump_data(data);
if (!data->stop) {
ak98_sdio_request_end(host, data->mrq);
} else {
ak98_sdio_start_command(host, data->stop);
}
}
}
void RSA::createNewKey(char *filePrivateKey,char * filePublicKey)
{
PrGlib dnthang;
ofstream PK(filePrivateKey);
ofstream BK(filePublicKey);
/*Generate p and q as strong primes */
ZZZ p=dnthang.PrG_generate_strong_prime(3072);
ZZZ q=dnthang.PrG_generate_strong_prime(3072);
ZZZ n=q*p;
ZZZ phi=(p^1)*(q^1);
ZZZ e,k;
/*Find e such that gcd(e,phi)=1*/
do
{
gmp_randclass rr(gmp_randinit_default);
rr.seed(time(NULL));
e =rr.get_z_bits(dnthang.PrG_get_length());
ZZZ num = e & 1;
if (num == 0)e = e | 1;
mpz_gcd (k.get_mpz_t(),e.get_mpz_t(), phi.get_mpz_t());
}while(k!=1);
/*******************************/
/*Compute d= e^-1 mod n*/
ZZZ d;
mpz_invert(d.get_mpz_t(),e.get_mpz_t(),phi.get_mpz_t());
/*private key*/
PK<<n.get_str()<<endl;
PK<<d.get_str()<<endl;
/*public key*/
BK<<n.get_str()<<endl;
BK<<e.get_str()<<endl;
PK.clear();
PK.close();
BK.clear();
BK.close();
}
void extr(jvec &ext_EP,jvec &ext_ED,jvec &ext_Q2,jvec &ext_fP,jvec &ext_fM,jvec &ext_f0,jvec &ext_fT,int il_sea,int il,int ic)
{
////////////////////////////////////////// R0 //////////////////////////////////////
jvec R0_corr;
jack R0(njack);
//load standing
jvec ll0_st=load_3pts("V0",il,il,0,RE,ODD,1);
jvec lc0_st=load_3pts("V0",ic,il,0,RE,ODD,1);
jvec cc0_st=load_3pts("V0",ic,ic,0,RE,ODD,1);
//build R0
R0_corr=lc0_st*lc0_st.simmetric()/(cc0_st*ll0_st);
//fit and plot
R0=constant_fit(R0_corr,TH-tmax,tmax,combine("plots/R0_il_%d_ic_%d.xmg",il,ic).c_str());
//////////////////////////////////////////// R2 ////////////////////////////////////
jvec R2_corr[nth];
jvec RT_corr[nth];
jvec R2(nth,njack);
jvec RT(nth,njack);
ofstream out_R2(combine("plots/R2_il_%d_ic_%d.xmg",il,ic).c_str());
ofstream out_RT(combine("plots/RT_il_%d_ic_%d.xmg",il,ic).c_str());
jvec lcK_th[nth],lc0_th[nth],lcT_th[nth];
for(int ith=0;ith<nth;ith++)
{
//load corrs
lcK_th[ith]=load_3pts("VK",ic,il,ith,IM,EVN,-1)/(6*th_P[ith]);
lc0_th[ith]=load_3pts("V0",ic,il,ith,RE,ODD,1);
lcT_th[ith]=load_3pts("VTK",ic,il,ith,IM,ODD,1)/(6*th_P[ith]);
//build ratios
R2_corr[ith]=lcK_th[ith]/lc0_th[ith];
RT_corr[ith]=lcT_th[ith]/lcK_th[ith];
//fit
R2[ith]=constant_fit(R2_corr[ith],tmin,tmax);
RT[ith]=constant_fit(RT_corr[ith],tmin,tmax);
//plot
out_R2<<write_constant_fit_plot(R2_corr[ith],R2[ith],tmin,tmax);
out_RT<<write_constant_fit_plot(RT_corr[ith],RT[ith],tmin,tmax);
}
////////////////////////////////////////// R1 //////////////////////////////////////
jvec R1_corr[nth];
jvec R1(nth,njack);
ofstream out_P(combine("plots/out_P_il_%d_ic_%d.xmg",il,ic).c_str());
out_P<<"@type xydy"<<endl;
ofstream out_D(combine("plots/out_D_il_%d_ic_%d.xmg",il,ic).c_str());
out_D<<"@type xydy"<<endl;
ofstream out_R1(combine("plots/out_R1_il_%d_ic_%d.xmg",il,ic).c_str());
out_R1<<"@type xydy"<<endl;
//load Pi and D
jvec P_corr[nth],D_corr[nth];
jvec ED(nth,njack),EP(nth,njack);
for(int ith=0;ith<nth;ith++)
{
//load moving pion
P_corr[ith]=load_2pts("2pts_P5P5.dat",il_sea,il,ith);
out_P<<"@type xydy"<<endl;
EP[ith]=constant_fit(effective_mass(P_corr[ith]),tmin_P,TH,combine("plots/P_eff_mass_il_%d_ic_%d_ith_%d.xmg",
il,ic,ith).c_str());
out_P<<write_constant_fit_plot(effective_mass(P_corr[ith]),EP[ith],tmin_P,TH);
out_P<<"&"<<endl;
//recompute EP and ED from standing one
if(ith)
{
ED[ith]=latt_en(ED[0],th_P[ith]);
EP[ith]=latt_en(EP[0],th_P[ith]);
}
//load moving D
D_corr[ith]=load_2pts("2pts_P5P5.dat",il,ic,ith);
out_D<<"@type xydy"<<endl;
ED[ith]=constant_fit(effective_mass(D_corr[ith]),tmin_D,TH,combine("plots/D_eff_mass_il_%d_ic_%d_ith_%d.xmg",
il,ic,ith).c_str());
out_D<<write_constant_fit_plot(effective_mass(D_corr[ith]),ED[ith],tmin_D,TH);
out_D<<"&"<<endl;
//build the ratio
R1_corr[ith]=lc0_th[ith]/lc0_th[0];
for(int t=0;t<TH;t++)
{
int E_fit_reco_flag=1;
jack Dt(njack),Pt(njack);
if(E_fit_reco_flag==0)
{
Dt=D_corr[0][t]/D_corr[ith][t];
Pt=P_corr[0][TH-t]/P_corr[ith][TH-t];
}
else
{
jack ED_th=latt_en(ED[0],th_P[ith]),EP_th=latt_en(EP[0],th_P[ith]);
Dt=exp(-(ED[0]-ED_th)*t)*ED_th/ED[0];
Pt=exp(-(EP[0]-EP_th)*(TH-t))*EP_th/EP[0];
}
R1_corr[ith][t]*=Dt*Pt;
}
//fit
R1[ith]=constant_fit(R1_corr[ith],tmin,tmax);
//plot
out_R1<<write_constant_fit_plot(R1_corr[ith],R1[ith],tmin,tmax);
}
//////////////////////////////////////// solve the ratios //////////////////////////////
//compute f0[q2max]
jvec f0_r(nth,njack),fP_r(nth,njack),fT_r(nth,njack);
f0_r[0]=sqrt(R0*4*ED[0]*EP[0])/(ED[0]+EP[0]);
cout<<"f0_r[q2max]: "<<f0_r[0]<<endl;
//compute QK and Q2
double mom[nth];
jvec PK(nth,njack),QK(nth,njack);
jvec P0(nth,njack),Q0(nth,njack),Q2(nth,njack),P2(nth,njack);
jvec P0_r(nth,njack),Q0_r(nth,njack),Q2_r(nth,njack),P2_r(nth,njack);
for(int ith=0;ith<nth;ith++)
{
P0[ith]=ED[ith]+EP[ith]; //P=initial+final
Q0[ith]=ED[ith]-EP[ith]; //Q=initial-final
P0_r[ith]=latt_en(ED[0],th_P[ith])+latt_en(EP[0],th_P[ith]);
Q0_r[ith]=latt_en(ED[0],th_P[ith])-latt_en(EP[0],th_P[ith]);
//we are describing the process D->Pi
mom[ith]=momentum(th_P[ith]);
double P_D=-mom[ith];
double P_Pi=mom[ith];
PK[ith]=P_D+P_Pi;
QK[ith]=P_D-P_Pi;
P2[ith]=sqr(P0[ith])-3*sqr(PK[ith]);
Q2[ith]=sqr(Q0[ith])-3*sqr(QK[ith]);
//reconstruct Q2
P2_r[ith]=sqr(P0_r[ith])-3*sqr(PK[ith]);
Q2_r[ith]=sqr(Q0_r[ith])-3*sqr(QK[ith]);
}
//checking Pion dispertion relation
ofstream out_disp_P(combine("plots/Pion_disp_rel_il_%d_ic_%d.xmg",il,ic).c_str());
out_disp_P<<"@type xydy"<<endl;
for(int ith=0;ith<nth;ith++) out_disp_P<<3*sqr(mom[ith])<<" "<<sqr(EP[ith])<<endl;
out_disp_P<<"&"<<endl;
for(int ith=0;ith<nth;ith++) out_disp_P<<3*sqr(mom[ith])<<" "<<sqr(cont_en(EP[0],th_P[ith]))<<endl;
out_disp_P<<"&"<<endl;
for(int ith=0;ith<nth;ith++) out_disp_P<<3*sqr(mom[ith])<<" "<<sqr(latt_en(EP[0],th_P[ith]))<<endl;
out_disp_P<<"&"<<endl;
//checking D dispertion relation
ofstream out_disp_D(combine("plots/D_disp_rel_il_%d_ic_%d.xmg",il,ic).c_str());
out_disp_D<<"@type xydy"<<endl;
for(int ith=0;ith<nth;ith++) out_disp_D<<3*sqr(mom[ith])<<" "<<sqr(ED[ith])<<endl;
out_disp_D<<"&"<<endl;
for(int ith=0;ith<nth;ith++) out_disp_D<<3*sqr(mom[ith])<<" "<<sqr(cont_en(ED[0],th_P[ith]))<<endl;
out_disp_D<<"&"<<endl;
for(int ith=0;ith<nth;ith++) out_disp_D<<3*sqr(mom[ith])<<" "<<sqr(latt_en(ED[0],th_P[ith]))<<endl;
out_disp_D<<"&"<<endl;
//compute xi
jvec xi(nth,njack);
for(int ith=1;ith<nth;ith++)
{
int E_fit_reco_flag=0; //it makes no diff
jack P0_th=E_fit_reco_flag?P0_r[ith]:P0[ith];
jack Q0_th=E_fit_reco_flag?Q0_r[ith]:Q0[ith];
xi[ith]=R2[ith]*P0_th;
xi[ith]/=QK[ith]-R2[ith]*Q0_th;
}
//compute fP
ofstream out_fP_r(combine("plots/fP_r_il_%d_ic_%d.xmg",il,ic).c_str());
out_fP_r<<"@type xydy"<<endl;
for(int ith=1;ith<nth;ith++)
{
int E_fit_reco_flag=1; //it makes no diff
jack P0_th=E_fit_reco_flag?P0_r[ith]:P0[ith];
jack Q0_th=E_fit_reco_flag?Q0_r[ith]:Q0[ith];
jack c=P0_th/(ED[0]+EP[0])*(1+xi[ith]*Q0_th/P0_th);
fP_r[ith]=R1[ith]/c*f0_r[0];
out_fP_r<<Q2[ith].med()<<" "<<fP_r[ith]<<endl;
}
//compute f0 and fT
ofstream out_f0_r(combine("plots/f0_r_il_%d_ic_%d.xmg",il,ic).c_str());
ofstream out_fT_r(combine("plots/fT_r_il_%d_ic_%d.xmg",il,ic).c_str());;
out_f0_r<<"@type xydy"<<endl;
out_f0_r<<Q2[0].med()<<" "<<f0_r[0]<<endl;
out_fT_r<<"@type xydy"<<endl;
for(int ith=1;ith<nth;ith++)
{
//it seems better here to solve using reconstructed energies
int E_fit_reco_flag=0;
jack EP_th=E_fit_reco_flag?latt_en(EP[0],th_P[ith]):EP[ith];
jack ED_th=E_fit_reco_flag?latt_en(ED[0],th_P[ith]):ED[ith];
jack Q2_th=E_fit_reco_flag?Q2_r[ith]:Q2[ith];
jack fM_r=xi[ith]*fP_r[ith]; //checked
f0_r[ith]=fP_r[ith]+fM_r[ith]*Q2_th/(sqr(ED_th)-sqr(EP_th));
out_f0_r<<Q2[ith].med()<<" "<<f0_r[ith]<<endl;
fT_r[ith]=fM_r[ith]*RT[ith]*Zt_med[ibeta]/Zv_med[ibeta]*(EP[0]+ED[0])/(ED[ith]+EP[ith]); //ADD
out_fT_r<<Q2[ith].med()<<" "<<fT_r[ith]<<endl;
}
//////////////////////////////////////// analytic method /////////////////////////////
jvec fP_a(nth,njack),fM_a(nth,njack),f0_a(nth,njack),fT_a(nth,njack);
jvec fP_n(nth,njack),fM_n(nth,njack),f0_n(nth,njack),fT_n(nth,njack);
//determine M and Z for pion and D
jvec ZP(nth,njack),ZD(nth,njack);
for(int ith=0;ith<nth;ith++)
{
jack E,Z2;
two_pts_fit(E,Z2,P_corr[ith],tmin_P,TH);
ZP[ith]=sqrt(Z2);
two_pts_fit(E,Z2,D_corr[ith],tmin_D,TH);
ZD[ith]=sqrt(Z2);
}
//compute V
jvec VK_a(nth,njack),V0_a(nth,njack),TK_a(nth,njack);
jvec VK_n(nth,njack),V0_n(nth,njack),TK_n(nth,njack);
for(int ith=0;ith<nth;ith++)
{
ofstream out_V0(combine("plots/V0_il_%d_ic_%d_ith_%d_analytic_numeric.xmg",il,ic,ith).c_str());
out_V0<<"@type xydy"<<endl;
ofstream out_VK(combine("plots/VK_il_%d_ic_%d_ith_%d_analytic_numeric.xmg",il,ic,ith).c_str());
out_VK<<"@type xydy"<<endl;
ofstream out_TK(combine("plots/TK_il_%d_ic_%d_ith_%d_analytic_numeric.xmg",il,ic,ith).c_str());
out_TK<<"@type xydy"<<endl;
ofstream out_dt(combine("plots/dt_il_%d_ic_%d_ith_%d.xmg",il,ic,ith).c_str());
out_dt<<"@type xydy"<<endl;
//computing time dependance
jvec dt_a(TH+1,njack),dt_n(TH+1,njack);
{
//it seems better here to use fitted energies
int E_fit_reco_flag=1;
jack EP_th=E_fit_reco_flag?latt_en(EP[0],th_P[ith]):EP[ith];
jack ED_th=E_fit_reco_flag?latt_en(ED[0],th_P[ith]):ED[ith];
for(int t=0;t<=TH;t++)
{
dt_a[t]=exp(-(ED_th*t+EP_th*(TH-t)))*ZP[0]*ZD[0]/(4*EP_th*ED_th);
dt_n[t]=D_corr[ith][t]*P_corr[ith][TH-t]/(ZD[0]*ZP[0]);
}
}
//remove time dependance using analytic or numeric expression
jvec VK_corr_a=Zv_med[ibeta]*lcK_th[ith]/dt_a,V0_corr_a=Zv_med[ibeta]*lc0_th[ith]/dt_a;
jvec VK_corr_n=Zv_med[ibeta]*lcK_th[ith]/dt_n,V0_corr_n=Zv_med[ibeta]*lc0_th[ith]/dt_n;
jvec TK_corr_n=Zt_med[ibeta]*lcT_th[ith]/dt_n,TK_corr_a=Zt_med[ibeta]*lcT_th[ith]/dt_a;
//fit V0
V0_a[ith]=constant_fit(V0_corr_a,tmin,tmax);
V0_n[ith]=constant_fit(V0_corr_n,tmin,tmax);
out_V0<<write_constant_fit_plot(V0_corr_a,V0_a[ith],tmin,tmax)<<"&"<<endl;
out_V0<<write_constant_fit_plot(V0_corr_n,V0_n[ith],tmin,tmax)<<"&"<<endl;
//fit VK
VK_a[ith]=constant_fit(VK_corr_a,tmin,tmax);
VK_n[ith]=constant_fit(VK_corr_n,tmin,tmax);
out_VK<<write_constant_fit_plot(VK_corr_a,VK_a[ith],tmin,tmax)<<"&"<<endl;
out_VK<<write_constant_fit_plot(VK_corr_n,VK_n[ith],tmin,tmax)<<"&"<<endl;
//fit TK
TK_a[ith]=constant_fit(TK_corr_a,tmin,tmax);
TK_n[ith]=constant_fit(TK_corr_n,tmin,tmax);
out_TK<<write_constant_fit_plot(TK_corr_a,TK_a[ith],tmin,tmax)<<"&"<<endl;
out_TK<<write_constant_fit_plot(TK_corr_n,TK_n[ith],tmin,tmax)<<"&"<<endl;
}
//compute f0(q2max)
f0_a[0]=V0_a[0]/(ED[0]+EP[0]);
f0_n[0]=V0_n[0]/(ED[0]+EP[0]);
cout<<"f0_a["<<Q2[0].med()<<"]: "<<f0_a[0]<<endl;
cout<<"f0_n["<<Q2[0].med()<<"]: "<<f0_n[0]<<endl;
//solve for fP and f0
for(int ith=1;ith<nth;ith++)
{
jack delta=P0[ith]*QK[ith]-Q0[ith]*PK[ith];
//solve using analytic fit
jack deltaP_a=V0_a[ith]*QK[ith]-Q0[ith]*VK_a[ith];
jack deltaM_a=P0[ith]*VK_a[ith]-V0_a[ith]*PK[ith];
fP_a[ith]=deltaP_a/delta;
fM_a[ith]=deltaM_a/delta;
//solve using numeric fit
jack deltaP_n=V0_n[ith]*QK[ith]-Q0[ith]*VK_n[ith];
jack deltaM_n=P0[ith]*VK_n[ith]-V0_n[ith]*PK[ith];
fP_n[ith]=deltaP_n/delta;
fM_n[ith]=deltaM_n/delta;
//compute f0
f0_a[ith]=fP_a[ith]+fM_a[ith]*Q2[ith]/(ED[0]*ED[0]-EP[0]*EP[0]);
f0_n[ith]=fP_n[ith]+fM_n[ith]*Q2[ith]/(ED[0]*ED[0]-EP[0]*EP[0]);
//solve fT
fT_a[ith]=-TK_a[ith]*(EP[0]+ED[0])/(2*(ED[ith]+EP[ith]))/mom[ith];
fT_n[ith]=-TK_n[ith]*(EP[0]+ED[0])/(2*(ED[ith]+EP[ith]))/mom[ith];
}
//write analytic and umeric plot of fP and f0
ofstream out_fP_a("plots/fP_a.xmg"),out_fP_n("plots/fP_n.xmg");
ofstream out_fM_a("plots/fM_a.xmg"),out_fM_n("plots/fM_n.xmg");
ofstream out_f0_a("plots/f0_a.xmg"),out_f0_n("plots/f0_n.xmg");
ofstream out_fT_a("plots/fT_a.xmg"),out_fT_n("plots/fT_n.xmg");
out_fP_a<<"@type xydy"<<endl;
out_fP_n<<"@type xydy"<<endl;
out_f0_a<<"@type xydy"<<endl;
out_f0_n<<"@type xydy"<<endl;
out_fM_a<<"@type xydy"<<endl;
out_fM_n<<"@type xydy"<<endl;
out_fT_a<<"@type xydy"<<endl;
out_fT_n<<"@type xydy"<<endl;
out_f0_a<<Q2[0].med()<<" "<<f0_a[0]<<endl;
out_f0_n<<Q2[0].med()<<" "<<f0_n[0]<<endl;
for(int ith=1;ith<nth;ith++)
{
out_fP_a<<Q2[ith].med()<<" "<<fP_a[ith]<<endl;
out_fP_n<<Q2[ith].med()<<" "<<fP_n[ith]<<endl;
out_fM_a<<Q2[ith].med()<<" "<<fM_a[ith]<<endl;
out_fM_n<<Q2[ith].med()<<" "<<fM_n[ith]<<endl;
out_f0_a<<Q2[ith].med()<<" "<<f0_a[ith]<<endl;
out_f0_n<<Q2[ith].med()<<" "<<f0_n[ith]<<endl;
out_fT_a<<Q2[ith].med()<<" "<<fT_a[ith]<<endl;
out_fT_n<<Q2[ith].med()<<" "<<fT_n[ith]<<endl;
}
ext_EP=EP;
ext_ED=ED;
ext_Q2=Q2;
ext_fP=fP_a;
ext_fM=fM_a;
ext_f0=f0_a;
ext_fT=fT_a;
}
static void ak98_sdio_start_data(struct ak98_mci_host *host, struct mmc_data *data)
{
unsigned int datactrl, timeout;
unsigned long long clks;
void __iomem *base;
PK("%s: blksz %04x blks %04x flags %08x\n",
__func__, data->blksz, data->blocks, data->flags);
host->data = data;
host->size = data->blksz * data->blocks;
host->data_xfered = 0;
ak98_mci_init_sg(host, data);
clks = (unsigned long long)data->timeout_ns * host->bus_clkrate;
do_div(clks, 1000000000UL);
timeout = data->timeout_clks + (unsigned int)clks;
PK("timeout: %uns / %uclks, clks=%d\n", data->timeout_ns, data->timeout_clks,clks);
base = host->base;
writel(timeout, base + AK98MCIDATATIMER);
writel(host->size, base + AK98MCIDATALENGTH);
/* set l2 fifo info */
writel (MCI_DMA_BUFEN | MCI_DMA_SIZE(MCI_L2FIFO_SIZE/4),
base + AK98MCIDMACTRL);
#ifdef AKMCI_L2FIFO_DMA
u32 regval;
/* get l2 fifo */
regval = readl(host->l2base + L2FIFO_ASSIGN1);
regval = (regval & (~(3<<12))) | (MCI_L2FIFO_NUM << 12);
writel(regval, host->l2base + L2FIFO_ASSIGN1);
regval = readl(host->l2base + L2FIFO_CONF1);
regval |= (1 << (0 + MCI_L2FIFO_NUM))
| (1 << (16 + MCI_L2FIFO_NUM))
| (1 << (24 + MCI_L2FIFO_NUM));
if (data->flags & MMC_DATA_WRITE)
regval |= (1 << (8 + MCI_L2FIFO_NUM));
else
regval &= ~(1 << (8 + MCI_L2FIFO_NUM));
writel(regval, host->l2base + L2FIFO_CONF1);
/* set dma addr */
if (data->flags & MMC_DATA_WRITE)
dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, DMA_TO_DEVICE);
else
dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, DMA_FROM_DEVICE);
writel(sg_dma_address(data->sg), host->l2base + MCI_L2FIFO_NUM);
/* set dma size */
if (host->size > L2DMA_MAX_SIZE)
dma_size = L2DMA_MAX_SIZE;
dma_times = dma_size/64;
writel(dma_times, host->l2base + 0x40 + MCI_L2FIFO_NUM);
if (host->size > L2DMA_MAX_SIZE) {
/* need to handle dma int */
regval = readl(host->l2base + L2FIFO_INTEN);
regval |= (1 << (9 + MCI_L2FIFO_NUM));
writel(regval, host->l2base + L2FIFO_INTEN);
request_irq(AK88_L2MEM_IRQ(x)(9+MCI_L2FIFO_NUM), ak98_mcil2_irq,
IRQF_DISABLED, DRIVER_NAME "(dma)", host);
}
/* when to start dma? */
regval = readl(host->l2base + L2FIFO_DMACONF);
regval |= (1 | (1 << (24 + MCI_L2FIFO_NUM)));
writel(regval, host->l2base + L2FIFO_DMACONF);
if (dma_size % 64) {
/* fraction DMA */
(8 * MCI_L2FIFO_NUM)
}
/* set l2 fifo info */
writel (MCI_DMA_BUFEN | MCI_DMA_EN | MCI_DMA_SIZE(MCI_L2FIFO_SIZE/4),
base + AK98MCIDMACTRL);
#endif
datactrl = MCI_DPSM_ENABLE;
switch (host->bus_width) {
case MMC_BUS_WIDTH_8:
datactrl |= MCI_DPSM_BUSMODE(2);
break;
case MMC_BUS_WIDTH_4:
datactrl |= MCI_DPSM_BUSMODE(1);
break;
case MMC_BUS_WIDTH_1:
default:
datactrl |= MCI_DPSM_BUSMODE(0);
break;
}
if (data->flags & MMC_DATA_STREAM) {
DBG(host, "%s", "STREAM Data\n");
datactrl |= MCI_DPSM_STREAM;
} else {
DBG(host, "BLOCK Data: %u x %u\n", data->blksz, data->blocks);
datactrl |= MCI_DPSM_BLOCKSIZE(data->blksz);
}
if (data->flags & MMC_DATA_READ) {
datactrl |= MCI_DPSM_DIRECTION;
}
writel(readl(base + AK98MCIMASK) | MCI_DATAIRQMASKS, base + AK98MCIMASK);
writel(datactrl, base + AK98MCIDATACTRL);
PK("ENABLE DATA IRQ, datactrl: 0x%08x, timeout: 0x%08x, len: %u\n",
datactrl, readl(base+AK98MCIDATATIMER), host->size);
#ifdef AKMCI_L2FIFO_PIO
if (data->flags & MMC_DATA_WRITE)
mci_xfer(host);
#endif
#ifdef AKMCI_INNERFIFO_PIO
unsigned int irqmask;
irqmask = readl(base + AK98MCIMASK);
if (data->flags & MMC_DATA_READ) {
if (host->size > MCI_FIFOSIZE)
irqmask |= MCI_FIFOFULLMASK;
else
; /* wait for DATAEND int */
} else {
irqmask |= MCI_FIFOEMPTYMASK;
}
writel(irqmask, base + AK98MCIMASK);
#endif
}
static int __devinit ak98_sdio_probe(struct platform_device *pdev)
{
struct ak98_mci_platform_data *plat = pdev->dev.platform_data;
struct ak98_mci_host *host;
struct mmc_host *mmc;
struct resource *res;
int irq;
int ret;
/* must have platform data */
if (!plat) {
ret = -EINVAL;
goto out;
}
PK("%s\n", __func__);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
PK("res: %x, %u", res->start, resource_size(res));
res = request_mem_region(res->start, resource_size(res), DRIVER_NAME);
if (!res) {
ret = -EBUSY;
goto out;
}
PK("res: %x, %u\n", res->start, resource_size(res));
mmc = mmc_alloc_host(sizeof(struct ak98_mci_host), &pdev->dev);
if (!mmc) {
ret = -ENOMEM;
goto out;
}
host = mmc_priv(mmc);
host->mmc = mmc;
host->gpio_wp = -ENOSYS;
host->gpio_cd = -ENOSYS;
ak98_sdio_reset();
host->clk = clk_get(&pdev->dev, "sdio_clk");
if (IS_ERR(host->clk)) {
ret = PTR_ERR(host->clk);
host->clk = NULL;
goto host_free;
}
ret = clk_enable(host->clk);
if (ret)
goto clk_free;
host->plat = plat;
host->asic_clkrate = ak98_get_asic_clk();
host->base = ioremap(res->start, resource_size(res));
if (!host->base) {
ret = -ENOMEM;
goto clk_disable;
}
PK("asic_clkrate: %luhz,host->base=0x%x\n", host->asic_clkrate,host->base);
mmc->ops = &ak98_mci_ops;
mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
mmc->caps = MMC_CAP_4_BIT_DATA;
#if 0
mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
#endif
mmc->caps |= MMC_CAP_SDIO_IRQ;
// mmc->caps |= MMC_CAP_NEEDS_POLL;
mmc->f_min = host->asic_clkrate / (255+1 + 255+1);
mmc->f_max = host->asic_clkrate / (0+1 + 0+1);
mmc->f_max = mmc->f_max < fmax ? mmc->f_max : fmax;
/*
* We can do SGIO
*/
mmc->max_hw_segs = 16;
mmc->max_phys_segs = NR_SG;
/*
* Since we only have a 16-bit data length register, we must
* ensure that we don't exceed 2^16-1 bytes in a single request.
*/
mmc->max_req_size = 65535;
/*
* Set the maximum segment size. Since we aren't doing DMA
* (yet) we are only limited by the data length register.
*/
mmc->max_seg_size = mmc->max_req_size;
#if 0
/*
* Block size can be up to 2048 bytes, but must be a power of two.
*/
mmc->max_blk_size = 2048;
#else
/* as l2 fifo limit to 512 bytes */
mmc->max_blk_size = 512;
#endif
/*
* No limit on the number of blocks transferred.
*/
mmc->max_blk_count = mmc->max_req_size;
spin_lock_init(&host->lock);
ak98_group_config(ePIN_AS_SDIO);
writel(MCI_ENABLE|MCI_FAIL_TRIGGER, host->base + AK98MCICLOCK);
PK("%s: MCICLOCK: 0x%08x\n", __func__, readl(host->base + AK98MCICLOCK));
writel(0, host->base + AK98MCIMASK);
PK("request irq %i\n", irq);
ret = request_irq(irq, ak98_sdio_irq, IRQF_DISABLED, DRIVER_NAME " (cmd)", host);
if (ret)
goto unmap;
host->irq_mci = irq;
if(plat->gpio_cd >= 0)
{
host->gpio_cd = plat->gpio_cd;
ak98_gpio_cfgpin(host->gpio_cd, AK98_GPIO_DIR_INPUT);
ak98_gpio_pulldown(host->gpio_cd,AK98_PULLDOWN_DISABLE);
ak98_gpio_pullup(host->gpio_cd, AK98_PULLUP_ENABLE);
setup_timer(&host->detect_timer, ak98_sdio_detect_change,
(unsigned long)host);
irq = ak98_gpio_to_irq(host->gpio_cd);
ret = request_irq(irq, ak98_sdio_card_detect_irq,
IRQF_DISABLED,
DRIVER_NAME " cd", host);
printk("request gpio irq ret = %d, irq=%d", ret, irq);
if (ret)
goto irq_free;
host->irq_cd = irq;
host->irq_cd_type = IRQ_TYPE_LEVEL_LOW;
}
if(plat->gpio_wp >= 0)
{
host->gpio_wp = plat->gpio_wp;
ak98_gpio_cfgpin(host->gpio_wp, AK98_GPIO_DIR_INPUT);
ak98_gpio_pullup(host->gpio_wp, AK98_PULLUP_ENABLE);
ak98_gpio_pulldown(host->gpio_wp,AK98_PULLDOWN_DISABLE);
}
platform_set_drvdata(pdev, mmc);
ret = ak98sdio_cpufreq_register(host);
if (ret) {
goto irq_free;
}
ret = mmc_add_host(mmc);
if (ret) {
goto cpufreq_free;
}
PK(KERN_INFO "%s: ak98MCI at 0x%016llx irq %d\n",
mmc_hostname(mmc), (unsigned long long)res->start,
host->irq_mci);
return 0;
cpufreq_free:
PK("ERR cpufreq_free\n");
ak98sdio_cpufreq_deregister(host);
irq_free:
PK("ERR irq_free\n");
free_irq(host->irq_mci, host);
unmap:
PK("ERR unmap\n");
iounmap(host->base);
clk_disable:
PK("ERR clk_disable\n");
clk_disable(host->clk);
clk_free:
PK("ERR clk_free\n");
clk_put(host->clk);
host_free:
PK("ERR host_free\n");
mmc_free_host(mmc);
out:
PK("ERR out\n");
return ret;
}
