//遥控引脚初始化 //PTA4,PTA5,PTA14,PTA15 //使能中断,中断服务函数在 PredatorCamera.c 中 void RemoteControlInit(void) { PORT_PCR_REG(PORTA_BASE_PTR, 4) = (0 | PORT_PCR_MUX(1) | 0x0003 //输入下拉 |PORT_PCR_IRQC(0) //下降沿中断 ); //设置端口方向为输入 GPIO_PDDR_REG(PTA_BASE_PTR) &= ~(1 << 4); PORT_PCR_REG(PORTA_BASE_PTR, 5) = (0 | PORT_PCR_MUX(1) | 0x0003//输入下拉 |PORT_PCR_IRQC(0) //下降沿中断 ); //设置端口方向为输入 GPIO_PDDR_REG(PTA_BASE_PTR) &= ~(1 << 5); PORT_PCR_REG(PORTA_BASE_PTR, 14) = (0 | PORT_PCR_MUX(1) | 0x03 //输入下拉 |PORT_PCR_IRQC(0) //下降沿中断 ); //设置端口方向为输入 GPIO_PDDR_REG(PTA_BASE_PTR) &= ~(1 << 14); PORT_PCR_REG(PORTA_BASE_PTR, 15) = (0 | PORT_PCR_MUX(1) | 0x03 //输入下拉 |PORT_PCR_IRQC(0) //下降沿中断 ); //设置端口方向为输入 GPIO_PDDR_REG(PTA_BASE_PTR) &= ~(1 << 15); }
void port_config (void) { extern uint32 __VECTOR_RAM[]; //Get vector table that was copied to RAM /* Turn on all port clocks */ SIM_SCGC5|= SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK; /* NVIC Configuration */ #if ( defined(TWR_K40X256) | defined (TWR_K53N512) ) __VECTOR_RAM[104]=(uint_32)PortB_ISR; //replace ISR NVICICER2|=(1<<24); //Clear any pending interrupts NVICISER2|=(1<<24); //Enable interrupts PORTB_PCR9=(0|PORT_PCR_MUX(1)); // configure pin as GPIO GPIOB_PDDR|=(1<<9); // set as output PORTB_PCR7=(0|PORT_PCR_MUX(1)|PORT_PCR_PE_MASK|PORT_PCR_PS_MASK|PORT_PCR_IRQC(0x0A)); #else /* TWR_K60N512 */ __VECTOR_RAM[103]=(uint_32)PortA_ISR; //replace ISR NVICICER2|=(1<<23); //Clear any pending interrupts NVICISER2|=(1<<23); //Enable interrupts PORTB_PCR8=(0|PORT_PCR_MUX(1)); // configure pin as GPIO GPIOB_PDDR|=(1<<8); // set as output PORTA_PCR26=(0|PORT_PCR_MUX(1)|PORT_PCR_PE_MASK|PORT_PCR_PS_MASK|PORT_PCR_IRQC(0x0A)); #endif }
/* ===================================================================*/ LDD_TDeviceData* ExtIntLdd5_Init(LDD_TUserData *UserDataPtr) { /* Allocate LDD device structure */ ExtIntLdd5_TDeviceData *DeviceDataPrv; /* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; /* Store the UserData pointer */ DeviceDataPrv->UserData = UserDataPtr; /* Interrupt vector(s) allocation */ /* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */ INT_PORTE__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv; /* Initialization of Port Control registers */ /* PORTE_PCR11: ISF=0,MUX=1 */ PORTE_PCR11 = (uint32_t)((PORTE_PCR11 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_MUX(0x01) )); /* PORTE_PCR11: ISF=1,IRQC=9 */ PORTE_PCR11 = (uint32_t)((PORTE_PCR11 & (uint32_t)~(uint32_t)( PORT_PCR_IRQC(0x06) )) | (uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x09) )); /* NVICIP91: PRI91=0x80 */ NVICIP91 = NVIC_IP_PRI91(0x80); /* NVICISER2: SETENA|=0x08000000 */ NVICISER2 |= NVIC_ISER_SETENA(0x08000000); /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_ExtIntLdd5_ID,DeviceDataPrv); return ((LDD_TDeviceData *)DeviceDataPrv); }
void initButton(void) { //Set PTC5 (connected to SW3) for GPIO functionality, falling IRQ, // and to use internal pull-ups. (pin defaults to input state) // allow clock to port C SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK; // Outside button for start/stop PORTC_PCR13 = PORT_PCR_MUX(1) | PORT_PCR_IRQC(10) | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK; // Inside button for mode switch PORTC_PCR5 = PORT_PCR_MUX(1) | PORT_PCR_IRQC(10) | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK; NVICIP89 |= 0x30; // sets button priority enable_irq(89); // port c Interrupt }
void Port_Init(void) { // setup ports PORTE_PCR26 = (PORT_PCR_ISF_MASK | // clear Flag if there PORT_PCR_MUX(01) | // GPIO PORT_PCR_IRQC(0x0A) | // falling edge enable PORT_PCR_PE_MASK | // Pull enable PORT_PCR_PS_MASK); // pull up enable PORTA_PCR19 = (PORT_PCR_ISF_MASK | // clear Flag if there PORT_PCR_MUX(01) | // GPIO PORT_PCR_IRQC(0x09) | // rising edge enable PORT_PCR_PE_MASK | // Pull enable PORT_PCR_PS_MASK); // pull up enable // select PTA6 to be FB_CLK to display bus clock PORTA_PCR6 = PORT_PCR_MUX(5) | PORT_PCR_DSE_MASK; // Set PORTA bit 6 as Alt 5 FB_CLKOUT #if (defined(TWR_K60N512)) PORTA_PCR10 = PORT_PCR_MUX(3); // Port A10 as FTM2_CH0 #endif #if (defined(TWR_K40X256)) PORTC_PCR7 = PORT_PCR_MUX(1); // Port C7 as GPIO GPIOC_PDDR = 0x80; // Set PORTC bit 7 as output #endif }
//拨码开关初始化 //PTC1-4输入上拉 ,不允许中断 void SwitchInit(void) { //PTC0输入上拉 ,不允许中断 PORT_PCR_REG(PORTC_BASE_PTR,0) = (0 | PORT_PCR_MUX(1) | 0x03|PORT_PCR_IRQC(0) ); GPIO_PDDR_REG(PTC_BASE_PTR) &= ~(1 << 0); //设置端口方向为输入 //PTC1输入上拉 ,不允许中断 PORT_PCR_REG(PORTC_BASE_PTR,1) = (0 | PORT_PCR_MUX(1) | 0x03|PORT_PCR_IRQC(0) ); GPIO_PDDR_REG(PTC_BASE_PTR) &= ~(1 << 1); //设置端口方向为输入 //PTC2输入上拉 ,不允许中断 PORT_PCR_REG(PORTC_BASE_PTR,2) = (0 | PORT_PCR_MUX(1) | 0x03|PORT_PCR_IRQC(0) ); GPIO_PDDR_REG(PTC_BASE_PTR) &= ~(1 << 2); //设置端口方向为输入 //PTC3输入上拉 ,不允许中断 PORT_PCR_REG(PORTC_BASE_PTR,3) = (0 | PORT_PCR_MUX(1) | 0x03|PORT_PCR_IRQC(0) ); GPIO_PDDR_REG(PTC_BASE_PTR) &= ~(1 << 3); //设置端口方向为输入 }
//------------------------------------------------------------ // I2C module config //------------------------------------------------------------ void iI2C_Config(void) { // I2C clock enable // System Clock Gating Control Register 4 (SIM_SCGC4) // K60 Sub-Family Reference Manual, Rev. 2 Jun 2012 page 304 SIM_SCGC4|=SIM_SCGC4_I2C0_MASK; // PTE24 --> SCL I2C0 --> Accéléromètre et magnétomètre FXOS8700CQ PORTE_PCR24 = 0|PORT_PCR_PS_MASK|PORT_PCR_PE_MASK|PORT_PCR_DSE_MASK|(PORT_PCR_MUX(5)); // PTE25 --> SDA I2C0 --> Accéléromètre et magnétomètre FXOS8700CQ PORTE_PCR25 = 0|PORT_PCR_PS_MASK|PORT_PCR_PE_MASK|PORT_PCR_ODE_MASK|PORT_PCR_DSE_MASK|(PORT_PCR_MUX(5)); // PTB2 --> IO input --> interrupt INT1 FXOS8700CQ PORTB_PCR2 = 0|PORT_PCR_PS_MASK|PORT_PCR_ISF_MASK|PORT_PCR_IRQC(0xA)|(PORT_PCR_MUX(1)); // PTB3 --> IO input --> interrupt INT2 FXOS8700CQ PORTB_PCR3 = 0|PORT_PCR_PS_MASK|(PORT_PCR_MUX(1)); // Enable de l'interrupt INT1 de l'accéléromètre enable_irq(INT_PORTB-16); // Baud rate speed and I2C timing // I2C Frequency Divider register (I2Cx_F) // K60 Sub-Family Reference Manual, Rev. 2 Jun 2012 page 1457 // I2C clock rate=390,625 kHz (max 400kHz) // SDA Hold = 0.42us (max 0.9us) // SCL start Hold = 1.16 us (min 0.6us) // SCL stop Hold = 1.3 us (min 0.6us I2C0_F=0; I2C0_F|=I2C_F_ICR(0x17)|I2C_F_MULT(0); }
/************************************************************************* * 蓝宙电子科技有限公司 * * 函数名称:gpio_Interrupt_init * 功能说明:初始化gpio * 参数说明:PTxn 端口号(PORTA,PORTD) * IO 引脚方向,0=输入,1=输出,输入输出状态定义____________(修改:这个函数中只有定义为输入模式有效,否则不改变相关状态) * mode 中断模式 * 函数返回:无 * 修改时间:2012-9-15 已测试 * 备 注: *************************************************************************/ void gpio_Interrupt_init(PTxn ptxn, GPIO_CFG cfg, GPIO_INP mode) { ASSERT( (PTn(ptxn) < 32u) ); //使用断言检查输入、电平 是否为1bit //选择功能脚 PORTx_PCRx ,每个端口都有个寄存器 PORTx_PCRx PORT_PCR_REG(PORTX_BASE(ptxn), PTn(ptxn)) = (0 | PORT_PCR_MUX(1) | cfg | PORT_PCR_IRQC(mode) ); //选择功能脚 PORTx_PCRx ,每个端口都有中断模型 // PORT_DFER_REG(PORTX_BASE(ptxn)) = PORT_DFER_DFE( 1<<PTn(ptxn)); //端口方向控制输入还是输出 if( ( (cfg & 0x01) == GPI) || (cfg == GPI_UP) || (cfg == GPI_UP_PF) || (cfg == GPI_DOWN) || (cfg == GPI_DOWN_PF) ) // 最低位为0则输入 || 输入上拉模式 || 输入上拉,带无源滤波器 { GPIO_PDDR_REG(GPIOX_BASE(ptxn)) &= ~(1 << PTn(ptxn)); //设置端口方向为输入 } if(PTX(ptxn)==0) enable_irq(PortA_irq_no); else if(PTX(ptxn)==3) enable_irq(PortD_irq_no); }
_mqx_int _bsp_i2c_io_init ( uint32_t dev_num ) { #define ALT2 0x2 PORT_MemMapPtr pctl; SIM_MemMapPtr sim = SIM_BASE_PTR; switch (dev_num) { case 0: pctl = (PORT_MemMapPtr)PORTB_BASE_PTR; pctl->PCR[2] = PORT_PCR_MUX(ALT2) | PORT_PCR_ODE_MASK; /* I2C0.SCL */ pctl->PCR[3] = PORT_PCR_MUX(ALT2) | PORT_PCR_ODE_MASK; /* I2C0.SDA */ /* Enable SDA rising edge detection */ #if BSPCFG_ENABLE_LEGACY_II2C_SLAVE pctl->PCR[3] |= PORT_PCR_IRQC(0x09); pctl->PCR[3] |= PORT_PCR_ISF_MASK; #endif sim->SCGC4 |= SIM_SCGC4_I2C0_MASK; break; default: /* Do nothing if bad dev_num was selected */ return -1; } return MQX_OK; }
void gpio_set_pin_mode(GPIO_MemMapPtr gpioMapPtr, uint8_t pin, uint8_t mode) { PORT_MemMapPtr portMapPtr; if(gpioMapPtr == PTA) { portMapPtr = PORTA; }else if(gpioMapPtr == PTB) { portMapPtr = PORTB; }else if(gpioMapPtr == PTC) { portMapPtr = PORTC; }else if(gpioMapPtr == PTD) { portMapPtr = PORTD; }else if(gpioMapPtr == PTE) { portMapPtr = PORTE; } PORT_PCR_REG(portMapPtr, pin) |= PORT_PCR_MUX(0x01); switch(mode) { case INPUT: GPIO_PDDR_REG(gpioMapPtr) &= (~(1<<pin)); break; case INPUT_PULLUP: GPIO_PDDR_REG(gpioMapPtr) &= (~(1<<pin)); PORT_PCR_REG(portMapPtr, pin) |= (PORT_PCR_PE_MASK | PORT_PCR_PS_MASK); break; case INPUT_PULLDWN: GPIO_PDDR_REG(gpioMapPtr) &= (~(1<<pin)); PORT_PCR_REG(portMapPtr, pin) |= (PORT_PCR_PE_MASK); PORT_PCR_REG(portMapPtr, pin) &= (~PORT_PCR_PS_MASK); break; case OUTPUT: GPIO_PDDR_REG(gpioMapPtr) |= ((1<<pin)); break; case OUTPUT_HIGH: GPIO_PDDR_REG(gpioMapPtr) |= ((1<<pin));\ PORT_PCR_REG(portMapPtr, pin) |= PORT_PCR_DSE_MASK; break; case INPUT_PULLUP_INT: GPIO_PDDR_REG(gpioMapPtr) &= (~(1<<pin)); PORT_PCR_REG(portMapPtr, pin) |= (PORT_PCR_PE_MASK | PORT_PCR_PS_MASK | PORT_PCR_IRQC(0xA)); break; default: break; } }
void vfnPS2_Config(void) { SIM_SCGC5 |= SIM_SCGC5_PORTD_MASK; PORTD_PCR5 = PORT_PCR_MUX(1) | PORT_PCR_PE_MASK | PORT_PCR_IRQC(10);//QUE ES ESTO IRQC PORTD_PCR0 = PORT_PCR_MUX(1) | PORT_PCR_PE_MASK; NVIC_ISER = 1<<31; }
void ModeControl_Initialize(void) { LED_Initialize(); // TEMP PORTC_PCR5 = PORT_PCR_IRQC(10) | PORT_PCR_MUX(1) ; GPIOC_PDDR |= (0 << 5); NVIC_EnableIRQ(PORTC_IRQn);// TEMP ModeControl_changeMode(0); previousMode = NUM_OF_MODES-1; }
/* ===================================================================*/ LDD_TDeviceData* ExtIntLdd2_Init(LDD_TUserData *UserDataPtr) { /* Allocate LDD device structure */ ExtIntLdd2_TDeviceData *DeviceDataPrv; /* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; /* Store the UserData pointer */ DeviceDataPrv->UserData = UserDataPtr; /* Interrupt vector(s) allocation */ /* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */ INT_PORTA__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv; /* Enable device clock gate */ /* SIM_SCGC5: PORTA=1 */ SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK; /* Initialization of pin routing */ /* PORTA_PCR4: ISF=0,MUX=1 */ PORTA_PCR4 = (uint32_t)((PORTA_PCR4 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_MUX(0x01) )); /* PORTA_PCR4: ISF=1,IRQC=0x0B */ PORTA_PCR4 = (uint32_t)((PORTA_PCR4 & (uint32_t)~(uint32_t)( PORT_PCR_IRQC(0x04) )) | (uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x0B) )); /* NVIC_IPR7: PRI_30=1 */ NVIC_IPR7 = (uint32_t)((NVIC_IPR7 & (uint32_t)~(uint32_t)( NVIC_IP_PRI_30(0x02) )) | (uint32_t)( NVIC_IP_PRI_30(0x01) )); /* NVIC_ISER: SETENA31=0,SETENA30=1,SETENA29=0,SETENA28=0,SETENA27=0,SETENA26=0,SETENA25=0,SETENA24=0,SETENA23=0,SETENA22=0,SETENA21=0,SETENA20=0,SETENA19=0,SETENA18=0,SETENA17=0,SETENA16=0,SETENA15=0,SETENA14=0,SETENA13=0,SETENA12=0,SETENA11=0,SETENA10=0,SETENA9=0,SETENA8=0,SETENA7=0,SETENA6=0,SETENA5=0,SETENA4=0,SETENA3=0,SETENA2=0,SETENA1=0,SETENA0=0 */ NVIC_ISER = NVIC_ISER_SETENA30_MASK; /* NVIC_ICER: CLRENA31=0,CLRENA30=0,CLRENA29=0,CLRENA28=0,CLRENA27=0,CLRENA26=0,CLRENA25=0,CLRENA24=0,CLRENA23=0,CLRENA22=0,CLRENA21=0,CLRENA20=0,CLRENA19=0,CLRENA18=0,CLRENA17=0,CLRENA16=0,CLRENA15=0,CLRENA14=0,CLRENA13=0,CLRENA12=0,CLRENA11=0,CLRENA10=0,CLRENA9=0,CLRENA8=0,CLRENA7=0,CLRENA6=0,CLRENA5=0,CLRENA4=0,CLRENA3=0,CLRENA2=0,CLRENA1=0,CLRENA0=0 */ NVIC_ICER = 0x00U; /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_ExtIntLdd2_ID,DeviceDataPrv); return ((LDD_TDeviceData *)DeviceDataPrv); }
//---------Init Button & Vector interrupt------------------- int32_t GPIO_EnableEINT(void) { NVIC_EnableIRQ(PORTC_PORTD_IRQn); //NIVC enable interrupt SIM->SCGC5 |= (1UL << 11); /* Enable Clock Port C*/ PORTC->PCR[12] = ((1UL << 0) | /* Pull Select is pullup */ (1UL << 1) | /* Pull Enable */ (1UL << 8) | /* Pin is GPIO */ PORT_PCR_IRQC(9)); /*Interrupt enable*/ PORTC->PCR[3] = ((1UL << 0) | /* Pull Select is pullup */ (1UL << 1) | /* Pull Enable */ (1UL << 8) | /* Pin is GPIO */ PORT_PCR_IRQC(9)); /*Interrupt enable*/ PTC->PDDR &= ~(1U << 12); /* configure PTC12 as input */ PTC->PDDR &= ~(1U << 3); /* configure PTC3 as input */ return (0); }
bool adc_initialize(void){ char i = 0; // oversampling, os0-os2 = 0x00; const uint32_t OS0_MASK = 1 << 9; const uint32_t OS1_MASK = 1 << 10; const uint32_t OS2_MASK = 1 << 11; const uint32_t OS_SAMPLING_MASK = OS0_MASK | OS1_MASK | OS2_MASK; // todo: убрать отсюда: переделать на проверку, к примеру, is_initialized в measNsignals(..) // эти инициализации здесь - лишние и противоречат всем принципам модульности // плюс сложность обработки ошибок res = VectorsInit(0x01); fr = FreqFInit(); SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTF_MASK; PORTB->PCR[9] |= PORT_PCR_MUX(0x01); // OS0-OS2, GPIO PORTB->PCR[10] |= PORT_PCR_MUX(0x01); PORTB->PCR[11] |= PORT_PCR_MUX(0x01); PTB->PDDR |= OS_SAMPLING_MASK; // выходы PTB->PSOR |= OS0_MASK; // OS0 = 1 PTB->PSOR |= OS1_MASK; // OS1 = 1 PTB->PCOR |= OS2_MASK; // OS2 = 0 // ADC_BUSY, высокий уровень, вход PORTF->PCR[16] = PORT_PCR_IRQC(0x0a) | PORT_PCR_MUX(0x01); // GPIO + прерывание по спаду(0x0a) PTF->PDDR &= (uint32_t)~(1UL << 16); // вход // ADC_CONV, низкий уровень, выход PORTF->PCR[17] = PORT_PCR_MUX(0x01); // ADC_CONV, GPIO PTF->PDDR |= 1UL << 17; // выход ADC_CONV_OFF(); // ADC_RES, высокий уровень, output PORTF->PCR[18] = PORT_PCR_MUX(0x01); // ADC_RES, GPIO PTF->PDDR |= 1UL << 18; // выход // ADC_CS, низкий уровень, выход PORTF->PCR[19] |= PORT_PCR_MUX(0x01); // ADC_CS_RD, GPIO PTF->PDDR |= 1UL << 19; // выход ADC_CS_RD_OFF(); // шина данных ацп for(i = 0; i < 16; i++){ PORTF->PCR[i] = PORT_PCR_MUX(0x01); // GPIO PTF->PDDR &= (uint32_t)~(1UL << i); // вход } // PIT0, 104us таймер, генерирующий прерывания SIM->SCGC6 |= SIM_SCGC6_PIT_MASK; PIT->MCR = 0x00UL; //PIT->CHANNEL[0].LDVAL = 0x00001E77; // 104us //PIT->CHANNEL[0].LDVAL = 0x00001E83; // 104.16us(<9600) PIT->CHANNEL[0].LDVAL = 0x00001E84; // 104.173us(>9600) PIT->CHANNEL[0].TCTRL = PIT_TCTRL_TIE_MASK | PIT_TCTRL_TEN_MASK; return true; }
BOOL Accel_Init(const TAccelSetup* const accelSetup) { TAccelMode CurrentMode; DataCallback = accelSetup->dataReadyCallbackFunction; DataCallbackArgument = accelSetup->dataReadyCallbackArguments; ReadCallback = accelSetup->readCompleteCallbackFunction; ReadCallbackArgument = accelSetup->readCompleteCallbackArguments; //Let there be clocks! SIM_SCGC5 |= SIM_SCGC5_PORTB_MASK; /*portb GPIO, clear interrupt, interrupt on falling edge.*/ PORTB_PCR7 = (PORT_PCR_MUX(0x01) | PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x0A)); /* NVICIP88: PRI88=0x80 */ NVICIP88 = NVIC_IP_PRI88(0x80); /* NVICISER2: SETENA|=0x01000000 */ NVICISER2 |= NVIC_ISER_SETENA(0x01000000); //Check if we are connected to the correct device uint8_t whoAmI; I2C_SelectSlaveDevice(MMA8451Q_ADDR_SA0_HIGH); //TODO: uncomment /* I2C_PollRead(MMA8451Q_WHO_AM_I, &whoAmI, 1); if (whoAmI != MMA8451Q_WHO_AM_I_VALUE) { //This is not the i2c device we are looking for return bFALSE; } */ //Reset the accelerometer //TODO: uncomment /*I2C_Write(MMA8451Q_CTRL_REG2, MMA8451Q_CTRL_REG2_RST_MASK, bFALSE); uint8_t reg2 = MMA8451Q_CTRL_REG2_RST_MASK; while (reg2 & MMA8451Q_CTRL_REG2_RST_MASK) { I2C_PollRead(MMA8451Q_CTRL_REG2, ®2, 1); }*/ /* * activate * enable fast read * low noise * data rate 1.56Hz (0x38) * */ I2C_Write(MMA8451Q_CTRL_REG1, (0x38 | MMA8451Q_CTRL_REG1_ACTIVE_MASK | MMA8451Q_CTRL_REG1_F_READ_MASK | MMA8451Q_CTRL_REG1_LNOISE_MASK), bFALSE); return bTRUE; }
void port_config (void) { /* Turn on all port clocks */ SIM_SCGC5|= SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK; /* NVIC Configuration */ #ifdef TWR_K40X256 NVICICER2|=(1<<24); //Clear any pending interrupts NVICISER2|=(1<<24); //Enable interrupts PORTB_PCR9=(0|PORT_PCR_MUX(1)); // configure pin as GPIO GPIOB_PDDR|=(1<<9); // set as output PORTB_PCR7=(0|PORT_PCR_MUX(1)|PORT_PCR_PE_MASK|PORT_PCR_PS_MASK|PORT_PCR_IRQC(0x0A)); #else NVICICER2|=(1<<23); //Clear any pending interrupts NVICISER2|=(1<<23); //Enable interrupts PORTB_PCR8=(0|PORT_PCR_MUX(1)); // configure pin as GPIO GPIOB_PDDR|=(1<<8); // set as output PORTA_PCR26=(0|PORT_PCR_MUX(1)|PORT_PCR_PE_MASK|PORT_PCR_PS_MASK|PORT_PCR_IRQC(0x0A)); #endif }
/* ===================================================================*/ LDD_TDeviceData* ExtIntLdd1_Init(LDD_TUserData *UserDataPtr) { /* Allocate LDD device structure */ ExtIntLdd1_TDeviceData *DeviceDataPrv; /* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; /* Store the UserData pointer */ DeviceDataPrv->UserData = UserDataPtr; /* Interrupt vector(s) allocation */ /* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */ INT_PORTC__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv; /* Enable device clock gate */ /* SIM_SCGC5: PORTC=1 */ SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK; /* Initialization of pin routing */ /* PORTC_PCR7: ISF=0,MUX=1 */ PORTC_PCR7 = (uint32_t)((PORTC_PCR7 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_MUX(0x01) )); /* PORTC_PCR7: ISF=1,IRQC=9 */ PORTC_PCR7 = (uint32_t)((PORTC_PCR7 & (uint32_t)~(uint32_t)( PORT_PCR_IRQC(0x06) )) | (uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x09) )); /* NVICIP61: PRI61=0x70 */ NVICIP61 = NVIC_IP_PRI61(0x70); /* NVICISER1: SETENA|=0x20000000 */ NVICISER1 |= NVIC_ISER_SETENA(0x20000000); /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_ExtIntLdd1_ID,DeviceDataPrv); return ((LDD_TDeviceData *)DeviceDataPrv); }
static void prvSetupHardware( void ) { /* Enable the interrupt on SW1. */ taskDISABLE_INTERRUPTS(); PORTE_PCR26 = PORT_PCR_MUX( 1 ) | PORT_PCR_IRQC( 0xA ) | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK; enable_irq( mainGPIO_E_VECTOR ); /* The interrupt calls an interrupt safe API function - so its priority must be equal to or lower than configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY. */ set_irq_priority( mainGPIO_E_VECTOR, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); /* Configure the LED outputs. */ vParTestInitialise(); }
/* ===================================================================*/ LDD_TDeviceData* ExtIntLdd1_Init(LDD_TUserData *UserDataPtr) { /* Allocate LDD device structure */ ExtIntLdd1_TDeviceData *DeviceDataPrv; /* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; /* Store the UserData pointer */ DeviceDataPrv->UserData = UserDataPtr; /* Interrupt vector(s) allocation */ /* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */ INT_PORTA__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv; /* Clear interrupt status flag */ PORTA_ISFR = PORT_ISFR_ISF(0x02); /* Initialization of Port Control registers */ /* PORTA_PCR1: ISF=0,IRQC=0x0A,MUX=1 */ PORTA_PCR1 = (uint32_t)((PORTA_PCR1 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x05) | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_IRQC(0x0A) | PORT_PCR_MUX(0x01) )); /* NVIC_IPR7: PRI_30=0x40 */ NVIC_IPR7 = (uint32_t)((NVIC_IPR7 & (uint32_t)~(uint32_t)( NVIC_IP_PRI_30(0xBF) )) | (uint32_t)( NVIC_IP_PRI_30(0x40) )); /* NVIC_ISER: SETENA|=0x40000000 */ NVIC_ISER |= NVIC_ISER_SETENA(0x40000000); /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_ExtIntLdd1_ID,DeviceDataPrv); return ((LDD_TDeviceData *)DeviceDataPrv); }
/* ===================================================================*/ void LEDGreen_Deinit(LDD_TDeviceData *DeviceDataPtr) { (void)DeviceDataPtr; /* Parameter is not used, suppress unused argument warning */ /* PORTC_PCR10: ISF=0,IRQC=0 */ PORTC_PCR10 &= (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x0F) ); /* GPIOC_PDDR: PDD&=~0x0400 */ GPIOC_PDDR &= (uint32_t)~(uint32_t)(GPIO_PDDR_PDD(0x0400)); /* Unregistration of the device structure */ PE_LDD_UnregisterDeviceStructure(PE_LDD_COMPONENT_LEDGreen_ID); /* Deallocation of the device structure */ /* {Default RTOS Adapter} Driver memory deallocation: Dynamic allocation is simulated, no deallocation code is generated */ }
// adc_busy falling edge interrupt void PORTF_IRQHandler(void){ char i; if((PORTF->ISFR & (1ul << 16)) != 0){ PORTF->PCR[16] &= (uint32_t)~PORT_PCR_IRQC(0x0a); for(i = 0; i < 8; i++){ ADC_CS_RD_ON(); // read the word __triple_nop(); adc_sample[i] = PTF->PDIR & 0x0000FFFF; // read v[i], suppose to be > 37ns (max datasheet value) ADC_CS_RD_OFF(); // success __nop(); } //measNsignals((short*)&adc_sample, &fr, &res); PORTF->PCR[16] |= PORT_PCR_IRQC(0x0a); } }
/*KEY initial*/ void KEY_Init() { /*enable PORTB,PORTC,PORTE clock*/ SIM_SCGC5|=SIM_SCGC5_PORTB_MASK+SIM_SCGC5_PORTE_MASK; /*portB set to GPIO,raising edge interrupt,no pull enable,passive filter enable*/ PORTB_PCR8=PORT_PCR_MUX(0X1)+PORT_PCR_IRQC(0X0A)+PORT_PCR_PE_MASK+PORT_PCR_PS_MASK; PORTB_PCR9=PORT_PCR_MUX(0X1)+PORT_PCR_IRQC(0X0A)+PORT_PCR_PE_MASK+PORT_PCR_PS_MASK; PORTB_PCR16=PORT_PCR_MUX(0X1)+PORT_PCR_IRQC(0X0A)+PORT_PCR_PE_MASK+PORT_PCR_PS_MASK; PORTB_PCR17=PORT_PCR_MUX(0X1)+PORT_PCR_IRQC(0X0A)+PORT_PCR_PE_MASK+PORT_PCR_PS_MASK; /*portE set to GPIO,raising edge interrupt,no pull enable,passive filter enable*/ PORTE_PCR2=PORT_PCR_MUX(0X1)+PORT_PCR_IRQC(0X0A)+PORT_PCR_PE_MASK+PORT_PCR_PS_MASK; PORTE_PCR3=PORT_PCR_MUX(0X1)+PORT_PCR_IRQC(0X0A)+PORT_PCR_PE_MASK+PORT_PCR_PS_MASK; PORTE_PCR4=PORT_PCR_MUX(0X1)+PORT_PCR_IRQC(0X0A)+PORT_PCR_PE_MASK+PORT_PCR_PS_MASK; PORTE_PCR5=PORT_PCR_MUX(0X1)+PORT_PCR_IRQC(0X0A)+PORT_PCR_PE_MASK+PORT_PCR_PS_MASK; }
/* * enables an interrupt on a pin. needs edge trigger and callback function specified */ void gpio_enable_interrupt(port_t p_port, pin_t p_pin, trig_t p_trig, callback_t p_callback) { unsigned int * custom_PCR = (unsigned int *)(PORTX_PCR_BASE + p_port * 0x1000 + p_pin * 0x4); if(p_port == port_C) { gpio_c_callback[p_pin] = p_callback; } else if(p_port == port_D) { gpio_d_callback[p_pin] = p_callback; } //enable pin interrupt with trigger *custom_PCR &= ~PORT_PCR_IRQC_MASK; *custom_PCR |= PORT_PCR_IRQC(p_trig); //config priority int_init(INT_PORTC_PORTD, priority_1); }
void gpio_init(void) { /* Ports mit Clock aktivieren gemäss Reference Manual 12.2.9*/ SIM->SCGC5 = SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK; /* Gewünschte Pins auf GPIO setzten * gemäss RM 11.5.1 Pin Control Register */ PORTB->PCR[18] = PORT_PCR_MUX(1); //Red PORTB->PCR[19] = PORT_PCR_MUX(1); //Green PORTD->PCR[1] = PORT_PCR_MUX(1); //Blue // PORTD->PCR[5] = PORT_PCR_MUX(1); //SW PORTD->PCR[5] = PORT_PCR_ISF_MASK| // Clear the interrupt flag PORT_PCR_MUX(0x1)| // PORT is configured as GPIO PORT_PCR_IRQC(0x9); // PORT is configured for falling edge interrupts /* LED Pins als Outputs definieren * gemäss RM 41.2.6 Port Data Direction Register */ GPIOB->PDDR |= 1 << 18; GPIOB->PDDR |= 1 << 19; GPIOD->PDDR |= 1 << 1; /* SW Pin als Input definieren * gemäss RM 41.2.6 Port Data Direction Register */ GPIOD->PDDR &= ~(1<<5); /* LED Pins einschalten (HI) => Led leuchten nicht * gemäss RM 41.2.2 Port Set Output Register */ GPIOB->PSOR |= 1 << 18; GPIOB->PSOR |= 1 << 19; GPIOD->PSOR |= 1 << 1; NVIC_ClearPendingIRQ(PORTD_IRQn); NVIC_EnableIRQ(PORTD_IRQn); }
static void prvSetupHardware( void ) { /* Enable the interrupt on SW1. */ PORTE_PCR26 = PORT_PCR_MUX( 1 ) | PORT_PCR_IRQC( 0xA ) | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK; enable_irq( mainGPIO_E_VECTOR ); /* The interrupt calls an interrupt safe API function - so its priority must be equal to or lower than configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY. */ set_irq_priority( mainGPIO_E_VECTOR, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); /* Set PTA10, PTA11, PTA28, and PTA29 (connected to LED's) for GPIO functionality. */ PORTA_PCR10 = ( 0 | PORT_PCR_MUX( 1 ) ); PORTA_PCR11 = ( 0 | PORT_PCR_MUX( 1 ) ); PORTA_PCR28 = ( 0 | PORT_PCR_MUX( 1 ) ); PORTA_PCR29 = ( 0 | PORT_PCR_MUX( 1 ) ); /* Change PTA10, PTA29 to outputs. */ GPIOA_PDDR=GPIO_PDDR_PDD( mainTASK_CONTROLLED_LED | mainTIMER_CONTROLLED_LED ); /* Start with LEDs off. */ GPIOA_PTOR = ~0U; }
/*IRQ_NONE 0x0. no documentation IRQ_DMA_RISING 0x1. no documentation IRQ_DMA_FALLING 0x2. no documentation IRQ_DMA_EITHER 0x3. no documentation IRQ_ZERO 0x8. no documentation IRQ_RISING 0x9. no documentation IRQ_FALLING 0xa. no documentation IRQ_EITHER 0xb. no documentation IRQ_ONE 0xc. no documentation * * * * */ void InitButtons(void){ /* Configure pin as input */ /* GPIOB_PDDR: PDD&=~0x0100 */ //Port 8 /* GPIOB_PDDR: PDD&=~0x0200 */ //Port 9 GPIOB_PDDR &= (uint32_t)~(uint32_t)(GPIO_PDDR_PDD( GPIO_PIN(9)| GPIO_PIN(8)| GPIO_PIN(10) | GPIO_PIN(11))); /* Initialization of Port Control register */ /* PORTB_PCR8: ISF=0,MUX=1 */ PORTB_PCR8 = (uint32_t)((PORTB_PCR8 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_MUX(0x01) )); PORTB_PCR9 = (uint32_t)((PORTB_PCR9 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_MUX(0x01) )); PORTB_PCR10 = (uint32_t)((PORTB_PCR10 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_MUX(0x01) )); PORTB_PCR11 = (uint32_t)((PORTB_PCR11 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_MUX(0x01) )) | PORT_PCR_IRQC(0xA); }
void MCU_Init(void) { //I2C0 module initialization SIM_SCGC4 |= SIM_SCGC4_I2C0_MASK; // Turn on clock to I2C0 module SIM_SCGC5 |= SIM_SCGC5_PORTE_MASK; // Turn on clock to Port E module PORTE_PCR24 = PORT_PCR_MUX(5); // PTE24 pin is I2C0 SCL line PORTE_PCR25 = PORT_PCR_MUX(5); // PTE25 pin is I2C0 SDA line I2C0_F = 0x14; // SDA hold time = 2.125us, SCL start hold time = 4.25us, SCL stop hold time = 5.125us * I2C0_C1 = I2C_C1_IICEN_MASK; // Enable I2C0 module //Configure the PTA14 pin (connected to the INT1 of the MMA8451Q) for falling edge interrupts SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK; // Turn on clock to Port A module PORTA_PCR14 |= (0|PORT_PCR_ISF_MASK| // Clear the interrupt flag PORT_PCR_MUX(0x1)| // PTA14 is configured as GPIO PORT_PCR_IRQC(0xA)); // PTA14 is configured for falling edge interrupts //Enable PORTA interrupt on NVIC NVIC_ClearPendingIRQ(PORTA_IRQn); NVIC_EnableIRQ(PORTA_IRQn); //NVIC->ICPR[0] |= 1 << ((INT_PORTA - 16)%32); //NVIC_ICPR //NVIC->ISER[0] |= 1 << ((INT_PORTA - 16)%32); }
void ihm_sw4_it_disable(void){ PORTC_PCR13 |= PORT_PCR_IRQC(0b0000); }
void ihm_sw4_it_enable(void){ PORTC_PCR13 |= PORT_PCR_IRQC(0b1001); }