/* Configure PSC late: on my devel systems the codec is I2S master and * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC * uses aggressive PM and switches the codec off when it is not in use * which also means the PSC unit doesn't get any clocks and is therefore * dead. That's why this chunk here gets called from the trigger callback * because I can be reasonably certain the codec is driving the clocks. */ static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata) { unsigned long tmo; /* bring PSC out of sleep, and configure I2S unit */ au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); au_sync(); tmo = 1000000; while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo) tmo--; if (!tmo) goto psc_err; au_writel(0, I2S_CFG(pscdata)); au_sync(); au_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata)); au_sync(); /* wait for I2S controller to become ready */ tmo = 1000000; while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo) tmo--; if (tmo) return 0; psc_err: au_writel(0, I2S_CFG(pscdata)); au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata)); au_sync(); return -ETIMEDOUT; }
static int au1xpsc_ac97_probe(struct platform_device *pdev, struct snd_soc_dai *dai) { int ret; struct resource *r; unsigned long sel; if (au1xpsc_ac97_workdata) return -EBUSY; au1xpsc_ac97_workdata = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL); if (!au1xpsc_ac97_workdata) return -ENOMEM; mutex_init(&au1xpsc_ac97_workdata->lock); r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) { ret = -ENODEV; goto out0; } ret = -EBUSY; au1xpsc_ac97_workdata->ioarea = request_mem_region(r->start, r->end - r->start + 1, "au1xpsc_ac97"); if (!au1xpsc_ac97_workdata->ioarea) goto out0; au1xpsc_ac97_workdata->mmio = ioremap(r->start, 0xffff); if (!au1xpsc_ac97_workdata->mmio) goto out1; au1xpsc_ac97_workdata->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 | PSC_AC97CFG_DE_ENABLE; sel = au_readl(PSC_SEL(au1xpsc_ac97_workdata)) & PSC_SEL_CLK_MASK; au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata)); au_sync(); au_writel(0, PSC_SEL(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(au1xpsc_ac97_workdata)); au_sync(); return 0; out1: release_resource(au1xpsc_ac97_workdata->ioarea); kfree(au1xpsc_ac97_workdata->ioarea); out0: kfree(au1xpsc_ac97_workdata); au1xpsc_ac97_workdata = NULL; return ret; }
static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97) { struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; int i; au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata)); au_sync(); au_writel(PSC_AC97RST_RST, AC97_RST(pscdata)); au_sync(); msleep(500); au_writel(0, AC97_RST(pscdata)); au_sync(); au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); au_sync(); i = 1000; while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i)) msleep(1); if (i == 0) { printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n"); return; } au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); au_sync(); i = 1000; while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i)) msleep(1); if (i == 0) printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n"); }
static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97) { /* FIXME */ struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; int i; /* disable PSC during cold reset */ au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata)); au_sync(); /* issue cold reset */ au_writel(PSC_AC97RST_RST, AC97_RST(pscdata)); au_sync(); msleep(500); au_writel(0, AC97_RST(pscdata)); au_sync(); /* enable PSC */ au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); au_sync(); /* wait for PSC to indicate it's ready */ i = 100000; while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i)) au_sync(); if (i == 0) { printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n"); return; } /* enable the ac97 function */ au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); au_sync(); /* wait for AC97 core to become ready */ i = 100000; while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i)) au_sync(); if (i == 0) printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n"); }
static int au1xpsc_i2s_drvprobe(struct platform_device *pdev) { struct resource *iores, *dmares; unsigned long sel; struct au1xpsc_audio_data *wd; wd = devm_kzalloc(&pdev->dev, sizeof(struct au1xpsc_audio_data), GFP_KERNEL); if (!wd) return -ENOMEM; iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); wd->mmio = devm_ioremap_resource(&pdev->dev, iores); if (IS_ERR(wd->mmio)) return PTR_ERR(wd->mmio); dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0); if (!dmares) return -EBUSY; wd->dmaids[SNDRV_PCM_STREAM_PLAYBACK] = dmares->start; dmares = platform_get_resource(pdev, IORESOURCE_DMA, 1); if (!dmares) return -EBUSY; wd->dmaids[SNDRV_PCM_STREAM_CAPTURE] = dmares->start; /* preserve PSC clock source set up by platform (dev.platform_data * is already occupied by soc layer) */ sel = __raw_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK; __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); wmb(); /* drain writebuffer */ __raw_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd)); __raw_writel(0, I2S_CFG(wd)); wmb(); /* drain writebuffer */ /* preconfigure: set max rx/tx fifo depths */ wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8; /* don't wait for I2S core to become ready now; clocks may not * be running yet; depending on clock input for PSC a wait might * time out. */ /* name the DAI like this device instance ("au1xpsc-i2s.PSCINDEX") */ memcpy(&wd->dai_drv, &au1xpsc_i2s_dai_template, sizeof(struct snd_soc_dai_driver)); wd->dai_drv.name = dev_name(&pdev->dev); platform_set_drvdata(pdev, wd); return snd_soc_register_component(&pdev->dev, &au1xpsc_i2s_component, &wd->dai_drv, 1); }
static int au1xpsc_i2s_drvremove(struct platform_device *pdev) { struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev); snd_soc_unregister_component(&pdev->dev); __raw_writel(0, I2S_CFG(wd)); wmb(); /* drain writebuffer */ __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); wmb(); /* drain writebuffer */ return 0; }
static int au1xpsc_ac97_suspend(struct snd_soc_dai *dai) { au1xpsc_ac97_workdata->pm[0] = au_readl(PSC_SEL(au1xpsc_ac97_workdata)); au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata)); au_sync(); return 0; }
static int au1xpsc_ac97_suspend(struct snd_soc_dai *dai) { /* save interesting registers and disable PSC */ au1xpsc_ac97_workdata->pm[0] = au_readl(PSC_SEL(au1xpsc_ac97_workdata)); au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata)); au_sync(); return 0; }
static int au1xpsc_i2s_drvremove(struct platform_device *pdev) { struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev); snd_soc_unregister_dai(&pdev->dev); au_writel(0, I2S_CFG(wd)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); au_sync(); return 0; }
static int au1xpsc_i2s_drvsuspend(struct device *dev) { struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); /* save interesting register and disable PSC */ wd->pm[0] = __raw_readl(PSC_SEL(wd)); __raw_writel(0, I2S_CFG(wd)); wmb(); /* drain writebuffer */ __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); wmb(); /* drain writebuffer */ return 0; }
static int au1xpsc_i2s_drvresume(struct device *dev) { struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); /* select I2S mode and PSC clock */ au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); au_sync(); au_writel(0, PSC_SEL(wd)); au_sync(); au_writel(wd->pm[0], PSC_SEL(wd)); au_sync(); return 0; }
static int au1xpsc_i2s_drvsuspend(struct device *dev) { struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); /* save interesting register and disable PSC */ wd->pm[0] = au_readl(PSC_SEL(wd)); au_writel(0, I2S_CFG(wd)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); au_sync(); return 0; }
static int au1xpsc_i2s_drvresume(struct device *dev) { struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); /* select I2S mode and PSC clock */ __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); wmb(); /* drain writebuffer */ __raw_writel(0, PSC_SEL(wd)); wmb(); /* drain writebuffer */ __raw_writel(wd->pm[0], PSC_SEL(wd)); wmb(); /* drain writebuffer */ return 0; }
static void au1xpsc_ac97_remove(struct platform_device *pdev, struct snd_soc_dai *dai) { /* disable PSC completely */ au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata)); au_sync(); iounmap(au1xpsc_ac97_workdata->mmio); release_resource(au1xpsc_ac97_workdata->ioarea); kfree(au1xpsc_ac97_workdata->ioarea); kfree(au1xpsc_ac97_workdata); au1xpsc_ac97_workdata = NULL; }
static int __devexit au1xpsc_i2s_drvremove(struct platform_device *pdev) { struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev); struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); snd_soc_unregister_dai(&pdev->dev); au_writel(0, I2S_CFG(wd)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); au_sync(); iounmap(wd->mmio); release_mem_region(r->start, resource_size(r)); kfree(wd); return 0; }
static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype) { unsigned long tmo, stat; au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata)); au_sync(); /* wait for stop confirmation */ tmo = 1000000; while ((au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo) tmo--; /* if both TX and RX are idle, disable PSC */ stat = au_readl(I2S_STAT(pscdata)); if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) { au_writel(0, I2S_CFG(pscdata)); au_sync(); au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata)); au_sync(); } return 0; }
static int __devexit au1xpsc_i2s_drvremove(struct platform_device *pdev) { struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev); if (wd->dmapd) au1xpsc_pcm_destroy(wd->dmapd); snd_soc_unregister_dai(&au1xpsc_i2s_dai); au_writel(0, I2S_CFG(wd)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); au_sync(); iounmap(wd->mmio); release_resource(wd->ioarea); kfree(wd->ioarea); kfree(wd); au1xpsc_i2s_workdata = NULL; /* MDEV */ return 0; }
static int __devinit au1xpsc_i2s_drvprobe(struct platform_device *pdev) { struct resource *iores, *dmares; unsigned long sel; int ret; struct au1xpsc_audio_data *wd; wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL); if (!wd) return -ENOMEM; iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!iores) { ret = -ENODEV; goto out0; } ret = -EBUSY; if (!request_mem_region(iores->start, resource_size(iores), pdev->name)) goto out0; wd->mmio = ioremap(iores->start, resource_size(iores)); if (!wd->mmio) goto out1; dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0); if (!dmares) goto out2; wd->dmaids[SNDRV_PCM_STREAM_PLAYBACK] = dmares->start; dmares = platform_get_resource(pdev, IORESOURCE_DMA, 1); if (!dmares) goto out2; wd->dmaids[SNDRV_PCM_STREAM_CAPTURE] = dmares->start; /* preserve PSC clock source set up by platform (dev.platform_data * is already occupied by soc layer) */ sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK; au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); au_sync(); au_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd)); au_writel(0, I2S_CFG(wd)); au_sync(); /* preconfigure: set max rx/tx fifo depths */ wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8; /* don't wait for I2S core to become ready now; clocks may not * be running yet; depending on clock input for PSC a wait might * time out. */ /* name the DAI like this device instance ("au1xpsc-i2s.PSCINDEX") */ memcpy(&wd->dai_drv, &au1xpsc_i2s_dai_template, sizeof(struct snd_soc_dai_driver)); wd->dai_drv.name = dev_name(&pdev->dev); platform_set_drvdata(pdev, wd); ret = snd_soc_register_dai(&pdev->dev, &wd->dai_drv); if (!ret) return 0; out2: iounmap(wd->mmio); out1: release_mem_region(iores->start, resource_size(iores)); out0: kfree(wd); return ret; }
static int au1xpsc_ac97_probe(struct platform_device *pdev, struct snd_soc_dai *dai) { int ret; struct resource *r; unsigned long sel; if (au1xpsc_ac97_workdata) return -EBUSY; au1xpsc_ac97_workdata = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL); if (!au1xpsc_ac97_workdata) return -ENOMEM; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) { ret = -ENODEV; goto out0; } ret = -EBUSY; au1xpsc_ac97_workdata->ioarea = request_mem_region(r->start, r->end - r->start + 1, "au1xpsc_ac97"); if (!au1xpsc_ac97_workdata->ioarea) goto out0; au1xpsc_ac97_workdata->mmio = ioremap(r->start, 0xffff); if (!au1xpsc_ac97_workdata->mmio) goto out1; /* configuration: max dma trigger threshold, enable ac97 */ au1xpsc_ac97_workdata->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 | PSC_AC97CFG_DE_ENABLE; /* preserve PSC clock source set up by platform (dev.platform_data * is already occupied by soc layer) */ sel = au_readl(PSC_SEL(au1xpsc_ac97_workdata)) & PSC_SEL_CLK_MASK; au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata)); au_sync(); au_writel(0, PSC_SEL(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(au1xpsc_ac97_workdata)); au_sync(); /* next up: cold reset. Dont check for PSC-ready now since * there may not be any codec clock yet. */ return 0; out1: release_resource(au1xpsc_ac97_workdata->ioarea); kfree(au1xpsc_ac97_workdata->ioarea); out0: kfree(au1xpsc_ac97_workdata); au1xpsc_ac97_workdata = NULL; return ret; }
static int __init au1xpsc_i2s_drvprobe(struct platform_device *pdev) { struct resource *r; unsigned long sel; int ret; struct au1xpsc_audio_data *wd; if (au1xpsc_i2s_workdata) return -EBUSY; wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL); if (!wd) return -ENOMEM; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) { ret = -ENODEV; goto out0; } ret = -EBUSY; wd->ioarea = request_mem_region(r->start, r->end - r->start + 1, "au1xpsc_i2s"); if (!wd->ioarea) goto out0; wd->mmio = ioremap(r->start, 0xffff); if (!wd->mmio) goto out1; /* preserve PSC clock source set up by platform (dev.platform_data * is already occupied by soc layer) */ sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK; au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); au_sync(); au_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd)); au_writel(0, I2S_CFG(wd)); au_sync(); /* preconfigure: set max rx/tx fifo depths */ wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8; /* don't wait for I2S core to become ready now; clocks may not * be running yet; depending on clock input for PSC a wait might * time out. */ ret = snd_soc_register_dai(&au1xpsc_i2s_dai); if (ret) goto out1; /* finally add the DMA device for this PSC */ wd->dmapd = au1xpsc_pcm_add(pdev); if (wd->dmapd) { platform_set_drvdata(pdev, wd); au1xpsc_i2s_workdata = wd; return 0; } snd_soc_unregister_dai(&au1xpsc_i2s_dai); out1: release_resource(wd->ioarea); kfree(wd->ioarea); out0: kfree(wd); return ret; }