/*!
******************************************************************************
@Function SysDevicePrePowerState
@Description Perform system-level processing required before a device power
transition
@Input ui32DeviceIndex :
@Input eNewPowerState :
@Input eCurrentPowerState :
@Return PVRSRV_ERROR
******************************************************************************/
PVRSRV_ERROR SysDevicePrePowerState(IMG_UINT32 ui32DeviceIndex,
PVRSRV_DEV_POWER_STATE eNewPowerState,
PVRSRV_DEV_POWER_STATE eCurrentPowerState)
{
PVR_UNREFERENCED_PARAMETER(eCurrentPowerState);
if (ui32DeviceIndex != gui32SGXDeviceID)
{
return PVRSRV_OK;
}
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
if (eNewPowerState == PVRSRV_DEV_POWER_STATE_OFF)
{
PVRSRVSetDCState(DC_STATE_FLUSH_COMMANDS);
PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePrePowerState: SGX Entering state D3"));
DisableSGXClocks();
PVRSRVSetDCState(DC_STATE_NO_FLUSH_COMMANDS);
}
#else
PVR_UNREFERENCED_PARAMETER(eNewPowerState);
#endif
return PVRSRV_OK;
}
/*!
******************************************************************************
@Function PVRSRVGetMiscInfoKM
@Description
Retrieves misc. info.
@Output PVRSRV_MISC_INFO
@Return PVRSRV_ERROR :
******************************************************************************/
IMG_EXPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
{
SYS_DATA *psSysData;
if(!psMiscInfo)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVGetMiscInfoKM: invalid parameters"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
psMiscInfo->ui32StatePresent = 0;
/* do a basic check for uninitialised request flag */
if(psMiscInfo->ui32StateRequest & ~(PVRSRV_MISC_INFO_TIMER_PRESENT
|PVRSRV_MISC_INFO_CLOCKGATE_PRESENT
|PVRSRV_MISC_INFO_MEMSTATS_PRESENT
|PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT
|PVRSRV_MISC_INFO_DDKVERSION_PRESENT
|PVRSRV_MISC_INFO_CPUCACHEOP_PRESENT
|PVRSRV_MISC_INFO_RESET_PRESENT
|PVRSRV_MISC_INFO_FREEMEM_PRESENT
|PVRSRV_MISC_INFO_GET_REF_COUNT_PRESENT
|PVRSRV_MISC_INFO_GET_PAGE_SIZE_PRESENT
|PVRSRV_MISC_INFO_FORCE_SWAP_TO_SYSTEM_PRESENT))
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVGetMiscInfoKM: invalid state request flags"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
SysAcquireData(&psSysData);
/* return SOC Timer registers */
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_TIMER_PRESENT) != 0UL) &&
(psSysData->pvSOCTimerRegisterKM != IMG_NULL))
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_TIMER_PRESENT;
psMiscInfo->pvSOCTimerRegisterKM = psSysData->pvSOCTimerRegisterKM;
psMiscInfo->hSOCTimerRegisterOSMemHandle = psSysData->hSOCTimerRegisterOSMemHandle;
}
else
{
psMiscInfo->pvSOCTimerRegisterKM = IMG_NULL;
psMiscInfo->hSOCTimerRegisterOSMemHandle = IMG_NULL;
}
/* return SOC Clock Gating registers */
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_CLOCKGATE_PRESENT) != 0UL) &&
(psSysData->pvSOCClockGateRegsBase != IMG_NULL))
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_CLOCKGATE_PRESENT;
psMiscInfo->pvSOCClockGateRegs = psSysData->pvSOCClockGateRegsBase;
psMiscInfo->ui32SOCClockGateRegsSize = psSysData->ui32SOCClockGateRegsSize;
}
/* memory stats */
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) != 0UL) &&
(psMiscInfo->pszMemoryStr != IMG_NULL))
{
RA_ARENA **ppArena;
/* BM_HEAP *psBMHeap;
BM_CONTEXT *psBMContext;
PVRSRV_DEVICE_NODE *psDeviceNode;*/
IMG_CHAR *pszStr;
IMG_UINT32 ui32StrLen;
IMG_INT32 i32Count;
pszStr = psMiscInfo->pszMemoryStr;
ui32StrLen = psMiscInfo->ui32MemoryStrLen;
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_MEMSTATS_PRESENT;
/* Local backing stores */
ppArena = &psSysData->apsLocalDevMemArena[0];
while(*ppArena)
{
CHECK_SPACE(ui32StrLen);
i32Count = OSSNPrintf(pszStr, 100, "\nLocal Backing Store:\n");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
RA_GetStats(*ppArena,
&pszStr,
&ui32StrLen);
/* advance through the array */
ppArena++;
}
/* per device */
/* psDeviceNode = psSysData->psDeviceNodeList;*/
/*triple loop; devices:contexts:heaps*/
List_PVRSRV_DEVICE_NODE_PVRSRV_ERROR_Any_va(psSysData->psDeviceNodeList,
&PVRSRVGetMiscInfoKM_Device_AnyVaCb,
&ui32StrLen,
&i32Count,
&pszStr,
PVRSRV_MISC_INFO_MEMSTATS_PRESENT);
/* attach a new line and string terminate */
i32Count = OSSNPrintf(pszStr, 100, "\n");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
}
/* Lean version of mem stats: only show free mem on each RA */
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_FREEMEM_PRESENT) != 0)
&& psMiscInfo->pszMemoryStr)
{
IMG_CHAR *pszStr;
IMG_UINT32 ui32StrLen;
IMG_INT32 i32Count;
pszStr = psMiscInfo->pszMemoryStr;
ui32StrLen = psMiscInfo->ui32MemoryStrLen;
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_FREEMEM_PRESENT;
/* triple loop over devices:contexts:heaps */
List_PVRSRV_DEVICE_NODE_PVRSRV_ERROR_Any_va(psSysData->psDeviceNodeList,
&PVRSRVGetMiscInfoKM_Device_AnyVaCb,
&ui32StrLen,
&i32Count,
&pszStr,
PVRSRV_MISC_INFO_FREEMEM_PRESENT);
i32Count = OSSNPrintf(pszStr, 100, "\n");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
}
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT) != 0UL) &&
(psSysData->psGlobalEventObject != IMG_NULL))
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT;
psMiscInfo->sGlobalEventObject = *psSysData->psGlobalEventObject;
}
/* DDK version and memstats not supported in same call to GetMiscInfo */
if (((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_DDKVERSION_PRESENT) != 0UL)
&& ((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) == 0UL)
&& (psMiscInfo->pszMemoryStr != IMG_NULL))
{
IMG_CHAR *pszStr;
IMG_UINT32 ui32StrLen;
IMG_UINT32 ui32LenStrPerNum = 12; /* string length per UI32: 10 digits + '.' + '\0' = 12 bytes */
IMG_INT32 i32Count;
IMG_INT i;
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_DDKVERSION_PRESENT;
/* construct DDK string */
psMiscInfo->aui32DDKVersion[0] = PVRVERSION_MAJ;
psMiscInfo->aui32DDKVersion[1] = PVRVERSION_MIN;
psMiscInfo->aui32DDKVersion[2] = PVRVERSION_BUILD_HI;
psMiscInfo->aui32DDKVersion[3] = PVRVERSION_BUILD_LO;
pszStr = psMiscInfo->pszMemoryStr;
ui32StrLen = psMiscInfo->ui32MemoryStrLen;
for (i=0; i<4; i++)
{
if (ui32StrLen < ui32LenStrPerNum)
{
return PVRSRV_ERROR_INVALID_PARAMS;
}
i32Count = OSSNPrintf(pszStr, ui32LenStrPerNum, "%u", psMiscInfo->aui32DDKVersion[i]);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
if (i != 3)
{
i32Count = OSSNPrintf(pszStr, 2, ".");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
}
}
}
if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_CPUCACHEOP_PRESENT) != 0UL)
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_CPUCACHEOP_PRESENT;
if(psMiscInfo->sCacheOpCtl.bDeferOp)
{
/* For now, assume deferred ops are "full" cache ops,
* and we don't need (or expect) a meminfo.
*/
psSysData->ePendingCacheOpType = psMiscInfo->sCacheOpCtl.eCacheOpType;
}
else
{
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
PVRSRV_PER_PROCESS_DATA *psPerProc;
if(!psMiscInfo->sCacheOpCtl.u.psKernelMemInfo)
{
PVR_DPF((PVR_DBG_WARNING, "PVRSRVGetMiscInfoKM: "
"Ignoring non-deferred cache op with no meminfo"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
if(psSysData->ePendingCacheOpType != PVRSRV_MISC_INFO_CPUCACHEOP_NONE)
{
PVR_DPF((PVR_DBG_WARNING, "PVRSRVGetMiscInfoKM: "
"Deferred cache op is pending. It is unlikely you want "
"to combine deferred cache ops with immediate ones"));
}
psPerProc = PVRSRVFindPerProcessData();
if(PVRSRVLookupHandle(psPerProc->psHandleBase,
(IMG_PVOID *)&psKernelMemInfo,
psMiscInfo->sCacheOpCtl.u.psKernelMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO) != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetMiscInfoKM: "
"Can't find kernel meminfo"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
if(psMiscInfo->sCacheOpCtl.eCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_FLUSH)
{
if(!OSFlushCPUCacheRangeKM(psKernelMemInfo->sMemBlk.hOSMemHandle,
0,
psMiscInfo->sCacheOpCtl.pvBaseVAddr,
psMiscInfo->sCacheOpCtl.ui32Length))
{
return PVRSRV_ERROR_CACHEOP_FAILED;
}
}
else if(psMiscInfo->sCacheOpCtl.eCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_CLEAN)
{
if(psMiscInfo->sCacheOpCtl.ui32Length!=0)
{
if(!OSCleanCPUCacheRangeKM(psKernelMemInfo->sMemBlk.hOSMemHandle,
0,
psMiscInfo->sCacheOpCtl.pvBaseVAddr,
psMiscInfo->sCacheOpCtl.ui32Length))
{
return PVRSRV_ERROR_CACHEOP_FAILED;
}
}
}
}
}
if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_GET_REF_COUNT_PRESENT) != 0UL)
{
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
PVRSRV_PER_PROCESS_DATA *psPerProc;
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_GET_REF_COUNT_PRESENT;
psPerProc = PVRSRVFindPerProcessData();
if(PVRSRVLookupHandle(psPerProc->psHandleBase,
(IMG_PVOID *)&psKernelMemInfo,
psMiscInfo->sGetRefCountCtl.u.psKernelMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO) != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetMiscInfoKM: "
"Can't find kernel meminfo"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
psMiscInfo->sGetRefCountCtl.ui32RefCount = psKernelMemInfo->ui32RefCount;
}
if ((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_GET_PAGE_SIZE_PRESENT) != 0UL)
{
psMiscInfo->ui32PageSize = HOST_PAGESIZE();
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_GET_PAGE_SIZE_PRESENT;
}
#if defined(PVRSRV_RESET_ON_HWTIMEOUT)
if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_RESET_PRESENT) != 0UL)
{
PVR_LOG(("User requested OS reset"));
OSPanic();
}
#endif /* #if defined(PVRSRV_RESET_ON_HWTIMEOUT) */
if ((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_FORCE_SWAP_TO_SYSTEM_PRESENT) != 0UL)
{
PVRSRVSetDCState(DC_STATE_FORCE_SWAP_TO_SYSTEM);
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_FORCE_SWAP_TO_SYSTEM_PRESENT;
}
return PVRSRV_OK;
}
