static PVRSRV_ERROR PCIInitDev(SYS_DATA *psSysData) { SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; IMG_UINT32 ui32MaxOffset = POULSBO_MAX_OFFSET; #if defined(SUPPORT_DRI_DRM_EXT) psSysSpecData->hSGXPCI = OSPCISetDev((IMG_VOID *)psSysSpecData->psPCIDev, 0); ui32MaxOffset = POULSBO_MAX_OFFSET; #else #if defined(LDM_PCI) || defined(SUPPORT_DRI_DRM) psSysSpecData->hSGXPCI = OSPCISetDev((IMG_VOID *)psSysSpecData->psPCIDev, HOST_PCI_INIT_FLAG_BUS_MASTER | HOST_PCI_INIT_FLAG_MSI); #else psSysSpecData->hSGXPCI = OSPCIAcquireDev(SYS_SGX_DEV_VENDOR_ID, SYS_SGX_DEV_DEVICE_ID, HOST_PCI_INIT_FLAG_BUS_MASTER | HOST_PCI_INIT_FLAG_MSI); #endif #endif if (!psSysSpecData->hSGXPCI) { PVR_DPF((PVR_DBG_ERROR,"PCIInitDev: Failed to acquire PCI device")); return PVRSRV_ERROR_PCI_DEVICE_NOT_FOUND; } SYS_SPECIFIC_DATA_SET(psSysSpecData, SYS_SPECIFIC_DATA_PCI_ACQUIRE_DEV); PVR_TRACE(("PCI memory region: %x to %x", OSPCIAddrRangeStart(psSysSpecData->hSGXPCI, POULSBO_ADDR_RANGE_INDEX), OSPCIAddrRangeEnd(psSysSpecData->hSGXPCI, POULSBO_ADDR_RANGE_INDEX))); #if defined(SGX_FEATURE_HOST_PORT) PVR_TRACE(("Host Port region: %x to %x", OSPCIAddrRangeStart(psSysSpecData->hSGXPCI, POULSBO_HP_ADDR_RANGE_INDEX), OSPCIAddrRangeEnd(psSysSpecData->hSGXPCI, POULSBO_HP_ADDR_RANGE_INDEX))); #endif if (OSPCIAddrRangeLen(psSysSpecData->hSGXPCI, POULSBO_ADDR_RANGE_INDEX) < ui32MaxOffset) { PVR_DPF((PVR_DBG_ERROR,"PCIInitDev: Device memory region isn't big enough")); return PVRSRV_ERROR_PCI_REGION_TOO_SMALL; } if (OSPCIRequestAddrRange(psSysSpecData->hSGXPCI, POULSBO_ADDR_RANGE_INDEX) != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"PCIInitDev: Device memory region not available")); return PVRSRV_ERROR_PCI_REGION_UNAVAILABLE; } SYS_SPECIFIC_DATA_SET(psSysSpecData, SYS_SPECIFIC_DATA_PCI_REQUEST_SGX_ADDR_RANGE); #if defined(SGX_FEATURE_HOST_PORT) if (OSPCIRequestAddrRange(psSysSpecData->hSGXPCI, POULSBO_HP_ADDR_RANGE_INDEX) != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"PCIInitDev: Host Port region not available")); return PVRSRV_ERROR_PCI_REGION_UNAVAILABLE; } SYS_SPECIFIC_DATA_SET(psSysSpecData, SYS_SPECIFIC_DATA_PCI_REQUEST_HOST_PORT_RANGE); #endif return PVRSRV_OK; }
/*! ****************************************************************************** @Function EnableSystemClocks @Description Setup up the clocks for the graphics device to work. @Return PVRSRV_ERROR ******************************************************************************/ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData) { SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; #if !defined(PM_RUNTIME_SUPPORT) struct clk *psCLK; #endif PVR_TRACE(("EnableSystemClocks: Enabling System Clocks")); if (!psSysSpecData->bSysClocksOneTimeInit) { mutex_init(&psSysSpecData->sPowerLock); atomic_set(&psSysSpecData->sSGXClocksEnabled, 0); psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE; #if !defined(PM_RUNTIME_SUPPORT) psCLK = clk_get(NULL, "sgx_ck"); if (IS_ERR(psCLK)) { PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get SGX Functional Clock")); return PVRSRV_ERROR_UNABLE_TO_GET_CLOCK; } psSysSpecData->psSGX_FCK = psCLK; #endif } return AcquireGPTimer(psSysSpecData); }
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData) { struct clk *psCLK; SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; PVR_TRACE(("DisableSystemClocks: Disabling System Clocks")); DisableSGXClocks(psSysData); psCLK = clk_get(NULL, "sgx_fck"); if (IS_ERR(psCLK)) { PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock")); return; } clk_disable(psCLK); psCLK = clk_get(NULL, "sgx_ick"); if (IS_ERR(psCLK)) { PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock")); return; } clk_disable(psCLK); ReleaseGPTimer(psSysSpecData); }
static int PVRSRVDRMOpen(struct drm_device *dev, struct drm_file *file) { while (!bInitComplete) { DEFINE_WAIT(sWait); prepare_to_wait(&sWaitForInit, &sWait, TASK_INTERRUPTIBLE); if (!bInitComplete) { PVR_TRACE(("%s: Waiting for module initialisation to complete", __FUNCTION__)); schedule(); } finish_wait(&sWaitForInit, &sWait); if (signal_pending(current)) { return -ERESTARTSYS; } } if (bInitFailed) { PVR_DPF((PVR_DBG_ERROR, "%s: Module initialisation failed", __FUNCTION__)); return -EINVAL; } return PVRSRVOpen(dev, file); }
static int PVRSRVDrmProbe(struct platform_device *pDevice) { PVR_TRACE(("PVRSRVDrmProbe")); return drm_get_platform_dev(pDevice, &sPVRDrmDriver); }
PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData) { SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; int err; PVR_TRACE(("EnableSystemClocks: Enabling System Clocks")); /* power up */ err = cpm_pwc_enable(psSysSpecData->pCPMHandle); if (err) { PVR_DPF((PVR_DBG_ERROR, "%s failed to power up GPU: %d", __func__, err)); return PVRSRV_ERROR_UNKNOWN_POWER_STATE; } /* enable clock */ err = clk_set_rate(psSysSpecData->psSGXClock, SYS_SGX_CLOCK_SPEED); if (!err) err = clk_prepare_enable(psSysSpecData->psSGXClock); if (err) { PVR_DPF((PVR_DBG_ERROR, "%s failed to initialise GPU clock: %d", __func__, err)); return PVRSRV_ERROR_CLOCK_REQUEST_FAILED; } return PVRSRV_OK; }
/*! ****************************************************************************** @Function EnableSystemClocks @Description Setup up the clocks for the graphics device to work. @Return PVRSRV_ERROR ******************************************************************************/ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData) { SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; #if !defined(PM_RUNTIME_SUPPORT) struct clk *psCLK; IMG_INT res; #endif PVR_TRACE(("EnableSystemClocks: Enabling System Clocks")); if (!psSysSpecData->bSysClocksOneTimeInit) { mutex_init(&psSysSpecData->sPowerLock); atomic_set(&psSysSpecData->sSGXClocksEnabled, 0); psCLK = clk_get(NULL, SGX_PARENT_CLOCK); if (IS_ERR(psCLK)) { PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get Core Clock")); return PVRSRV_ERROR_UNABLE_TO_GET_PARENT_CLOCK; } psSysSpecData->psCORE_CK = psCLK; // psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE; #if !defined(PM_RUNTIME_SUPPORT) psCLK = clk_get(NULL, "sgx_fck"); if (IS_ERR(psCLK)) { PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get SGX Functional Clock")); return PVRSRV_ERROR_UNABLE_TO_GET_CLOCK; } psSysSpecData->psSGX_FCK = psCLK; psCLK = clk_get(NULL, "sgx_ick"); if (IS_ERR(psCLK)) { PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock")); return PVRSRV_ERROR_UNABLE_TO_GET_CLOCK; } psSysSpecData->psSGX_ICK = psCLK; res = clk_set_parent(psSysSpecData->psSGX_FCK, psSysSpecData->psCORE_CK); if (res < 0) { PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't set SGX parent clock (%d)", res)); return PVRSRV_ERROR_UNABLE_TO_GET_PARENT_CLOCK; } psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE; #endif } return AcquireGPTimer(psSysSpecData); }
/*! ****************************************************************************** @Function DisableSystemClocks @Description Disable the graphics clocks. @Return none ******************************************************************************/ IMG_VOID DisableSystemClocks(SYS_DATA *psSysData) { struct clk *psCLK; SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; PVR_TRACE(("DisableSystemClocks: Disabling System Clocks")); /* * Always disable the SGX clocks when the system clocks are disabled. * This saves having to make an explicit call to DisableSGXClocks if * active power management is enabled. */ DisableSGXClocks(psSysData); psCLK = clk_get(NULL, "sgx_fck"); if (IS_ERR(psCLK)) { PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock")); return; } clk_disable(psCLK); psCLK = clk_get(NULL, "sgx_ick"); if (IS_ERR(psCLK)) { PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock")); return; } clk_disable(psCLK); ReleaseGPTimer(psSysSpecData); }
static int PVRSRVDRMUnload(struct drm_device *dev) { struct pvr_drm_dev_priv *psDevPriv = (struct pvr_drm_dev_priv *)dev->dev_private; #if defined(SUPPORT_SYSTEM_INTERRUPT_HANDLING) IMG_HANDLE hSysData = psDevPriv->hSysData; #endif PVR_TRACE(("PVRSRVDRMUnload")); #if defined(SUPPORT_DRM_DC_MODULE) (void)PVRSRVDRMDisplayDeinit(dev); #endif psDevPriv->dev_node = NULL; PVRSRVSystemDeInit(); #if defined(SUPPORT_SYSTEM_INTERRUPT_HANDLING) psDevPriv->hSysData = NULL; SysReleaseSystemData(hSysData); drm_irq_uninstall(dev); #endif return 0; }
static IMG_VOID Init_IRQ_CTRL(PLAT_DATA *psPlatData) { IMG_CPU_PHYADDR sICRCpuPBase; IMG_VOID *pvICRCpuVBase; IMG_UINT32 ui32Value; /* Map into CPU address space */ sICRCpuPBase.uiAddr = IMG_CAST_TO_CPUPHYADDR_UINT(psPlatData->uiICRCpuPAddr); pvICRCpuVBase = OSMapPhysToLin(sICRCpuPBase, psPlatData->uiICRSize, 0); /* Configure IRQ_CTRL: For Rogue, enable IRQ, set sense to active low */ ui32Value = OSReadHWReg32(pvICRCpuVBase, EMULATOR_RGX_ICR_REG_IRQ_CTRL); ui32Value &= ~EMULATOR_RGX_ICR_REG_IRQ_CTRL_IRQ_HINLO; ui32Value |= EMULATOR_RGX_ICR_REG_IRQ_CTRL_IRQ_EN; OSWriteHWReg32(pvICRCpuVBase,EMULATOR_RGX_ICR_REG_IRQ_CTRL, ui32Value); /* Flush register write */ (void) OSReadHWReg32(pvICRCpuVBase, EMULATOR_RGX_ICR_REG_IRQ_CTRL); OSWaitus(10); PVR_TRACE(("Emulator FPGA image version (ICR_REG_CORE_REVISION): 0x%08x", OSReadHWReg32(pvICRCpuVBase, EMULATOR_RGX_ICR_REG_CORE_REVISION))); /* Unmap from CPU address space */ OSUnMapPhysToLin(pvICRCpuVBase, psPlatData->uiICRSize, 0); }
static int PVRSRVDriverSuspend(LDM_DEV *pDevice, pm_message_t state) { PVR_TRACE("PVRSRVDriverSuspend(pDevice=%p)", pDevice); if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D3) != PVRSRV_OK) return -EINVAL; return 0; }
static int PVRSRVDriverResume(LDM_DEV *pDevice) { PVR_TRACE("PVRSRVDriverResume(pDevice=%p)", pDevice); if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D0) != PVRSRV_OK) return -EINVAL; return 0; }
DRI_DRM_STATIC int PVRSRVDrmLoad(struct drm_device *dev, unsigned long flags) { int iRes = 0; PVR_TRACE(("PVRSRVDrmLoad")); gpsPVRDRMDev = dev; #if !defined(PVR_DRI_DRM_NOT_PCI) && !defined(SUPPORT_DRI_DRM_EXTERNAL) #if defined(PVR_DRI_DRM_PLATFORM_DEV) gpsPVRLDMDev = dev->platformdev; #else gpsPVRLDMDev = dev->pdev; #endif #endif #if defined(PDUMP) iRes = dbgdrv_init(); if (iRes != 0) { goto exit; } #endif /* Module initialisation */ iRes = PVRCore_Init(); if (iRes != 0) { goto exit_dbgdrv_cleanup; } #if defined(DISPLAY_CONTROLLER) iRes = PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Init)(dev); if (iRes != 0) { goto exit_pvrcore_cleanup; } #endif goto exit; #if defined(DISPLAY_CONTROLLER) exit_pvrcore_cleanup: PVRCore_Cleanup(); #endif exit_dbgdrv_cleanup: #if defined(PDUMP) dbgdrv_cleanup(); #endif exit: if (iRes != 0) { bInitFailed = IMG_TRUE; } bInitComplete = IMG_TRUE; wake_up_interruptible(&sWaitForInit); return iRes; }
/*! ****************************************************************************** @Function SysFinalise @Description Final part of initialisation at 'driver load' time @Return PVRSRV_ERROR : ******************************************************************************/ PVRSRV_ERROR SysFinalise(IMG_VOID) { PVRSRV_ERROR eError = PVRSRV_OK; #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) eError = EnableSGXClocksWrap(gpsSysData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to Enable SGX clocks (%d)", eError)); return eError; } #endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */ eError = OSInstallMISR(gpsSysData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to install MISR")); return eError; } SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR); #if defined(SYS_USING_INTERRUPTS) /* install a Device ISR */ eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to install ISR")); return eError; } SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR); #if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) SysEnableSGXInterrupts(gpsSysData); #endif #endif /* defined(SYS_USING_INTERRUPTS) */ #if defined(__linux__) /* Create a human readable version string for this system */ gpsSysData->pszVersionString = SysCreateVersionString(); if (!gpsSysData->pszVersionString) { PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to create a system version string")); return PVRSRV_ERROR_INIT_FAILURE; } else { PVR_TRACE(("SysFinalise: Version string: %s", gpsSysData->pszVersionString)); } #endif #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) /* SGX defaults to D3 power state */ DisableSGXClocks(gpsSysData); #endif /* SUPPORT_ACTIVE_POWER_MANAGEMENT */ gpsSysSpecificData->bSGXInitComplete = IMG_TRUE; return eError; }
static int PVRSRVDrmRemove(struct platform_device *pDevice) { PVR_TRACE(("PVRSRVDrmRemove")); drm_put_dev(gpsPVRDRMDev); return 0; }
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData) { SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; PVR_TRACE(("DisableSystemClocks: Disabling System Clocks")); DisableSGXClocks(psSysData); ReleaseGPTimer(psSysSpecData); }
static IMG_VOID RegisterConstraintNotifications(IMG_VOID) { PVR_TRACE(("Registering constraint notifications")); PVR_ASSERT(!gpsSysSpecificData->bConstraintNotificationsEnabled); constraint_register_pre_notification(gpsSysSpecificData->pVdd2Handle, &sVDD2Pre, max_vdd2_opp+1); constraint_register_post_notification(gpsSysSpecificData->pVdd2Handle, &sVDD2Post, max_vdd2_opp+1); NotifyLock(gpsSysSpecificData); gpsSysSpecificData->bConstraintNotificationsEnabled = IMG_TRUE; NotifyUnlock(gpsSysSpecificData); PVR_TRACE(("VDD2 constraint notifications registered")); }
static void __exit PVRCore_Cleanup(void) { struct SYS_DATA *psSysData; PVR_TRACE("PVRCore_Cleanup"); SysAcquireData(&psSysData); unregister_chrdev(AssignedMajorNumber, DRVNAME); platform_device_unregister(&powervr_device); platform_driver_unregister(&powervr_driver); PVRMMapCleanup(); LinuxMMCleanup(); LinuxBridgeDeInit(); RemoveProcEntries(); PVR_TRACE("PVRCore_Cleanup: unloading"); }
PVRSRV_ERROR SysFinalise(IMG_VOID) { PVRSRV_ERROR eError = PVRSRV_OK; #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) eError = EnableSGXClocksWrap(gpsSysData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to Enable SGX clocks (%d)", eError)); return eError; } #endif eError = OSInstallMISR(gpsSysData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to install MISR")); return eError; } SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR); #if defined(SYS_USING_INTERRUPTS) eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to install ISR")); return eError; } SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR); #endif #if defined(__linux__) gpsSysData->pszVersionString = SysCreateVersionString(); if (!gpsSysData->pszVersionString) { PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to create a system version string")); } else { PVR_TRACE(("SysFinalise: Version string: %s", gpsSysData->pszVersionString)); } #endif #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) DisableSGXClocks(gpsSysData); #endif gpsSysSpecificData->bSGXInitComplete = IMG_TRUE; return eError; }
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData) { SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; PVR_TRACE(("DisableSystemClocks: Disabling System Clocks")); DisableSGXClocks(psSysData); /* disable & gate clock, power down */ clk_disable_unprepare(psSysSpecData->psSGXClock); cpm_pwc_disable(psSysSpecData->pCPMHandle); }
/*********************************************************************************** Function Name : UseAssemblerError Inputs : Outputs : Returns : Description : ************************************************************************************/ static IMG_VOID IMG_CALLCONV UseAssemblerError(IMG_PVOID pvContext, PUSE_INST psInst, IMG_CHAR *pszFmt, ...) { va_list ap; IMG_CHAR pszTemp[256]; PVR_UNREFERENCED_PARAMETER(psInst); PVR_UNREFERENCED_PARAMETER(pvContext); va_start(ap, pszFmt); vsprintf(pszTemp, pszFmt, ap); PVR_TRACE(("Assembler Error:%s\n", pszTemp)); va_end(ap); }
static IMG_INT GpuTracingSet(const IMG_CHAR *buffer, size_t count, loff_t uiPosition, void *data) { IMG_CHAR cFirstChar; PVR_UNREFERENCED_PARAMETER(uiPosition); PVR_UNREFERENCED_PARAMETER(data); if (!count) { return -EINVAL; } if (pvr_copy_from_user(&cFirstChar, buffer, 1)) { return -EFAULT; } switch (cFirstChar) { case '0': case 'n': case 'N': { PVRGpuTraceEnabledSet(IMG_FALSE); PVR_TRACE(("DISABLED GPU FTrace")); break; } case '1': case 'y': case 'Y': { PVRGpuTraceEnabledSet(IMG_TRUE); PVR_TRACE(("ENABLED GPU FTrace")); break; } } return count; }
IMG_VOID DisableSystemClocks(SYS_DATA *psSysData) { SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; IMG_BOOL bPowerLock; #if defined(DEBUG) || defined(TIMING) IMG_CPU_PHYADDR TimerRegPhysBase; IMG_HANDLE hTimerDisable; IMG_UINT32 *pui32TimerDisable; #endif PVR_TRACE(("DisableSystemClocks: Disabling System Clocks")); DisableSGXClocks(psSysData); bPowerLock = PowerLockWrappedOnCPU(psSysSpecData); if (bPowerLock) { PowerLockUnwrap(psSysSpecData); } #if defined(DEBUG) || defined(TIMING) TimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE; pui32TimerDisable = OSMapPhysToLin(TimerRegPhysBase, 4, PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED, &hTimerDisable); if (pui32TimerDisable == IMG_NULL) { PVR_DPF((PVR_DBG_ERROR, "DisableSystemClocks: OSMapPhysToLin failed")); } else { *pui32TimerDisable = 0; OSUnMapPhysToLin(pui32TimerDisable, 4, PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED, hTimerDisable); } clk_disable(psSysSpecData->psGPT11_ICK); clk_disable(psSysSpecData->psGPT11_FCK); #endif if (bPowerLock) { PowerLockWrap(psSysSpecData); } }
static int PVRSRVDriverRemove(LDM_DEV *pDevice) { struct SYS_DATA *psSysData; PVR_TRACE("PVRSRVDriverRemove(pDevice=%p)", pDevice); if (SysAcquireData(&psSysData) == PVRSRV_OK) { SysDeinitialise(psSysData); gpsPVRLDMDev = NULL; } return 0; }
/* IMG_BOOL MemCheck(const IMG_PVOID pvAddr, const IMG_UINT8 ui8Pattern, IMG_SIZE_T uSize) { IMG_UINT8 *pui8Addr; for (pui8Addr = (IMG_UINT8*)pvAddr; uSize > 0; uSize--, pui8Addr++) { if (*pui8Addr != ui8Pattern) { return IMG_FALSE; } } return IMG_TRUE; } IMG_VOID OSCheckMemDebug(IMG_PVOID pvCpuVAddr, IMG_SIZE_T uSize, const IMG_CHAR *pszFileName, const IMG_UINT32 uLine) { OSMEM_DEBUG_INFO const *psInfo = (OSMEM_DEBUG_INFO *)((IMG_UINT32)pvCpuVAddr - TEST_BUFFER_PADDING_STATUS); if (pvCpuVAddr == IMG_NULL) { PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : null pointer" " - referenced %s:%d - allocated %s:%d", pvCpuVAddr, pszFileName, uLine, psInfo->sFileName, psInfo->uLineNo)); while (STOP_ON_ERROR); } if (((IMG_UINT32)pvCpuVAddr&3) != 0) { PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : invalid alignment" " - referenced %s:%d - allocated %s:%d", pvCpuVAddr, pszFileName, uLine, psInfo->sFileName, psInfo->uLineNo)); while (STOP_ON_ERROR); } if (!MemCheck((IMG_PVOID)psInfo->sGuardRegionBefore, 0xB1, sizeof(psInfo->sGuardRegionBefore))) { PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : guard region before overwritten" " - referenced %s:%d - allocated %s:%d", pvCpuVAddr, pszFileName, uLine, psInfo->sFileName, psInfo->uLineNo)); while (STOP_ON_ERROR); } if (uSize != psInfo->uSize) { PVR_DPF((PVR_DBG_WARNING, "Pointer 0x%X : supplied size was different to stored size (0x%X != 0x%X)" " - referenced %s:%d - allocated %s:%d", pvCpuVAddr, uSize, psInfo->uSize, pszFileName, uLine, psInfo->sFileName, psInfo->uLineNo)); while (STOP_ON_ERROR); } if ((0x01234567 ^ psInfo->uSizeParityCheck) != psInfo->uSize) { PVR_DPF((PVR_DBG_WARNING, "Pointer 0x%X : stored size parity error (0x%X != 0x%X)" " - referenced %s:%d - allocated %s:%d", pvCpuVAddr, psInfo->uSize, 0x01234567 ^ psInfo->uSizeParityCheck, pszFileName, uLine, psInfo->sFileName, psInfo->uLineNo)); while (STOP_ON_ERROR); } else { uSize = psInfo->uSize; } if (uSize) { if (!MemCheck((IMG_VOID*)((IMG_UINT32)pvCpuVAddr + uSize), 0xB2, TEST_BUFFER_PADDING_AFTER)) { PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : guard region after overwritten" " - referenced from %s:%d - allocated from %s:%d", pvCpuVAddr, pszFileName, uLine, psInfo->sFileName, psInfo->uLineNo)); } } if (psInfo->eValid != isAllocated) { PVR_DPF((PVR_DBG_ERROR, "Pointer 0x%X : not allocated (freed? %d)" " - referenced %s:%d - freed %s:%d", pvCpuVAddr, psInfo->eValid == isFree, pszFileName, uLine, psInfo->sFileName, psInfo->uLineNo)); while (STOP_ON_ERROR); } } static IMG_VOID debug_strcpy(IMG_CHAR *pDest, const IMG_CHAR *pSrc) { IMG_SIZE_T i = 0; for (; i < 128; i++) { *pDest = *pSrc; if (*pSrc == '\0') break; pDest++; pSrc++; } } */ PVRSRV_ERROR OSAllocMem_Debug_Wrapper(IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_PVOID *ppvCpuVAddr, IMG_HANDLE *phBlockAlloc, IMG_CHAR *pszFilename, IMG_UINT32 ui32Line) { OSMEM_DEBUG_INFO *psInfo; PVRSRV_ERROR eError; eError = OSAllocMem_Debug_Linux_Memory_Allocations(ui32Flags, ui32Size + TEST_BUFFER_PADDING, ppvCpuVAddr, phBlockAlloc, pszFilename, ui32Line); if (eError != PVRSRV_OK) { return eError; } //2011.3.2 //don't add data pattern // OSMemSet((IMG_CHAR *)(*ppvCpuVAddr) + TEST_BUFFER_PADDING_STATUS, 0xBB, ui32Size); // OSMemSet((IMG_CHAR *)(*ppvCpuVAddr) + ui32Size + TEST_BUFFER_PADDING_STATUS, 0xB2, TEST_BUFFER_PADDING_AFTER); psInfo = (OSMEM_DEBUG_INFO *)(*ppvCpuVAddr); OSMemSet(psInfo->sGuardRegionBefore, 0xB1, sizeof(psInfo->sGuardRegionBefore)); // debug_strcpy(psInfo->sFileName, pszFilename); psInfo->uLineNo = ui32Line; psInfo->eValid = isAllocated; psInfo->uSize = ui32Size; psInfo->uSizeParityCheck = 0x01234567 ^ ui32Size; *ppvCpuVAddr = (IMG_PVOID) ((IMG_UINT32)*ppvCpuVAddr)+TEST_BUFFER_PADDING_STATUS; #ifdef PVRSRV_LOG_MEMORY_ALLOCS PVR_TRACE(("Allocated pointer (after debug info): 0x%X from %s:%d", *ppvCpuVAddr, pszFilename, ui32Line)); #endif return PVRSRV_OK; }
/*! ****************************************************************************** @Function DisableSystemClocks @Description Disable the graphics clocks. @Return none ******************************************************************************/ IMG_VOID DisableSystemClocks(SYS_DATA *psSysData) { SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; PVR_TRACE(("DisableSystemClocks: Disabling System Clocks")); /* * Always disable the SGX clocks when the system clocks are disabled. * This saves having to make an explicit call to DisableSGXClocks if * active power management is enabled. */ DisableSGXClocks(psSysData); ReleaseGPTimer(psSysSpecData); }
static int VDD2PostFunc(struct notifier_block *n, unsigned long event, IMG_VOID *ptr) { PVR_UNREFERENCED_PARAMETER(n); PVR_UNREFERENCED_PARAMETER(event); PVR_UNREFERENCED_PARAMETER(ptr); if (in_interrupt()) { PVR_DPF((PVR_DBG_ERROR, "%s Called in interrupt context. Ignoring.", __FUNCTION__)); return 0; } if (!NotifyLockedOnCPU(gpsSysSpecificData)) { return 0; } #if defined(DEBUG) if (ConstraintNotificationsEnabled(gpsSysSpecificData)) { IMG_UINT32 rate; rate = clk_get_rate(gpsSysSpecificData->psSGX_FCK); PVR_ASSERT(rate != 0); PVR_DPF((PVR_DBG_MESSAGE, "%s: SGX clock rate: %dMHz", __FUNCTION__, HZ_TO_MHZ(rate))); } #endif if (gpsSysSpecificData->bCallVDD2PostFunc) { PVRSRVDevicePostClockSpeedChange(gpsSysSpecificData->psSGXDevNode->sDevId.ui32DeviceIndex, IMG_TRUE, IMG_NULL); gpsSysSpecificData->bCallVDD2PostFunc = IMG_FALSE; } else { if (ConstraintNotificationsEnabled(gpsSysSpecificData)) { PVR_TRACE(("%s: Not calling PVR clock speed notification functions", __FUNCTION__)); } } NotifyUnlock(gpsSysSpecificData); return 0; }
IMG_INT PVRSRVDrmUnload(struct drm_device *dev) { PVR_TRACE(("PVRSRVDrmUnload")); #if defined(DISPLAY_CONTROLLER) MAKENAME(DISPLAY_CONTROLLER, _Cleanup)(dev); #endif PVRCore_Cleanup(); #if defined(PDUMP) dbgdrv_cleanup(); #endif return 0; }
static IMG_VOID UnRegisterConstraintNotifications(IMG_VOID) { PVR_TRACE(("Unregistering constraint notifications")); NotifyLock(gpsSysSpecificData); gpsSysSpecificData->bConstraintNotificationsEnabled = IMG_FALSE; NotifyUnlock(gpsSysSpecificData); constraint_unregister_pre_notification(gpsSysSpecificData->pVdd2Handle, &sVDD2Pre, max_vdd2_opp+1); constraint_unregister_post_notification(gpsSysSpecificData->pVdd2Handle, &sVDD2Post, max_vdd2_opp+1); }
DRI_DRM_STATIC int PVRSRVDrmRelease(struct drm_device *dev, struct drm_file *file) { void *psDriverPriv = get_private(file); PVR_TRACE(("PVRSRVDrmRelease: psDriverPriv=%p", psDriverPriv)); if (psDriverPriv) { PVRSRVRelease(psDriverPriv); } set_private(file, IMG_NULL); return 0; }