int platform_init() { int i; // Enable the peripherals we use in the PMC PMC_EnablePeripheral( AT91C_ID_US0 ); PMC_EnablePeripheral( AT91C_ID_US1 ); PMC_EnablePeripheral( AT91C_ID_PIOA ); PMC_EnablePeripheral( AT91C_ID_PIOB ); PMC_EnablePeripheral( AT91C_ID_TC0 ); PMC_EnablePeripheral( AT91C_ID_TC1 ); PMC_EnablePeripheral( AT91C_ID_TC2 ); PMC_EnablePeripheral( AT91C_ID_PWMC ); // Configure the timers AT91C_BASE_TCB->TCB_BMR = 0x15; for( i = 0; i < 3; i ++ ) TC_Configure( ( AT91S_TC* )timer_base[ i ], AT91C_TC_CLKS_TIMER_DIV5_CLOCK | AT91C_TC_WAVE ); // PWM setup (only the clocks are set at this point) PWMC_ConfigureClocks( BOARD_MCK, BOARD_MCK, BOARD_MCK ); PWMC_ConfigureChannel( 0, AT91C_PWMC_CPRE_MCKA, 0, 0 ); PWMC_ConfigureChannel( 1, AT91C_PWMC_CPRE_MCKA, 0, 0 ); PWMC_ConfigureChannel( 2, AT91C_PWMC_CPRE_MCKB, 0, 0 ); PWMC_ConfigureChannel( 3, AT91C_PWMC_CPRE_MCKB, 0, 0 ); for( i = 0; i < 4; i ++ ) { PWMC_EnableChannel( i ); PWMC_EnableChannelIt( i ); } cmn_platform_init(); #if VTMR_NUM_TIMERS > 0 // Virtual timer initialization TC_Configure( AT91C_BASE_TC2, AT91C_TC_CLKS_TIMER_DIV5_CLOCK | AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO ); AT91C_BASE_TC2->TC_RC = ( BOARD_MCK / 1024 ) / VTMR_FREQ_HZ; AIC_DisableIT( AT91C_ID_TC2 ); AIC_ConfigureIT( AT91C_ID_TC2, 0, ISR_Tc2 ); AT91C_BASE_TC2->TC_IER = AT91C_TC_CPCS; AIC_EnableIT( AT91C_ID_TC2 ); TC_Start( AT91C_BASE_TC2 ); #endif // Initialize the system timer cmn_systimer_set_base_freq( BOARD_MCK / 16 ); cmn_systimer_set_interrupt_period_us( SYSTIMER_US_PER_INTERRUPT ); platform_systimer_init(); return PLATFORM_OK; }
/** * \brief ILI9488 Hardware Initialization for SPI/SMC LCD. */ static void _ILI9488_Spi_HW_Initialize(void) { /* Pin configurations */ PIO_Configure(&lcd_spi_reset_pin, 1); PIO_Configure(&lcd_spi_cds_pin, 1); PIO_Configure(lcd_pins, PIO_LISTSIZE(lcd_pins)); PIO_Configure(&lcd_spi_pwm_pin, 1); /* Enable PWM peripheral clock */ PMC_EnablePeripheral(ID_PWM0); PMC_EnablePeripheral(ID_SPI0); /* Set clock A and clock B */ // set for 14.11 KHz for CABC control //mode = PWM_CLK_PREB(0x0A) | (PWM_CLK_DIVB(110)) | //PWM_CLK_PREA(0x0A) | (PWM_CLK_DIVA(110)); PWMC_ConfigureClocks(PWM0, 14200, 0, BOARD_MCK); /* Configure PWM channel 1 for LED0 */ PWMC_DisableChannel(PWM0, CHANNEL_PWM_LCD); PWMC_ConfigureChannel(PWM0, CHANNEL_PWM_LCD, PWM_CMR_CPRE_CLKA, 0, PWM_CMR_CPOL); PWMC_SetPeriod(PWM0, CHANNEL_PWM_LCD, 16); PWMC_SetDutyCycle(PWM0, CHANNEL_PWM_LCD, 8); PWMC_EnableChannel(PWM0, CHANNEL_PWM_LCD); SPI_Configure(ILI9488_SPI, ID_SPI0, (SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS(SMC_EBI_LCD_CS))); SPI_ConfigureNPCS(ILI9488_SPI, SMC_EBI_LCD_CS, SPI_CSR_CPOL | SPI_CSR_BITS_8_BIT | SPI_DLYBS(6, BOARD_MCK) | SPI_DLYBCT(100, BOARD_MCK) | SPI_SCBR(20000000, BOARD_MCK)); SPI_Enable(ILI9488_SPI); }
static void ILI9488_InitInterface(void) { PIO_Configure(ILI9488_Reset, PIO_LISTSIZE(ILI9488_Reset)); PIO_Configure(spi_pins, PIO_LISTSIZE(spi_pins)); PIO_Configure(ILI9488_Pwm, PIO_LISTSIZE(ILI9488_Pwm)); /* Enable PWM peripheral clock */ PMC_EnablePeripheral(ID_PWM0); /* Set clock A and clock B */ // set for 14.11 KHz for CABC control // mode = PWM_CLK_PREB(0x0A) | (PWM_CLK_DIVB(110)) | // PWM_CLK_PREA(0x0A) | (PWM_CLK_DIVA(110)); PWMC_ConfigureClocks(PWM0, 14200, 0, BOARD_MCK); /* Configure PWM channel 1 for LED0 */ PWMC_DisableChannel(PWM0, CHANNEL_PWM_LCD); PWMC_ConfigureChannel(PWM0, CHANNEL_PWM_LCD, PWM_CMR_CPRE_CLKA,0,PWM_CMR_CPOL); PWMC_SetPeriod(PWM0, CHANNEL_PWM_LCD, 16); PWMC_SetDutyCycle(PWM0, CHANNEL_PWM_LCD, 8); PWMC_EnableChannel(PWM0, CHANNEL_PWM_LCD); SPI_Configure(ILI9488, ILI9488_ID, (SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS( ILI9488_cs ))); SPI_ConfigureNPCS( ILI9488, ILI9488_cs, SPI_CSR_CPOL | SPI_CSR_BITS_9_BIT | SPI_DLYBS(100, BOARD_MCK) | SPI_DLYBCT(100, BOARD_MCK) | SPI_SCBR( 35000000, BOARD_MCK) ) ; SPI_Enable(ILI9488); }
//////////////////////////////////////////////////////////////////////////////// // Konfiguracja 4-rech kana��w PWM dla silnik�w //////////////////////////////////////////////////////////////////////////////// void PWM_Configure() { //wlaczenie zegara dla pwm PMC_EnablePeripheral(AT91C_ID_PWMC); // AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_PWMC ); PWMC_ConfigureChannel(0, 0x6 << 0, 0x1 << 8, 0x1 << 9 | 0x0 << 10); // PWMC_ConfigureChannel(1, 0x6 << 0, 0x1 << 8, 0x1 << 9 | 0x0 << 10); // PWMC_ConfigureChannel(2, 0x6 << 0, 0x1 << 8, 0x1 << 9 | 0x0 << 10); // PWMC_ConfigureChannel(3, 0x6 << 0, 0x1 << 8, 0x1 << 9 | 0x0 << 10); // //wylaczenie wszystkich kanalow przed zmiana konfiguracji // AT91C_BASE_PWMC->PWMC_DIS = (AT91C_PWMC_CHID0 | AT91C_PWMC_CHID1 | AT91C_PWMC_CHID2 | AT91C_PWMC_CHID3); // // //oczekiwanie na wy��czenie wszystkich kanalow // while(AT91C_BASE_PWMC->PWMC_SR & (AT91C_PWMC_CHID0 | AT91C_PWMC_CHID1 | AT91C_PWMC_CHID2 | AT91C_PWMC_CHID3) ); // // //KONFIGURACJA TRYBU PRACY // // - prescaler = MCK/64 // // - alligment = center // // - polarity = high // // - update = duty // AT91C_BASE_PWMC->PWMC_CH[0].PWMC_CMR = (0x6 << 0 | 0x1 << 8 | 0x1 << 9 | 0x0 << 10); // AT91C_BASE_PWMC->PWMC_CH[1].PWMC_CMR = (0x6 << 0 | 0x1 << 8 | 0x1 << 9 | 0x0 << 10); // AT91C_BASE_PWMC->PWMC_CH[2].PWMC_CMR = (0x6 << 0 | 0x1 << 8 | 0x1 << 9 | 0x0 << 10); // AT91C_BASE_PWMC->PWMC_CH[3].PWMC_CMR = (0x6 << 0 | 0x1 << 8 | 0x1 << 9 | 0x0 << 10); // // rozdzielczosc = 255 PWMC_SetPeriod(0, 255); // PWMC_SetPeriod(1, 255); // PWMC_SetPeriod(2, 255); // PWMC_SetPeriod(3, 255); // AT91C_BASE_PWMC->PWMC_CH[0].PWMC_CPRDR = 256; // AT91C_BASE_PWMC->PWMC_CH[1].PWMC_CPRDR = 256; // AT91C_BASE_PWMC->PWMC_CH[2].PWMC_CPRDR = 256; // AT91C_BASE_PWMC->PWMC_CH[3].PWMC_CPRDR = 256; // wypelnienie poczatkowe = 1 PWMC_SetDutyCycle(0, 1); // PWMC_SetDutyCycle(1, 1); // PWMC_SetDutyCycle(2, 1); // PWMC_SetDutyCycle(3, 1); // AT91C_BASE_PWMC->PWMC_CH[0].PWMC_CDTYR = 2; // AT91C_BASE_PWMC->PWMC_CH[1].PWMC_CDTYR = 2; // AT91C_BASE_PWMC->PWMC_CH[2].PWMC_CDTYR = 2; // AT91C_BASE_PWMC->PWMC_CH[3].PWMC_CDTYR = 2; //KONFIGURACJA WYPROWADZENIA PA11, PA12, PA13, PA14 // AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, AT91C_PA11_PWM0 ); //Uruchomienie wszystkich kana��w PWM PWMC_EnableChannel(0); // PWMC_EnableChannel(1); // PWMC_EnableChannel(2); // PWMC_EnableChannel(3); // AT91C_BASE_PWMC->PWMC_ENA = (AT91C_PWMC_CHID0 | AT91C_PWMC_CHID1 | AT91C_PWMC_CHID2 | AT91C_PWMC_CHID3); }
void audioInit(void) { PMC_EnablePeripheral(ID_PWM); PWMC_ConfigureClocks(0, 0, BOARD_MCK); PWMC_ConfigureChannel(PWM, 0, PWM_CMR_CPRE_MCK, 0, 0); PWMC_ConfigureEventLineMode(PWM, 0, 1); audioSetSample(AUDIO_NULL, DEFAULT_AUDIO_SAMPLERATE); PWMC_EnableChannel(PWM, 0); PMC_EnablePeripheral(ID_DACC); DACC_Initialize(DACC, ID_DACC, 1, 4, 0, 0, BOARD_MCK, 8, DACC_CHANNEL_0, 0, 16 ); DACC_EnableChannel(DACC, DACC_CHANNEL_0); }
void dc_update_pwm_frequency(void) { // Calculate best possible frequency uint8_t cmr_cpre; for(cmr_cpre = 0; cmr_cpre < DC_NUM_PWM_FREQUENCIES; cmr_cpre++) { uint32_t frequency = (BOARD_MCK/(1 << cmr_cpre)); if(dc_pwm_frequency > frequency/0xFFFF) { dc_pwm_scale_value = frequency/dc_pwm_frequency; break; } } // Set PWM frequency according to PWM mode (drive/brake vs drive/coast) if(dc_mode == DC_MODE_DRIVE_BRAKE) { PWMC_DisableChannel(PWM, INPUT1_CHANNEL); PWMC_DisableChannel(PWM, INPUT2_CHANNEL); PWMC_ConfigureChannel(PWM, INPUT1_CHANNEL, cmr_cpre, 0, 0); PWMC_SetPeriod(PWM, INPUT1_CHANNEL, dc_pwm_scale_value); PWMC_ConfigureChannel(PWM, INPUT2_CHANNEL, cmr_cpre, 0, 0); PWMC_SetPeriod(PWM, INPUT2_CHANNEL, dc_pwm_scale_value); PWMC_EnableChannel(PWM, INPUT1_CHANNEL); PWMC_EnableChannel(PWM, INPUT2_CHANNEL); dc_velocity_to_pwm(); } else { PWMC_DisableChannel(PWM, DISABLE1_CHANNEL); PWMC_ConfigureChannel(PWM, DISABLE1_CHANNEL, cmr_cpre, 0, 0); PWMC_SetPeriod(PWM, DISABLE1_CHANNEL, dc_pwm_scale_value); PWMC_EnableChannel(PWM, DISABLE1_CHANNEL); dc_velocity_to_pwm(); } }
/** * \brief Application entry point for PWM with PDC example. * * Outputs a PWM on LED1. * Channel #0 is configured as synchronous channels. * The update of the duty cycle values is made automatically by the Peripheral DMA Controller. * * \return Unused (ANSI-C compatibility). */ int main(void) { uint32_t i; /* Disable watchdog */ WDT_Disable( WDT ) ; /* Enable I and D cache */ SCB_EnableICache(); SCB_EnableDCache(); /* Output example information */ printf("-- PWM with DMA Example %s --\n\r", SOFTPACK_VERSION); printf("-- %s\n\r", BOARD_NAME); printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__); /* PIO configuration */ PIO_Configure(pinPwm, PIO_LISTSIZE(pinPwm)); for (i= 0; i< DUTY_BUFFER_LENGTH; i++) dwDutys[i] = i/2; /* Enable PWMC peripheral clock */ PMC_EnablePeripheral(ID_PWM0); /* Configure interrupt for PWM transfer */ NVIC_DisableIRQ(PWM0_IRQn); NVIC_ClearPendingIRQ(PWM0_IRQn); NVIC_SetPriority(PWM0_IRQn, 0); /* Configure DMA channel for PWM transfer */ _ConfigureDma(); /* Set clock A to run at PWM_FREQUENCY * MAX_DUTY_CYCLE (clock B is not used) */ PWMC_ConfigureClocks(PWM0, PWM_FREQUENCY * MAX_DUTY_CYCLE , 0, BOARD_MCK); /* Configure PWMC channel for LED0 (left-aligned, enable dead time generator) */ PWMC_ConfigureChannel( PWM0, 0, /* channel */ PWM_CMR_CPRE_CLKA, /* prescaler, CLKA */ 0, /* alignment */ 0 /* polarity */ ); PWMC_ConfigureSyncChannel(PWM0, (1 << CHANNEL_PWM_LED0), /* Define the synchronous channels by the bits SYNCx */ PWM_SCM_UPDM_MODE2, /* Select the manual write of duty-cycle values and the automatic update by setting the field UPDM to 鈥�1鈥� */ 0, 0); /* Configure channel 0 period */ PWMC_SetPeriod(PWM0, 0, DUTY_BUFFER_LENGTH); /* Configure channel 0 duty cycle */ PWMC_SetDutyCycle(PWM0, 0, MIN_DUTY_CYCLE); /* Define the update period by the field UPR in the PWM_SCUP register*/ PWMC_SetSyncChannelUpdatePeriod(PWM0, 8); /* Enable the synchronous channels by writing CHID0 in the PWM_ENA register */ PWMC_EnableChannel(PWM0, 0); /* Enable PWM interrupt */ PWMC_EnableIt(PWM0, 0, PWM_IER2_WRDY); NVIC_EnableIRQ(PWM0_IRQn); _PwmDmaTransfer(); while(1); }
void imu_leds_on(const bool on) { if(on) { PMC->PMC_PCER0 = 1 << ID_PWM; for(uint8_t i = 0; i < 4; i++) { PWMC_ConfigureChannel(PWM, i, PWM_CMR_CPRE_MCK, 0, 0); PWMC_SetPeriod(PWM, i, 0xFFFF); PWMC_SetDutyCycle(PWM, i, 0); PWMC_EnableChannel(PWM, i); } PMC->PMC_PCER0 = 1 << ID_TC0; tc_channel_init(&TC0->TC_CHANNEL[0], TC_CMR_WAVE | TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET | TC_CMR_WAVSEL_UP_RC); TC0->TC_CHANNEL[0].TC_RA = 0; TC0->TC_CHANNEL[0].TC_RC = 0xFFFF; tc_channel_start(&TC0->TC_CHANNEL[0]); PMC->PMC_PCER0 = 1 << ID_TC1; tc_channel_init(&TC0->TC_CHANNEL[1], TC_CMR_WAVE | TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET | TC_CMR_WAVSEL_UP_RC); TC0->TC_CHANNEL[1].TC_RA = 0; TC0->TC_CHANNEL[1].TC_RC = 0xFFFF; tc_channel_start(&TC0->TC_CHANNEL[1]); PMC->PMC_PCER0 = 1 << ID_TC2; tc_channel_init(&TC0->TC_CHANNEL[2], TC_CMR_WAVE | TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_BCPB_CLEAR | TC_CMR_BCPC_SET | TC_CMR_EEVT_XC0 | TC_CMR_WAVSEL_UP_RC); TC0->TC_CHANNEL[2].TC_RB = 0; TC0->TC_CHANNEL[2].TC_RC = 0xFFFF; tc_channel_start(&TC0->TC_CHANNEL[2]); PIO_Configure(pins_imu_led, PIO_LISTSIZE(pins_imu_led)); } else { PMC->PMC_PCER0 &= ~(1 << ID_PWM); PMC->PMC_PCER0 &= ~(1 << ID_TC0); PMC->PMC_PCER0 &= ~(1 << ID_TC1); PMC->PMC_PCER0 &= ~(1 << ID_TC2); Pin pins[] = {PINS_IMU_LED}; for(uint8_t i = 0; i < PIO_LISTSIZE(pins); i++) { pins[i].type = PIO_OUTPUT_1; } PIO_Configure(pins, PIO_LISTSIZE(pins)); } imu_use_leds = on; }