void Inputs_Init (void)
{
// Keyboard
Inputs.KeyPressedQueue = NULL;
// Sources
Inputs_Sources_Init();
// Peripheral
Peripherals_Init();
// Load Inputs Sources List
Load_Inputs_Src_List();
}
/*
** ===================================================================
** Method : PEX_components_init
**
** Description :
** Initializes components and provides common register
** initialization. The method is called automatically as a part
** of the application initialization code.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PEX_components_init(void)
{
/* Common initialization */
#if CPU_COMMON_INIT
Common_Init();
#endif /* CPU_COMMON_INIT */
/* Peripheral initialization components initialization */
#if CPU_PERIPHERALS_INIT
Peripherals_Init();
#endif /* CPU_PERIPHERALS_INIT */
/* Rest of components initialization */
#if CPU_COMPONENTS_INIT
Components_Init();
#endif /* CPU_COMPONENTS_INIT */
}
/*
** ===================================================================
** Method : PE_low_level_init (component MKE06Z128LK4)
**
** Description :
** Initializes components and provides common register
** initialization. The method is called automatically as a part
** of the application initialization code.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PE_low_level_init(void)
{
/* RTOS initialization */
#ifdef PEX_RTOS_INIT
PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */
#endif
/* Debug pins port clock gate enable */
#if CPU_SWD_DIO_PIN | CPU_SWD_CLK_PIN
SIM_SCGC |= (uint32_t)SIM_SCGC_SWD_MASK; /* SWD pins clock gate enable */
#endif /* CPU_SWD_DIO_PIN | CPU_SWD_CLK_PIN */
/* NMI pin initialization */
#if CPU_NMI_PIN
SIM_SOPT0 |= (uint32_t)SIM_SOPT0_NMIE_MASK; /* Enable NMI pin */
#else
SIM_SOPT0 &= (uint32_t)~(uint32_t)SIM_SOPT0_NMIE_MASK; /* Disable NMI pin */
#endif /* CPU_NMI_PIN */
/* Reset pin initialization */
#if CPU_RESET_PIN
SIM_SOPT0 |= (uint32_t)SIM_SOPT0_RSTPE_MASK; /* Enable Reset pin */
#else
SIM_SOPT0 &= (uint32_t)~(uint32_t)SIM_SOPT0_RSTPE_MASK; /* Disable Reset pin */
#endif /* CPU_RESET_PIN */
/* SWD pins initialization */
#if CPU_SWD_DIO_PIN | CPU_SWD_CLK_PIN
SIM_SOPT0 |= (uint32_t)SIM_SOPT0_SWDE_MASK; /* Enable SWD pins */
#else
SIM_SOPT0 &= (uint32_t)~(uint32_t)SIM_SOPT0_SWDE_MASK; /* Disable SWD pins */
#endif /* CPU_SWD_DIO_PIN | CPU_SWD_CLK_PIN */
/* Common initialization */
#if CPU_COMMON_INIT
Common_Init();
#endif /* CPU_COMMON_INIT */
/* Peripheral initialization components initialization */
#if CPU_PERIPHERALS_INIT
Peripherals_Init();
#endif /* CPU_PERIPHERALS_INIT */
/* OnReset event */
#ifdef CPU_ON_RESET_EVENT_NAME
CPU_ON_RESET_EVENT_NAME((uint16_t)SIM_SRSID); /* Invoke an user event */
#endif /* CPU_ON_RESET_EVENT_NAME */
/* Rest of components initialization */
#if CPU_COMPONENTS_INIT
Components_Init();
#endif /* CPU_COMPONENTS_INIT */
/* Interrupts priority level initialization */
#if CPU_INT_PRIORITY == 0
__DI(); /* Disable interrupts */
#elif CPU_INT_PRIORITY == 1
__EI(); /* Enable interrupts */
#else
#error Unsupported interrupt priority level
#endif
}
