int CMemMap::StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT MemMapRegs[] =
{
SFVAR(mMikieEnabled),
SFVAR(mSusieEnabled),
SFVAR(mRomEnabled),
SFVAR(mVectorsEnabled),
SFEND
};
std::vector <SSDescriptor> love;
love.push_back(SSDescriptor(MemMapRegs, "MMAP"));
int ret = MDFNSS_StateAction(sm, load, data_only, love);
if(load)
{
// The peek will give us the correct value to put back
uint8 mystate=Peek(0);
// Now set to un-initialised so the poke will set correctly
mSusieEnabled=-1;
mMikieEnabled=-1;
mRomEnabled=-1;
mVectorsEnabled=-1;
// Set banks correctly
Poke(0,mystate);
}
return ret;
}
oexBOOL CDataPacket::WritePacketData(oexCPVOID x_pData, oexUINT x_uSize, oexUINT x_uEncode )
{
// Write out the packet header
if ( !Poke( x_pData, x_uSize, x_uEncode ) ) return oexFALSE;
return oexTRUE;
}
/*
* Frees access to the SC register
* return values: -1 if called when not granted
* 0 otherwise
*/
int Sem_Free()
{
/* Check if access was granted */
if( sem_state != SEM_STATE_GRANTED )
{
sprintf( sem_msg, "Sem_Free: not granted" );
sem_state = SEM_STATE_ERROR;
return D_RetCode_Err_Sem;
}
/* Check SC register value */
sem_reg_val = Peek(sem_reg_adr);
if( Sem_GetMine(sem_reg_val) == 0 )
{
sprintf( sem_msg, "Sem_Free: mine is not set" );
sem_state = SEM_STATE_ERROR;
return D_RetCode_Err_Sem;
}
/* clear semaphore */
sem_reg_val = Sem_Clr(sem_reg_val);
Poke( sem_reg_adr, sem_reg_val );
/* Freed */
sem_state = SEM_STATE_FREE;
return D_RetCode_Sucsess;
}
bool CMemMap::ContextLoad(LSS_FILE *fp)
{
char teststr[100]="XXXXXXXXXXXXXXXXXXXX";
// First put everything to a known state
Reset();
// Read back our parameters
if(!lss_read(teststr,sizeof(char),20,fp)) return 0;
if(strcmp(teststr,"CMemMap::ContextSave")!=0) return 0;
if(!lss_read(&mMikieEnabled,sizeof(ULONG),1,fp)) return 0;
if(!lss_read(&mSusieEnabled,sizeof(ULONG),1,fp)) return 0;
if(!lss_read(&mRomEnabled,sizeof(ULONG),1,fp)) return 0;
if(!lss_read(&mVectorsEnabled,sizeof(ULONG),1,fp)) return 0;
// The peek will give us the correct value to put back
UBYTE mystate=Peek(0);
// Now set to un-initialised so the poke will set correctly
mSusieEnabled=-1;
mMikieEnabled=-1;
mRomEnabled=-1;
mVectorsEnabled=-1;
// Set banks correctly
Poke(0,mystate);
return 1;
}
void CMemMap::StateAction(StateMem *sm, const unsigned load, const bool data_only)
{
SFORMAT MemMapRegs[] =
{
SFVAR(mMikieEnabled),
SFVAR(mSusieEnabled),
SFVAR(mRomEnabled),
SFVAR(mVectorsEnabled),
SFEND
};
MDFNSS_StateAction(sm, load, data_only, MemMapRegs, "MMAP");
if(load)
{
// The peek will give us the correct value to put back
uint8 mystate=Peek(0);
// Now set to un-initialised so the poke will set correctly
mSusieEnabled=-1;
mMikieEnabled=-1;
mRomEnabled=-1;
mVectorsEnabled=-1;
// Set banks correctly
Poke(0,mystate);
}
}
void DbgGdb::OnDataRead(wxCommandEvent& e)
{
// Data arrived from the debugger
ProcessEventData *ped = (ProcessEventData *)e.GetClientData();
wxString bufferRead;
bufferRead << ped->GetData();
delete ped;
wxArrayString lines = wxStringTokenize(bufferRead, wxT("\n"), wxTOKEN_STRTOK);
for(size_t i=0; i<lines.GetCount(); i++) {
wxString line = lines.Item(i);
line.Replace(wxT("(gdb)"), wxT(""));
line.Trim().Trim(false);
if ( line.IsEmpty() == false ) {
m_gdbOutputArr.Add( line );
//wxPrintf(wxT("Debugger: %s\n"), line.c_str());
}
}
if ( m_gdbOutputArr.IsEmpty() == false ) {
// Trigger GDB processing
Poke();
}
}
//CT BEGIN
BOOL CDDEConv::Poke(const TCHAR* pszItem, void* pData, DWORD dwSize)
{
//
// format-less version for Netscape defaults to text
//
return Poke(CF_TEXT, pszItem, pData, dwSize) ;
}
void _WRITE_STRING(unsigned char* &MEM,astr DAT_S) { // WRITE_STRING:
aint DLUG=0;
DLUG=Len(DAT_S); // DLUG=Len(DAT$)
Poke(MEM,DLUG); MEM++; // Poke MEM,DLUG : Inc MEM
Poke_S(MEM,DAT_S); // Poke$ MEM,DAT$
MEM+=DLUG; // Add MEM,DLUG
return; // Return
}
void OpenFileConnection::SendOpenFile(std::string path)
{
if (path == "")
{
path = " ";
}
Poke(L"OPEN", path.c_str(), path.size());
}
void
begin (int argc, const char * argv[])
{
size_t output;
size_t pos;
output = Outfile ("-");
Add_field (output, Sym ("uint4"), Sym ("bp0"));
Add_field (output, Sym ("uint4"), Sym ("bp1"));
File_fix (output, 1, 0);
pos = 0;
while (1)
{
const int char_in = getchar ();
if (char_in == EOF)
{
if (ferror (stdin))
Fatal ("input error");
else
{
if (pos % 2)
{
Poke (output, 0, 1, uInt4 (bp_letter_to_int4 (0)));
Advance (output, 1);
}
break;
}
}
Poke (output, 0, (pos % 2),
uInt4 (bp_letter_to_int4 (char_in)));
++pos;
if (!(pos % 2))
Advance (output, 1);
}
Close (output);
}
void OPL3::NoteOff(size_t c)
{
size_t card = c / 23, cc = c % 23;
if(cc >= 18)
{
regBD[card] &= ~(0x10 >> (cc - 18));
Poke(card, 0xBD, regBD[card]);
return;
}
/*
* Acqures access to the SC register
* return values: -2 if called when already granted
* -1 if not granted but semaphore set
* 0 if access is not granted
* 1 if succeeded to acuire exclusive access
*/
int Sem_Acquire()
{
/* Check if already granted */
if( sem_state == SEM_STATE_GRANTED )
{
sprintf( sem_msg, "Sem_Acquire: already granted" );
sem_state = SEM_STATE_ERROR;
return D_RetCode_Err_Sem;
}
/* Get SC register value */
sem_reg_val = Peek(sem_reg_adr);
/* Check if semaphore is set */
if( Sem_GetMine(sem_reg_val) )
{
sprintf( sem_msg, "Sem_Acquire: mine already set" );
sem_state = SEM_STATE_ERROR;
return D_RetCode_Err_Sem;
}
/* Check if someone already holds the access */
if( Sem_Get(sem_reg_val) )
{
sem_state = SEM_STATE_BUSY;
return D_RetCode_Wrn_SemBusy;
}
/* Try to get access */
sem_reg_val = Sem_SetMine(sem_reg_val);
Poke( sem_reg_adr, sem_reg_val );
sem_reg_val = Peek( sem_reg_adr );
if( Sem_Get(sem_reg_val) != SEM_VAL )
{
/* Contention detected: back-off to try later */
sem_reg_val = Sem_Clr(sem_reg_val);
Poke( sem_reg_adr, sem_reg_val );
return D_RetCode_Wrn_SemBusy;
}
/* Acquired */
sem_state = SEM_STATE_GRANTED;
return D_RetCode_Sucsess;
}
oexBOOL CDataPacket::EndPacket()
{
oexGUID cs;
// Get the md5
m_md5.Final( &cs );
// Write out the check sum
if ( !Poke( &cs, sizeof( cs ) ) )
return oexFALSE;
// Commit the data
EndPoke();
return oexTRUE;
}
void CMemMap::Reset(void)
{
// Initialise ALL pointers to RAM then overload to correct
for(int loop=0;loop<SYSTEM_SIZE;loop++) mSystem.mMemoryHandlers[loop]=mSystem.mRam;
// Special case for ourselves.
mSystem.mMemoryHandlers[0xFFF8]=mSystem.mRam;
mSystem.mMemoryHandlers[0xFFF9]=mSystem.mMemMap;
mSusieEnabled=-1;
mMikieEnabled=-1;
mRomEnabled=-1;
mVectorsEnabled=-1;
// Initialise everything correctly
Poke(0,0);
}
void DbgGdb::OnDataRead( wxCommandEvent& e )
{
// Data arrived from the debugger
ProcessEventData *ped = ( ProcessEventData * )e.GetClientData();
wxString bufferRead;
bufferRead << ped->GetData();
delete ped;
if( !m_gdbProcess || !m_gdbProcess->IsAlive() )
return;
CL_DEBUG("GDB>> %s", bufferRead);
wxArrayString lines = wxStringTokenize( bufferRead, wxT( "\n" ), wxTOKEN_STRTOK );
if(lines.IsEmpty())
return;
// Prepend the partially saved line from previous iteration to the first line
// of this iteration
lines.Item(0).Prepend(m_gdbOutputIncompleteLine);
m_gdbOutputIncompleteLine.Clear();
// If the last line is in-complete, remove it from the array and keep it for next iteration
if(!bufferRead.EndsWith(wxT("\n"))) {
m_gdbOutputIncompleteLine = lines.Last();
lines.RemoveAt(lines.GetCount()-1);
}
for( size_t i=0; i<lines.GetCount(); i++ ) {
wxString line = lines.Item( i );
line.Replace( wxT( "(gdb)" ), wxT( "" ) );
line.Trim().Trim( false );
if ( line.IsEmpty() == false ) {
m_gdbOutputArr.Add( line );
}
}
if ( m_gdbOutputArr.IsEmpty() == false ) {
// Trigger GDB processing
Poke();
}
}
// ClientConnect: Poke the server to open a file.
void OpenFile(const wxString& filename) { Poke(OPEN_FILE, filename); }
// Service pending interrupts, serviceFlag set true iff something serviced
int m68000::ServiceInterrupts(bool &serviceFlag) {
serviceFlag = false;
// If there are no pending interupts, return normally.
if (pending_interrupts.empty()) {
return EXECUTE_OK;
}
const PendingInterrupt &interrupt = pending_interrupts.top();
// Also return normally if any of the currently pending interrupts
// are masked. Note that a check against the top of the queue is
// sufficient, as the top entry has the highest level.
const int interrupt_mask = (register_value[SR_INDEX] & 0x0700) >> 8;
if (interrupt.level < interrupt_mask && interrupt.level != 7) {
return EXECUTE_OK;
}
// Put the processor into normal state if it's stopped
if (myState == STOP_STATE)
myState = NORMAL_STATE;
// Save a copy of the current SR so it can be stacked for entry
// to the interrupt service subroutine
Register tmp_sr = register_value[SR_INDEX];
// Set the Interrupt Mask in SR
register_value[SR_INDEX] &= 0x0000f8ff;
register_value[SR_INDEX] |= (interrupt.level << 8);
// Change to Supervisor mode and clear the Trace mode
register_value[SR_INDEX] |= S_FLAG;
register_value[SR_INDEX] &= ~T_FLAG;
// Interrupt has occured so push the PC and the SR
SetRegister(SSP_INDEX, register_value[SSP_INDEX] - 4, LONG);
int status = Poke(register_value[SSP_INDEX], register_value[PC_INDEX], LONG);
if (status != EXECUTE_OK)
return status;
SetRegister(SSP_INDEX, register_value[SSP_INDEX] - 2, LONG);
status = Poke(register_value[SSP_INDEX], tmp_sr, WORD);
if (status != EXECUTE_OK)
return status;
// Get the vector number by acknowledging to the device
int vector = interrupt.device->InterruptAcknowledge(interrupt.level);
if (vector == AUTOVECTOR_INTERRUPT)
vector = 24 + interrupt.level;
else if (vector == SPURIOUS_INTERRUPT)
vector = 24;
// Get the interrupt service routine's address
Address service_address;
status = Peek(vector * 4, service_address, LONG);
if (status != EXECUTE_OK)
return status;
// Change the program counter to the service routine's address
SetRegister(PC_INDEX, service_address, LONG);
// Indicate that an interrupt was serviced and remove it from
// the queue of pending interrupts
serviceFlag = true;
pending_interrupts.pop();
return EXECUTE_OK;
}
void _ZAPIS(astr NAME_S,aint NSAVE) {
// ZAPIS:
aint I=0, J=0, K=0, DAT=0;
astr DAT_S="";
BUSY_ANIM(); // BUSY_ANIM
unsigned char bank[60000], *MEM; // Reserve As Work 10,60000
for(int i=0; i<60000; ++i ) {
bank[i]=0;
}
Poke_S(bank,NAME_S); // Poke$ Start(10),NAME$
MEM=bank+20; // MEM=Start(10)+20
// 'armia(40,10,30)
for( I=0; I<=40; ++I ) { // For I=0 To 40
for( J=0; J<=10; ++J ) { // For J=0 To 10
for( K=0; K<=30; ++K ) { // For K=0 To 30
DAT=ARMIA[I][J][K]; // DAT=ARMIA(I,J,K)
Doke(MEM,DAT); // Doke MEM,DAT
MEM+=2; // Add MEM,2
} // Next K
} // Next J
} // Next I
// 'wojna(5,5)
for( I=0; I<=5; ++I ) { // For I=0 To 5
for( J=0; J<=5; ++J ) { // For J=0 To 5
DAT=WOJNA[I][J]; // DAT=WOJNA(I,J)
Poke(MEM,DAT); // Poke MEM,DAT
MEM++; // Inc MEM
} // Next
} // Next
// 'gracze(4,3)
for( I=0; I<=4; ++I ) { // For I=0 To 4
for( J=0; J<=3; ++J ) { // For J=0 To 3
DAT=GRACZE[I][J]; // DAT=GRACZE(I,J)
Loke(MEM,DAT); // Loke MEM,DAT
MEM+=4; // Add MEM,4
} // Next
} // Next
// 'armia$(40,10)
for( I=0; I<=40; ++I ) { // For I=0 To 40
for( J=0; J<=10; ++J ) { // For J=0 To 10
DAT_S=ARMIA_S[I][J]; // DAT$=ARMIA$(I,J)
_WRITE_STRING(MEM,DAT_S); // Gosub WRITE_STRING
} // Next
} // Next
// 'imiona$(4)
for( I=0; I<=4; ++I ) { // For I=0 To 4
DAT_S=IMIONA_S[I]; // DAT$=IMIONA$(I)
_WRITE_STRING(MEM,DAT_S); // Gosub WRITE_STRING
} // Next
// 'prefs(10)
for( I=0; I<=10; ++I ) { // For I=0 To 10
DAT=PREFS[I]; // DAT=PREFS(I)
Poke(MEM,DAT); // Poke MEM,DAT
MEM++; // Inc MEM
} // Next
// 'miasta(50,20,6)
for( I=0; I<=50; ++I ) { // For I=0 To 50
for( J=0; J<=20; ++J ) { // For J=0 To 20
for( K=0; K<=6; ++K ) { // For K=0 To 6
DAT=MIASTA[I][J][K]; // DAT=MIASTA(I,J,K)
Doke(MEM,DAT); // Doke MEM,DAT
MEM+=2; // Add MEM,2
} // Next K
} // Next J
} // Next I
// 'miasta$(50)
for( I=0; I<=50; ++I ) { // For I=0 To 50
DAT_S=MIASTA_S[I]; // DAT$=MIASTA$(I)
_WRITE_STRING(MEM,DAT_S); // Gosub WRITE_STRING
} // Next
Doke(MEM,DZIEN); MEM+=2; // Doke MEM,DZIEN : Add MEM,2
Doke(MEM,POWER); MEM+=2; // Doke MEM,POWER : Add MEM,2
// 'przygody(3,10)
for( I=0; I<=3; ++I ) { // For I=0 To 3
for( J=0; J<=10; ++J ) { // For J=0 To 10
DAT=PRZYGODY[I][J]; // DAT=PRZYGODY(I,J)
Doke(MEM,DAT); // Doke MEM,DAT
MEM+=2; // Add MEM,2
} // Next J
} // Next I
// 'im_przygody$(3)
for( I=0; I<=3; ++I ) { // For I=0 To 3
DAT_S=IM_PRZYGODY_S[I]; // DAT$=IM_PRZYGODY$(I)
_WRITE_STRING(MEM,DAT_S); // Gosub WRITE_STRING
} // Next I
//
ChangeMouse(42); // Change Mouse 42
AmalOnOff(-1,false); // Amal Off
// Show
// On Error Proc BLAD2
// Resume Label SKIP
// If Exist(KAT$+"archiwum")
// Bsave KAT$+"archiwum/zapis"+Str$(NSAVE),Start(10) To MEM
FILE *fout=fopen((KAT_S+"archiwum/zapis"+Str_S(NSAVE)).c_str(),"wb");
if( fout!=0 ) {
fwrite(bank,1,MEM-bank,fout);
fclose(fout); // Else
} // REQUEST["archiwum:","Archiwum"]
// Bsave "archiwum:zapis"+Str$(NSAVE),Start(10) To MEM
// End If
// SKIP:
// Erase 10
ChangeMouse(5); // Change Mouse 5
SpriteOnOff(0,false);
return; // Return
// //
}
/*
Spi_DreamRegReadWrite
Returns
D_RetCode_Err_Wrong_Param
D_RetCode_Err_WrRd_Missmatch
D_RetCode_Sucsess
*/
int Spi_DreamRegReadWrite(int op, int dream, unsigned char adr, unsigned short val[4] )
{
int index;
int nb_of_loops;
int dis_cs_at;
int nb_of_sig_words;
unsigned short val_copy[5];
unsigned short *data;
unsigned int feu_sc_reg_rd;
unsigned int feu_sc_reg_wr;
unsigned int spi_dream_rd_bit;
//printf("Spi_DreamRegReadWrite: op=%d dream=%d adr=%d\n\r", op, dream, adr);
// Check parameters
if( adr >= D_SPI_DREAM_REG_NUM )
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: adr=%d >= D_SPI_DREAM_REG_NUM=%d",
adr, D_SPI_DREAM_REG_NUM );
return D_RetCode_Err_Wrong_Param;
}
// Init value
if( op == D_SPI_DREAM_READ )
{
val_copy[0] = 0;
val_copy[1] = 0;
val_copy[2] = 0;
val_copy[3] = 0;
}
else
{
// printf("Spi_DreamRegReadWrite: op=%d dream=%d adr=%d val: 0=0x%04x 1=0x%04x 2=0x%04x 3=0x%04x\n\r",
// op, dream, adr, val[0], val[1], val[2], val[3]);
val_copy[0] = val[0];
val_copy[1] = val[1];
val_copy[2] = val[2];
val_copy[3] = val[3];
}
// read the slow control register
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
// Set SPI clock enable bit
feu_sc_reg_wr = D_Feu_RegSC_Dream_En_Set( feu_sc_reg_rd );
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if( D_Feu_RegSC_Dream_En_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_En_Get(feu_sc_reg_wr) )
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: WrRd_Missmatch for En_Set wr=0x%08x rd=0x%08x", feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
// Set SPI clock bit
feu_sc_reg_wr = D_Feu_RegSC_Dream_Clk_Set( feu_sc_reg_rd );
// Prepare the read/write bit on the serial data input of the ASIC
if( op == D_SPI_DREAM_READ )
feu_sc_reg_wr = D_Feu_RegSC_Dream_WrD_Set( feu_sc_reg_wr );
else
feu_sc_reg_wr = D_Feu_RegSC_Dream_WrD_Clr( feu_sc_reg_wr );
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if
(
D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_wr)
||
D_Feu_RegSC_Dream_WrD_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_WrD_Get(feu_sc_reg_wr)
)
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: WrRd_Missmatch for Clk or WrD wr=0x%08x rd=0x%08x", feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
// Set Enable signal of selected dream
//printf("Spi_DreamRegReadWrite: feu_sc_reg_rd=0x%08x dream=%d (1<<dream)=%d... ", feu_sc_reg_rd, dream, 1<<dream);
feu_sc_reg_wr = D_Feu_RegSC_Dream_Cs_Set( feu_sc_reg_rd, (1<<dream) );
//printf("feu_sc_reg_wr=0x%08x\n\r", feu_sc_reg_wr);
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if( D_Feu_RegSC_Dream_Cs_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_Cs_Get(feu_sc_reg_wr) )
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: WrRd_Missmatch for Cs of dream=%d wr=0x%08x rd=0x%08x", dream, feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
// Determin number of data loops
nb_of_loops = spi_dream_reg_size[adr] + 4;
if( op == D_SPI_DREAM_READ )
nb_of_loops += 2;
dis_cs_at = nb_of_loops - 4;
nb_of_sig_words = spi_dream_reg_size[adr] / 16;
// Load the 7 address bits serially, MSB first
for( index=0; index<7; index++ )
{
// Clear SPI clock bit
feu_sc_reg_wr = D_Feu_RegSC_Dream_Clk_Clr( feu_sc_reg_rd );
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if( D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_wr) )
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: %d WrRd_Missmatch for Clk_Clr wr=0x%08x rd=0x%08x", index, feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
// Set SPI clock bit
feu_sc_reg_wr = D_Feu_RegSC_Dream_Clk_Set( feu_sc_reg_rd );
// Prepare the write bit on the serial data input of the ASIC
//printf("Spi_DreamRegReadWrite: %d feu_sc_reg_rd=0x%08x feu_sc_reg_wr=0x%08x adr=0x%02x adr&0x40=%D... ", index, feu_sc_reg_rd, feu_sc_reg_wr, adr, adr & 0x40);
if( adr & 0x40 )
feu_sc_reg_wr = D_Feu_RegSC_Dream_WrD_Set( feu_sc_reg_wr );
else
feu_sc_reg_wr = D_Feu_RegSC_Dream_WrD_Clr( feu_sc_reg_wr );
//printf("feu_sc_reg_wr=0x%08x\n\r", feu_sc_reg_wr);
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if
(
D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_wr)
||
D_Feu_RegSC_Dream_WrD_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_WrD_Get(feu_sc_reg_wr)
)
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: %d adr=%d WrRd_Missmatch for Clk or WrD wr=0x%08x rd=0x%08x", index, adr, feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
adr = ( adr << 1 ) & 0x7E;
}
// loop nb_of_loops times for serial read or write
data = &(val_copy[0]);
for( index=0; index<nb_of_loops; index++ )
{
// Clear SPI clock bit
feu_sc_reg_wr = D_Feu_RegSC_Dream_Clk_Clr( feu_sc_reg_rd );
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if( D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_wr) )
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: %d WrRd_Missmatch for Clk_Clr wr=0x%08x rd=0x%08x", index, feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
// de-activate chip select on all ASICs
if( index == dis_cs_at )
{
// Clear Enable signal on all dream-s
feu_sc_reg_wr = D_Feu_RegSC_Dream_Cs_Clr( feu_sc_reg_rd );
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if( D_Feu_RegSC_Dream_Cs_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_Cs_Get(feu_sc_reg_wr) )
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: %d WrRd_Missmatch for Cs_Clr wr=0x%08x rd=0x%08x", index, feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
}
// Capture the serial data output in case of a read
// but skip the first bit shifted out of the serial link
if( (op == D_SPI_DREAM_READ) && (index > 0) )
{
spi_dream_rd_bit = D_Feu_RegSC_Dream_RdD_Get( feu_sc_reg_rd );
*data = ((*data << 1) & 0xFFFE) | spi_dream_rd_bit;
// *data = *data | spi_dream_rd_bit;
if( (index % 16) == 0 )
{
// printf("Spi_DreamRegReadWrite: index=%d data=0x%08x val=0x%08x\n\r", index, data, *data);
data++;
//printf("Spi_DreamRegReadWrite: index=%d data=0x%08x range 0x%08x - 0x%08x\n\r", index, data, &(val_copy[0]), &(val_copy[4]));
}
// if( data == &(val_copy[2]) )
//printf("Spi_DreamRegReadWrite: index=%d data=0x%08x val2=0x%08x\n\r", index, data, *data);
}
// Set SPI clock bit
feu_sc_reg_wr = D_Feu_RegSC_Dream_Clk_Set( feu_sc_reg_rd );
// Prepare next serial bit to be written in case of writes
if( op == D_SPI_DREAM_WRITE )
{
if( index < dis_cs_at ) // get data bit from supplied parameter
{
// Prepare the write bit on the serial data input of the ASIC
if( *data & 0x8000 )
feu_sc_reg_wr = D_Feu_RegSC_Dream_WrD_Set( feu_sc_reg_wr );
else
feu_sc_reg_wr = D_Feu_RegSC_Dream_WrD_Clr( feu_sc_reg_wr );
if( (index % 16) == 15 )
// {
data++;
//printf("Spi_DreamRegReadWrite: index=%d data=0x%04x\n\r", index, *data);
// }
else
*data = (*data << 1) & 0xFFFE;
}
else // no more data bits to be written from parameter (4 trailer serial clock ticks)
feu_sc_reg_wr = D_Feu_RegSC_Dream_WrD_Clr( feu_sc_reg_wr );
}
// Put the serial clock
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if
(
D_Feu_RegSC_Dream_WrD_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_WrD_Get(feu_sc_reg_wr)
||
D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_wr)
)
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: %d WrRd_Missmatch for WrD wr=0x%08x rd=0x%08x",
index, feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
}
// reset the serial clock without changing the serial data
feu_sc_reg_wr = D_Feu_RegSC_Dream_Clk_Clr( feu_sc_reg_rd );
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if( D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_Clk_Get(feu_sc_reg_wr) )
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: WrRd_Missmatch for data Clk_Clr wr=0x%08x rd=0x%08x", feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
// Clear SPI clock enable bit
feu_sc_reg_wr = D_Feu_RegSC_Dream_En_Clr( feu_sc_reg_rd );
Poke(D_FEU_SC_REG_ADR, feu_sc_reg_wr);
feu_sc_reg_rd = Peek(D_FEU_SC_REG_ADR);
if( D_Feu_RegSC_Dream_En_Get(feu_sc_reg_rd) != D_Feu_RegSC_Dream_En_Get(feu_sc_reg_wr) )
{
sprintf( feu_msg, "Spi_DreamRegReadWrite: WrRd_Missmatch for En_Clr wr=0x%08x rd=0x%08x", feu_sc_reg_wr, feu_sc_reg_rd );
return D_RetCode_Err_WrRd_Missmatch;
}
// Copy acquired data to output
val[0] = val_copy[0];
val[1] = ( nb_of_sig_words > 1 ) ? val_copy[1] : 0;
if( nb_of_sig_words > 2 )
{
val[2] = val_copy[2];
val[3] = val_copy[3];
}
else
{
val[2] = 0;
val[3] = 0;
}
return( D_RetCode_Sucsess );
}
BOOL CDDEServer::DoCallback(WORD wType,
WORD wFmt,
HCONV hConv,
HSZ hszTopic,
HSZ hszItem,
HDDEDATA hData,
HDDEDATA *phReturnData)
{
//
// See if we know the topic
//
CString strTopic = StringFromHsz(hszTopic);
//
// See if this is an execute request
//
if (wType == XTYP_EXECUTE) {
//
// Call the exec function to process it
//
Status(_T("Exec"));
DWORD dwLength = 0;
void* pData = ::DdeAccessData(hData, &dwLength);
BOOL b = Exec(strTopic, pData, dwLength);
::DdeUnaccessData(hData);
if (b) {
*phReturnData = (HDDEDATA) DDE_FACK;
return TRUE; // MH - Say we processed it
}
//
// Either no handler or it didn't get handled by the function
//
Status(_T("Exec failed"));
*phReturnData = (HDDEDATA) DDE_FNOTPROCESSED;
return FALSE;
}
//
// See if this is a connect request. Accept it if it is.
//
if (wType == XTYP_CONNECT) {
if (!FindTopic(strTopic)) return FALSE; // unknown topic
*phReturnData = (HDDEDATA) TRUE;
return TRUE;
}
//
// For any other transaction we need to be sure this is an
// item we support and in some cases, that the format requested
// is supported for that item.
//
CString strItem = StringFromHsz(hszItem);
//
// Now just do whatever is required for each specific transaction
//
BOOL b = FALSE;
DWORD dwLength = 0;
void* pData = NULL;
switch (wType) {
case XTYP_ADVSTART:
//
// Confirm that the supported topic/item pair is OK and
// that the format is supported
if (!CanAdvise(wFmt, strTopic, strItem)) {
Status(_T("Can't advise on %s|%s"), (const TCHAR*)strTopic, (const TCHAR*)strItem);
return FALSE;
}
//
// Start an advise request. Topic/item and format are ok.
//
*phReturnData = (HDDEDATA) TRUE;
break;
case XTYP_POKE:
//
// Some data for one of our items.
//
pData = ::DdeAccessData(hData, &dwLength);
b = Poke(wFmt, strTopic, strItem, pData, dwLength);
::DdeUnaccessData(hData);
if (!b) {
//
// Nobody took the data.
// Maybe its not a supported item or format
//
Status(_T("Poke %s|%s failed"), (const TCHAR*)strTopic, (const TCHAR*)strItem);
return FALSE;
}
//
// Data at the server has changed. See if we
// did this ourself (from a poke) or if it's from
// someone else. If it came from elsewhere then post
// an advise notice of the change.
//
CONVINFO ci;
ci.cb = sizeof(CONVINFO);
if (::DdeQueryConvInfo(hConv, (DWORD)QID_SYNC, &ci)) {
if (! (ci.wStatus & ST_ISSELF)) {
//
// It didn't come from us
//
::DdePostAdvise(m_dwDDEInstance,
hszTopic,
hszItem);
}
}
*phReturnData = (HDDEDATA) DDE_FACK; // say we took it
break;
case XTYP_ADVDATA:
//
// A server topic/item has changed value
//
pData = ::DdeAccessData(hData, &dwLength);
b = AdviseData(wFmt, hConv, strTopic, strItem, pData, dwLength);
::DdeUnaccessData(hData);
if (!b) {
//
// Nobody took the data.
// Maybe its not of interrest
//
Status(_T("AdviseData %s|%s failed"), (const TCHAR*)strTopic, (const TCHAR*)strItem);
*phReturnData = (HDDEDATA) DDE_FNOTPROCESSED;
} else {
*phReturnData = (HDDEDATA) DDE_FACK; // say we took it
}
break;
case XTYP_ADVREQ:
case XTYP_REQUEST:
//
// Attempt to start an advise or get the data on a topic/item
// See if we have a request function for this item or
// a generic one for the topic
//
{ // scope for locals.
CDDEAllocator allocr(m_dwDDEInstance, hszItem, wFmt, phReturnData);
Status(_T("Request %s|%s"), (const TCHAR*)strTopic, (const TCHAR*)strItem);
dwLength = 0;
if (!Request(wFmt, strTopic, strItem, allocr)) {
//
// Nobody accepted the request
// Maybe unsupported topic/item or bad format
//
Status(_T("Request %s|%s failed"), (LPCTSTR)strTopic, (LPCTSTR)strItem);
*phReturnData = NULL;
return FALSE;
}
} // end locals scope
// Data already setup via 'allocr' param, so we are done.
break;
default:
break;
}
//
// Say we processed the transaction in some way
//
return TRUE;
}
BOOL CDDETopic::Poke(const TCHAR* pszItem,
void* pData, DWORD dwSize)
{
return Poke(CF_TEXT, pszItem, pData, dwSize) ;
}
