/**
This routine is the chipset code that accepts a request to "open" a region of SMRAM.
The region could be legacy ABSEG, HSEG, or TSEG near top of physical memory.
The use of "open" means that the memory is visible from all boot-service
and SMM agents.
@retval FALSE Cannot open a locked SMRAM region
@retval TRUE Success to open SMRAM region.
**/
BOOLEAN
EFIAPI
QNCOpenSmramRegion (
VOID
)
{
UINT32 Smram;
// Read the SMRAM register
Smram = QncHsmmcRead ();
//
// Is the platform locked?
//
if (Smram & SMM_LOCKED) {
// Cannot Open a locked region
DEBUG ((EFI_D_WARN, "Cannot open a locked SMRAM region\n"));
return FALSE;
}
//
// Open all SMRAM regions for Host access only
//
Smram |= (SMM_WRITE_OPEN | SMM_READ_OPEN); // Open for Host.
Smram &= ~(NON_HOST_SMM_WR_OPEN | NON_HOST_SMM_RD_OPEN); // Not for others.
//
// Write the SMRAM register
//
QncHsmmcWrite (Smram);
return TRUE;
}
/**
This routine is the chipset code that accepts a request to "close" a region of SMRAM.
The region could be legacy AB or TSEG near top of physical memory.
The use of "close" means that the memory is only visible from SMM agents,
not from BS or RT code.
@retval FALSE Cannot open a locked SMRAM region
@retval TRUE Success to open SMRAM region.
**/
BOOLEAN
EFIAPI
QNCCloseSmramRegion (
VOID
)
{
UINT32 Smram;
// Read the SMRAM register.
Smram = QncHsmmcRead ();
//
// Is the platform locked?
//
if(Smram & SMM_LOCKED) {
// Cannot Open a locked region
DEBUG ((EFI_D_WARN, "Cannot close a locked SMRAM region\n"));
return FALSE;
}
Smram &= (~(SMM_WRITE_OPEN | SMM_READ_OPEN | NON_HOST_SMM_WR_OPEN | NON_HOST_SMM_RD_OPEN));
QncHsmmcWrite (Smram);
return TRUE;
}
/**
This routine is the chipset code that accepts a request to "lock" SMRAM.
The region could be legacy AB or TSEG near top of physical memory.
The use of "lock" means that the memory can no longer be opened
to BS state.
**/
VOID
EFIAPI
QNCLockSmramRegion (
VOID
)
{
UINT32 Smram;
// Read the SMRAM register.
Smram = QncHsmmcRead ();
if(Smram & SMM_LOCKED) {
DEBUG ((EFI_D_WARN, "SMRAM region already locked!\n"));
}
Smram |= SMM_LOCKED;
QncHsmmcWrite (Smram);
return;
}
/**
This function returns the memory ranges to be enabled, along with information
describing how the range should be used.
@param TimingData Detected DDR timing parameters for installed memory.
@param RowConfArray Pointer to an array of EFI_DUAL_CHANNEL_DDR_ROW_CONFIG structures. The number
of items in the array must match MaxRows returned by the McGetRowInfo() function.
@param MemoryMap Buffer to record details of the memory ranges tobe enabled.
@param NumRanges On input, this contains the maximum number of memory ranges that can be described
in the MemoryMap buffer.
@param RmuMainMemoryAddress Address of RMU binary in main memory
@return MemoryMap The buffer will be filled in
NumRanges will contain the actual number of memory ranges that are to be anabled.
EFI_SUCCESS The function completed successfully.
**/
EFI_STATUS
GetMemoryMap (
IN UINT32 TotalMemorySize,
IN OUT PEI_DUAL_CHANNEL_DDR_MEMORY_MAP_RANGE *MemoryMap,
IN OUT UINT8 *NumRanges,
IN OUT UINT32 *RmuMainMemoryAddress
)
{
EFI_PHYSICAL_ADDRESS MemoryAddress;
EFI_PHYSICAL_ADDRESS MemorySize;
UINT8 ExtendedMemoryIndex;
UINT32 Register;
UINT32 TsegSize;
if ((*NumRanges) < MAX_RANGES) {
return EFI_BUFFER_TOO_SMALL;
}
*NumRanges = 0;
//
// Generate Memory ranges for the memory map.
//
//
// Add memory below 640KB to the memory map. Make sure memory between
// 640KB and 1MB are reserved, even if not used for SMRAM
//
MemoryMap[*NumRanges].PhysicalAddress = 0;
MemoryMap[*NumRanges].CpuAddress = 0;
MemoryMap[*NumRanges].RangeLength = 0xA0000;
MemoryMap[*NumRanges].Type = DualChannelDdrMainMemory;
(*NumRanges)++;
//
// Just mark this range reserved
//
MemoryMap[*NumRanges].PhysicalAddress = 0xA0000;
MemoryMap[*NumRanges].CpuAddress = 0xA0000;
MemoryMap[*NumRanges].RangeLength = 0x60000;
MemoryMap[*NumRanges].Type = DualChannelDdrGraphicsReservedMemory;
(*NumRanges)++;
//
// Add remaining memory to the memory map
//
MemoryAddress = 0x100000;
MemorySize = TotalMemorySize - MemoryAddress;
MemoryMap[*NumRanges].PhysicalAddress = MemoryAddress;
MemoryMap[*NumRanges].CpuAddress = MemoryAddress;
MemoryMap[*NumRanges].RangeLength = MemorySize;
MemoryMap[*NumRanges].Type = DualChannelDdrMainMemory;
(*NumRanges)++;
MemoryAddress += MemorySize;
ExtendedMemoryIndex = (UINT8) (*NumRanges - 1);
// ------------------------ Top of physical memory
//
// -------------- TSEG + 1 page
// S3 Memory base structure
// -------------- RESERVED_ACPI_S3_RANGE_OFFSET
// CPU S3 data
// -------------- RESERVED_CPU_S3_SAVE_OFFSET
//
// ------------------------ TSEG Base
// Copy of RMU binary
// ------------------------ TOLUM: RmuBaseAddress
// BIOS reserved area
// ------------------------
// FSP reserved area
// ------------------------
// DRAM
// ------------------------ 0x00100000
// DRAM
// ------------------------ 0x000A0000
// DRAM
// ------------------------ 0
//
// See if we need to trim TSEG out of the highest memory range
//
TsegSize = GetSmmTsegSize();
Register = (UINT32)((MemoryAddress - 1) & SMM_END_MASK);
if (TsegSize > 0) {
MemoryMap[*NumRanges].RangeLength = (TsegSize * 1024 * 1024);
MemoryAddress -= MemoryMap[*NumRanges].RangeLength;
MemoryMap[*NumRanges].PhysicalAddress = MemoryAddress;
MemoryMap[*NumRanges].CpuAddress = MemoryAddress;
MemoryMap[ExtendedMemoryIndex].RangeLength -= MemoryMap[*NumRanges].RangeLength;
MemoryMap[*NumRanges].Type = DualChannelDdrSmramCacheable;
(*NumRanges)++;
}
//
// Set the TSEG base address
//
Register |= (UINT32)(((RShiftU64(MemoryAddress, 16)) & SMM_START_MASK)
| SMM_WRITE_OPEN | SMM_READ_OPEN | SMM_CODE_RD_OPEN);
QncHsmmcWrite (Register);
//
// Trim off 64K memory for RMU Main binary shadow
//
MemoryMap[*NumRanges].RangeLength = 0x10000;
ASSERT(MemoryMap[*NumRanges].RangeLength >= GetRmuLength());
MemoryAddress -= MemoryMap[*NumRanges].RangeLength;
MemoryMap[*NumRanges].PhysicalAddress = MemoryAddress;
MemoryMap[*NumRanges].CpuAddress = MemoryAddress;
MemoryMap[ExtendedMemoryIndex].RangeLength -= MemoryMap[*NumRanges].RangeLength;
MemoryMap[*NumRanges].Type = DualChannelDdrRmuReservedMemory;
(*NumRanges)++;
//
// Return the RMU base address
//
*RmuMainMemoryAddress = (UINT32)MemoryAddress;
//
// Trim off the BIOS reserved area
//
if (GetBootLoaderTolumSize() > 0) {
MemoryMap[*NumRanges].RangeLength = GetBootLoaderTolumSize();
MemoryAddress -= MemoryMap[*NumRanges].RangeLength;
MemoryMap[*NumRanges].PhysicalAddress = MemoryAddress;
MemoryMap[*NumRanges].CpuAddress = MemoryAddress;
MemoryMap[ExtendedMemoryIndex].RangeLength -= MemoryMap[*NumRanges].RangeLength;
MemoryMap[*NumRanges].Type = DualChannelDdrBiosReservedMemory;
(*NumRanges)++;
}
//
// Trim off the FSP reserved area
//
MemoryMap[*NumRanges].RangeLength = GetFspReservedMemorySize();
MemoryAddress -= MemoryMap[*NumRanges].RangeLength;
MemoryMap[*NumRanges].PhysicalAddress = MemoryAddress;
MemoryMap[*NumRanges].CpuAddress = MemoryAddress;
MemoryMap[ExtendedMemoryIndex].RangeLength -= MemoryMap[*NumRanges].RangeLength;
MemoryMap[*NumRanges].Type = DualChannelDdrFspReservedMemory;
(*NumRanges)++;
//
// Display the memory segments
//
DEBUG_CODE_BEGIN();
{
UINT32 Index;
MemoryAddress = TotalMemorySize;
DEBUG ((EFI_D_ERROR, "+------------------------- 0x%08x: Top of physical memory\n", MemoryAddress));
Index = *NumRanges - 1;
// Display SMM area if enabled
Index = ExtendedMemoryIndex + 1;
if (TsegSize > 0) {
MemoryAddress -= MemoryMap[Index].RangeLength;
ASSERT(MemoryAddress == MemoryMap[Index].PhysicalAddress);
DEBUG ((EFI_D_ERROR, "|\n"));
DEBUG ((EFI_D_ERROR, "| -------------- 0x%08x: TSEG + 1 page\n", MemoryAddress + EFI_PAGE_SIZE));
DEBUG ((EFI_D_ERROR, "| S3 Memory base structure\n"));
DEBUG ((EFI_D_ERROR, "| -------------- 0x%08x: RESERVED_ACPI_S3_RANGE_OFFSET\n", MemoryAddress + RESERVED_ACPI_S3_RANGE_OFFSET));
DEBUG ((EFI_D_ERROR, "| CPU S3 data\n"));
DEBUG ((EFI_D_ERROR, "| -------------- 0x%08x: RESERVED_CPU_S3_SAVE_OFFSET\n", MemoryAddress + RESERVED_CPU_S3_SAVE_OFFSET));
DEBUG ((EFI_D_ERROR, "|\n"));
DEBUG ((EFI_D_ERROR, "+------------------------- 0x%08x: TSEG Base\n", MemoryAddress));
Index++;
}
// Display RMU area
MemoryAddress -= MemoryMap[Index].RangeLength;
ASSERT(MemoryAddress == MemoryMap[Index].PhysicalAddress);
DEBUG ((EFI_D_ERROR, "| Copy of RMU binary\n"));
DEBUG ((EFI_D_ERROR, "+------------------------- 0x%08x: RmuBaseAddress (TOLUM)\n", MemoryAddress));
Index++;
// Display BIOS reserved area if requested
if (GetBootLoaderTolumSize() > 0) {
MemoryAddress -= MemoryMap[Index].RangeLength;
ASSERT(MemoryAddress == MemoryMap[Index].PhysicalAddress);
DEBUG ((EFI_D_ERROR, "| BIOS reserved area\n"));
DEBUG ((EFI_D_ERROR, "+------------------------- 0x%08x\n", MemoryAddress));
Index++;
}
// Display FSP reserved area
MemoryAddress -= MemoryMap[Index].RangeLength;
ASSERT(MemoryAddress == MemoryMap[Index].PhysicalAddress);
DEBUG ((EFI_D_ERROR, "| FSP reserved area\n"));
DEBUG ((EFI_D_ERROR, "+------------------------- 0x%08x\n", MemoryAddress));
// Display DRAM areas
Index = ExtendedMemoryIndex;
do {
MemoryAddress -= MemoryMap[Index].RangeLength;
ASSERT(MemoryAddress == MemoryMap[Index].PhysicalAddress);
DEBUG ((EFI_D_ERROR, "| DRAM\n"));
DEBUG ((EFI_D_ERROR, "+------------------------- 0x%08x\n", MemoryAddress));
} while (Index-- != 0);
}
DEBUG_CODE_END ();
return EFI_SUCCESS;
}
