コード例 #1
0
void r300SetupVertexProgram(r300ContextPtr rmesa)
{
	GLcontext *ctx = rmesa->radeon.glCtx;
	struct r300_vertex_program *prog = rmesa->selected_vp;
	int inst_count = 0;
	int param_count = 0;

	/* Reset state, in case we don't use something */
	((drm_r300_cmd_header_t *) rmesa->hw.vpp.cmd)->vpu.count = 0;
	((drm_r300_cmd_header_t *) rmesa->hw.vpi.cmd)->vpu.count = 0;
	((drm_r300_cmd_header_t *) rmesa->hw.vps.cmd)->vpu.count = 0;

	R300_STATECHANGE(rmesa, vap_flush);
	R300_STATECHANGE(rmesa, vpp);
	param_count = r300VertexProgUpdateParams(ctx, prog, (float *)&rmesa->hw.vpp.cmd[R300_VPP_PARAM_0]);
	bump_vpu_count(rmesa->hw.vpp.cmd, param_count);
	param_count /= 4;

	r300EmitVertexProgram(rmesa, R300_PVS_CODE_START, &(prog->code));
	inst_count = (prog->code.length / 4) - 1;

	r300VapCntl(rmesa, _mesa_bitcount(prog->code.InputsRead),
				 _mesa_bitcount(prog->code.OutputsWritten), prog->code.num_temporaries);

	R300_STATECHANGE(rmesa, pvs);
	rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] = (0 << R300_PVS_FIRST_INST_SHIFT) | (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
				(inst_count << R300_PVS_LAST_INST_SHIFT);

	rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] = (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) | (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
	rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] = (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
}
コード例 #2
0
static void r300EmitVertexProgram(r300ContextPtr r300, int dest, struct r300_vertex_program_code *code)
{
	int i;

	assert((code->length > 0) && (code->length % 4 == 0));

	R300_STATECHANGE( r300, vap_flush );

	switch ((dest >> 8) & 0xf) {
		case 0:
			R300_STATECHANGE(r300, vpi);
			for (i = 0; i < code->length; i++)
				r300->hw.vpi.cmd[R300_VPI_INSTR_0 + i + 4 * (dest & 0xff)] = (code->body.d[i]);
			bump_vpu_count(r300->hw.vpi.cmd, code->length + 4 * (dest & 0xff));
			break;
		case 2:
			R300_STATECHANGE(r300, vpp);
			for (i = 0; i < code->length; i++)
				r300->hw.vpp.cmd[R300_VPP_PARAM_0 + i + 4 * (dest & 0xff)] = (code->body.d[i]);
			bump_vpu_count(r300->hw.vpp.cmd, code->length + 4 * (dest & 0xff));
			break;
		case 4:
			R300_STATECHANGE(r300, vps);
			for (i = 0; i < code->length; i++)
				r300->hw.vps.cmd[1 + i + 4 * (dest & 0xff)] = (code->body.d[i]);
			bump_vpu_count(r300->hw.vps.cmd, code->length + 4 * (dest & 0xff));
			break;
		default:
			fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
			_mesa_exit(-1);
	}
}
コード例 #3
0
ファイル: r300_tex.c プロジェクト: Magister/x11rdp_xorg71
static void r300TexEnv(GLcontext * ctx, GLenum target,
		       GLenum pname, const GLfloat * param)
{
	if (RADEON_DEBUG & DEBUG_STATE) {
		fprintf(stderr, "%s( %s )\n",
			__FUNCTION__, _mesa_lookup_enum_by_nr(pname));
	}

	/* This is incorrect: Need to maintain this data for each of
	 * GL_TEXTURE_{123}D, GL_TEXTURE_RECTANGLE_NV, etc, and switch
	 * between them according to _ReallyEnabled.
	 */
	switch (pname) {
	case GL_TEXTURE_LOD_BIAS_EXT:{
#if 0 /* Needs to be relocated in order to make sure we got the right tmu */
			GLfloat bias, min;
			GLuint b;

			/* The R300's LOD bias is a signed 2's complement value with a
			 * range of -16.0 <= bias < 16.0.
			 *
			 * NOTE: Add a small bias to the bias for conform mipsel.c test.
			 */
			bias = *param + .01;
			min =
			    driQueryOptionb(&rmesa->radeon.optionCache,
					    "no_neg_lod_bias") ? 0.0 : -16.0;
			bias = CLAMP(bias, min, 16.0);

			/* 0.0 - 16.0 == 0x0 - 0x1000 */
			/* 0.0 - -16.0 == 0x1001 - 0x1fff */
			b = 0x1000 / 16.0 * bias;
			b &= R300_LOD_BIAS_MASK;

			if(b != (rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+unit] & R300_LOD_BIAS_MASK)){
				R300_STATECHANGE(rmesa, tex.unknown1);
				rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+unit] &= ~R300_LOD_BIAS_MASK;
				rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+unit] |= b;
			}
#endif
			break;
		}

	default:
		return;
	}
}
コード例 #4
0
ファイル: r300_render.c プロジェクト: Magister/x11rdp_xorg71
GLboolean r300_run_vb_render(GLcontext *ctx,
				 struct tnl_pipeline_stage *stage)
{
	r300ContextPtr rmesa = R300_CONTEXT(ctx);
	struct radeon_vertex_buffer *VB = &rmesa->state.VB;
	int i;
	LOCAL_VARS
   
	if (RADEON_DEBUG & DEBUG_PRIMS)
		fprintf(stderr, "%s\n", __FUNCTION__);

	if (stage) {
 		TNLcontext *tnl = TNL_CONTEXT(ctx);
		radeon_vb_to_rvb(rmesa, VB, &tnl->vb);
	}
	
	r300UpdateShaders(rmesa);
	if (rmesa->state.VB.LockCount == 0 || 1) {
 	  	r300ReleaseArrays(ctx);
		r300EmitArrays(ctx, GL_FALSE);

		r300UpdateShaderStates(rmesa);
	} else {
		/* TODO: Figure out why do we need these. */
		R300_STATECHANGE(rmesa, vir[0]);
		R300_STATECHANGE(rmesa, vir[1]);
		R300_STATECHANGE(rmesa, vic);
		R300_STATECHANGE(rmesa, vof);
		
#if 0		
		fprintf(stderr, "dt:\n");
		for(i=0; i < VERT_ATTRIB_MAX; i++){
			fprintf(stderr, "dt %d:", i);
			dump_dt(&rmesa->state.VB.AttribPtr[i], VB->Count);
		}
		
		fprintf(stderr, "before:\n");
		for(i=0; i < rmesa->state.aos_count; i++){
			fprintf(stderr, "aos %d:", i);
			dump_array(&rmesa->state.aos[i], VB->Count);
		}
#endif
#if 0
 	  	r300ReleaseArrays(ctx);
		r300EmitArrays(ctx, GL_FALSE);
			
		fprintf(stderr, "after:\n");
		for(i=0; i < rmesa->state.aos_count; i++){
			fprintf(stderr, "aos %d:", i);
			dump_array(&rmesa->state.aos[i], VB->Count);
		}
#endif
	}
	
	reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0);
	e32(0x0000000a);

	reg_start(0x4f18,0);
	e32(0x00000003);
#if 0
	reg_start(R300_VAP_PVS_WAITIDLE,0);
		e32(0x00000000);
#endif
	r300EmitState(rmesa);
	
	for(i=0; i < VB->PrimitiveCount; i++){
		GLuint prim = VB->Primitive[i].mode;
		GLuint start = VB->Primitive[i].start;
		GLuint length = VB->Primitive[i].count;
		
		r300_render_vb_primitive(rmesa, ctx, start, start + length, prim);
	}

	reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0);
	e32(0x0000000a/*0x2*/);

	reg_start(0x4f18,0);
	e32(0x00000003/*0x1*/);

#ifdef USER_BUFFERS
	r300UseArrays(ctx);
#endif
	return GL_FALSE;
}