void z80dma_device::write(UINT8 data)
{
if (LOG) logerror("Z80DMA '%s' Write %02x\n", tag(), data);
if (m_num_follow == 0)
{
m_reset_pointer = 0;
if ((data & 0x87) == 0) // WR2
{
WR2 = data;
if (data & 0x40)
m_regs_follow[m_num_follow++] = GET_REGNUM(PORTB_TIMING);
}
else if ((data & 0x87) == 0x04) // WR1
{
WR1 = data;
if (data & 0x40)
m_regs_follow[m_num_follow++] = GET_REGNUM(PORTA_TIMING);
}
else if ((data & 0x80) == 0) // WR0
{
WR0 = data;
if (data & 0x08)
m_regs_follow[m_num_follow++] = GET_REGNUM(PORTA_ADDRESS_L);
if (data & 0x10)
m_regs_follow[m_num_follow++] = GET_REGNUM(PORTA_ADDRESS_H);
if (data & 0x20)
m_regs_follow[m_num_follow++] = GET_REGNUM(BLOCKLEN_L);
if (data & 0x40)
m_regs_follow[m_num_follow++] = GET_REGNUM(BLOCKLEN_H);
}
else if ((data & 0x83) == 0x80) // WR3
{
WR3 = data;
if (data & 0x08)
m_regs_follow[m_num_follow++] = GET_REGNUM(MASK_BYTE);
if (data & 0x10)
m_regs_follow[m_num_follow++] = GET_REGNUM(MATCH_BYTE);
}
else if ((data & 0x83) == 0x81) // WR4
{
WR4 = data;
if (data & 0x04)
m_regs_follow[m_num_follow++] = GET_REGNUM(PORTB_ADDRESS_L);
if (data & 0x08)
m_regs_follow[m_num_follow++] = GET_REGNUM(PORTB_ADDRESS_H);
if (data & 0x10)
m_regs_follow[m_num_follow++] = GET_REGNUM(INTERRUPT_CTRL);
}
else if ((data & 0xC7) == 0x82) // WR5
{
WR5 = data;
}
else if ((data & 0x83) == 0x83) // WR6
{
m_dma_enabled = 0;
WR6 = data;
switch (data)
{
case COMMAND_ENABLE_AFTER_RETI:
fatalerror("Z80DMA '%s' Unimplemented WR6 command %02x", tag(), data);
break;
case COMMAND_READ_STATUS_BYTE:
if (LOG) logerror("Z80DMA '%s' CMD Read status Byte\n", tag());
READ_MASK = 0;
break;
case COMMAND_RESET_AND_DISABLE_INTERRUPTS:
WR3 &= ~0x20;
m_ip = 0;
m_ius = 0;
m_force_ready = 0;
m_status |= 0x08;
break;
case COMMAND_INITIATE_READ_SEQUENCE:
if (LOG) logerror("Z80DMA '%s' Initiate Read Sequence\n", tag());
m_read_cur_follow = m_read_num_follow = 0;
if(READ_MASK & 0x01) { m_read_regs_follow[m_read_num_follow++] = m_status; }
if(READ_MASK & 0x02) { m_read_regs_follow[m_read_num_follow++] = BLOCKLEN_L; } //byte counter (low)
if(READ_MASK & 0x04) { m_read_regs_follow[m_read_num_follow++] = BLOCKLEN_H; } //byte counter (high)
if(READ_MASK & 0x08) { m_read_regs_follow[m_read_num_follow++] = PORTA_ADDRESS_L; } //port A address (low)
if(READ_MASK & 0x10) { m_read_regs_follow[m_read_num_follow++] = PORTA_ADDRESS_H; } //port A address (high)
if(READ_MASK & 0x20) { m_read_regs_follow[m_read_num_follow++] = PORTB_ADDRESS_L; } //port B address (low)
if(READ_MASK & 0x40) { m_read_regs_follow[m_read_num_follow++] = PORTB_ADDRESS_H; } //port B address (high)
break;
case COMMAND_RESET:
if (LOG) logerror("Z80DMA '%s' Reset\n", tag());
m_dma_enabled = 0;
m_force_ready = 0;
m_ip = 0;
m_ius = 0;
interrupt_check();
// Needs six reset commands to reset the DMA
{
UINT8 WRi;
for(WRi=0;WRi<7;WRi++)
REG(WRi,m_reset_pointer) = 0;
m_reset_pointer++;
if(m_reset_pointer >= 6) { m_reset_pointer = 0; }
}
m_status = 0x38;
break;
case COMMAND_LOAD:
m_force_ready = 0;
m_addressA = PORTA_ADDRESS;
m_addressB = PORTB_ADDRESS;
m_count = BLOCKLEN;
m_status |= 0x30;
if (LOG) logerror("Z80DMA '%s' Load A: %x B: %x N: %x\n", tag(), m_addressA, m_addressB, m_count);
break;
case COMMAND_DISABLE_DMA:
if (LOG) logerror("Z80DMA '%s' Disable DMA\n", tag());
m_dma_enabled = 0;
break;
case COMMAND_ENABLE_DMA:
if (LOG) logerror("Z80DMA '%s' Enable DMA\n", tag());
m_dma_enabled = 1;
update_status();
break;
case COMMAND_READ_MASK_FOLLOWS:
if (LOG) logerror("Z80DMA '%s' Set Read Mask\n", tag());
m_regs_follow[m_num_follow++] = GET_REGNUM(READ_MASK);
break;
case COMMAND_CONTINUE:
if (LOG) logerror("Z80DMA '%s' Continue\n", tag());
m_count = BLOCKLEN;
m_dma_enabled = 1;
//"match not found" & "end of block" status flags zeroed here
m_status |= 0x30;
break;
case COMMAND_RESET_PORT_A_TIMING:
if (LOG) logerror("Z80DMA '%s' Reset Port A Timing\n", tag());
PORTA_TIMING = 0;
break;
case COMMAND_RESET_PORT_B_TIMING:
if (LOG) logerror("Z80DMA '%s' Reset Port B Timing\n", tag());
PORTB_TIMING = 0;
break;
case COMMAND_FORCE_READY:
if (LOG) logerror("Z80DMA '%s' Force Ready\n", tag());
m_force_ready = 1;
update_status();
break;
case COMMAND_ENABLE_INTERRUPTS:
if (LOG) logerror("Z80DMA '%s' Enable IRQ\n", tag());
WR3 |= 0x20;
break;
case COMMAND_DISABLE_INTERRUPTS:
if (LOG) logerror("Z80DMA '%s' Disable IRQ\n", tag());
WR3 &= ~0x20;
break;
case COMMAND_REINITIALIZE_STATUS_BYTE:
if (LOG) logerror("Z80DMA '%s' Reinitialize status byte\n", tag());
m_status |= 0x30;
m_ip = 0;
break;
case 0xFB:
if (LOG) logerror("Z80DMA '%s' undocumented command triggered 0x%02X!\n", tag(), data);
break;
default:
fatalerror("Z80DMA '%s' Unknown WR6 command %02x", tag(), data);
}
}
else
fatalerror("Z80DMA '%s' Unknown base register %02x", tag(), data);
m_cur_follow = 0;
}
else
{
int nreg = m_regs_follow[m_cur_follow];
m_regs[nreg] = data;
m_cur_follow++;
if (m_cur_follow>=m_num_follow)
m_num_follow = 0;
if (nreg == REGNUM(4,3))
{
m_num_follow=0;
if (data & 0x08)
m_regs_follow[m_num_follow++] = GET_REGNUM(PULSE_CTRL);
if (data & 0x10)
m_regs_follow[m_num_follow++] = GET_REGNUM(INTERRUPT_VECTOR);
m_cur_follow = 0;
}
m_reset_pointer++;
if(m_reset_pointer >= 6) { m_reset_pointer = 0; }
}
}
TR::Instruction *OMR::Power::Linkage::saveArguments(TR::Instruction *cursor, bool fsd, bool saveOnly,
List<TR::ParameterSymbol> &parmList)
{
#define REAL_REGISTER(ri) machine->getRealRegister(ri)
#define REGNUM(ri) ((TR::RealRegister::RegNum)(ri))
const TR::PPCLinkageProperties& properties = self()->getProperties();
TR::Machine *machine = self()->machine();
TR::RealRegister *stackPtr = self()->cg()->getStackPointerRegister();
TR::ResolvedMethodSymbol *bodySymbol = self()->comp()->getJittedMethodSymbol();
ListIterator<TR::ParameterSymbol> paramIterator(&parmList);
TR::ParameterSymbol *paramCursor;
TR::Node *firstNode = self()->comp()->getStartTree()->getNode();
TR_BitVector freeScratchable;
int32_t busyMoves[3][64];
int32_t busyIndex = 0, i1;
bool all_saved = false;
// the freeScratchable structure will not be used when saveOnly == true
// no additional conditions were added with the intention of keeping the code easier to read
// and not full of if conditions
freeScratchable.init(TR::RealRegister::LastFPR + 1, self()->trMemory());
// first, consider all argument registers free
for (i1=TR::RealRegister::FirstGPR; i1<=TR::RealRegister::LastFPR; i1++)
{
if (!properties.getReserved(REGNUM(i1)))
{
freeScratchable.set(i1);
}
}
// second, go through all parameters and reset registers that are actually used
for (paramCursor=paramIterator.getFirst(); paramCursor!=NULL; paramCursor=paramIterator.getNext())
{
int32_t lri = paramCursor->getLinkageRegisterIndex();
TR::DataType type = paramCursor->getType();
if (lri >= 0)
{
TR::RealRegister::RegNum regNum;
bool twoRegs = (TR::Compiler->target.is32Bit() && type.isInt64() && lri < properties.getNumIntArgRegs()-1);
if (!type.isFloatingPoint())
{
regNum = properties.getIntegerArgumentRegister(lri);
if (paramCursor->isReferencedParameter()) freeScratchable.reset(regNum);
if (twoRegs)
if (paramCursor->isReferencedParameter()) freeScratchable.reset(regNum+1);
}
else
{
regNum = properties.getFloatArgumentRegister(lri);
if (paramCursor->isReferencedParameter()) freeScratchable.reset(regNum);
if (twoRegs)
if (paramCursor->isReferencedParameter()) freeScratchable.reset(regNum+1);
}
}
}
for (paramCursor=paramIterator.getFirst(); paramCursor!=NULL; paramCursor=paramIterator.getNext())
{
int32_t lri = paramCursor->getLinkageRegisterIndex();
int32_t ai = paramCursor->getAllocatedIndex();
int32_t offset = self()->calculateParameterRegisterOffset(paramCursor->getParameterOffset(), *paramCursor);
TR::DataType type = paramCursor->getType();
int32_t dtype = type.getDataType();
// TODO: Is there an accurate assume to insert here ?
if (lri >= 0)
{
if (!paramCursor->isReferencedParameter() && !paramCursor->isParmHasToBeOnStack()) continue;
TR::RealRegister::RegNum regNum;
bool twoRegs = (TR::Compiler->target.is32Bit() && type.isInt64() && lri < properties.getNumIntArgRegs()-1);
if (type.isFloatingPoint())
regNum = properties.getFloatArgumentRegister(lri);
else
regNum = properties.getIntegerArgumentRegister(lri);
// Do not save arguments to the stack if in Full Speed Debug and saveOnly is not set.
// If not in Full Speed Debug, the arguments will be saved.
if (((ai<0 || self()->hasToBeOnStack(paramCursor)) && !fsd) || (fsd && saveOnly))
{
switch (dtype)
{
case TR::Int8:
case TR::Int16:
case TR::Int32:
{
TR::InstOpCode::Mnemonic op = TR::InstOpCode::stw;
if (!all_saved) cursor = generateMemSrc1Instruction(self()->cg(), op, firstNode,
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, 4, self()->cg()), REAL_REGISTER(regNum), cursor);
}
break;
case TR::Address:
if (!all_saved) cursor = generateMemSrc1Instruction(self()->cg(),TR::InstOpCode::Op_st, firstNode,
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, TR::Compiler->om.sizeofReferenceAddress(), self()->cg()), REAL_REGISTER(regNum), cursor);
break;
case TR::Int64:
if (!all_saved) cursor = generateMemSrc1Instruction(self()->cg(),TR::InstOpCode::Op_st, firstNode,
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, TR::Compiler->om.sizeofReferenceAddress(), self()->cg()), REAL_REGISTER(regNum), cursor);
if (twoRegs)
{
if (!all_saved) cursor = generateMemSrc1Instruction(self()->cg(), TR::InstOpCode::stw, firstNode,
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset+4, 4, self()->cg()),
REAL_REGISTER(REGNUM(regNum+1)), cursor);
if (ai<0)
freeScratchable.set(regNum+1);
}
break;
case TR::Float:
cursor = generateMemSrc1Instruction(self()->cg(), TR::InstOpCode::stfs, firstNode,
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, 4, self()->cg()),
REAL_REGISTER(regNum), cursor);
break;
case TR::Double:
cursor = generateMemSrc1Instruction(self()->cg(), TR::InstOpCode::stfd, firstNode,
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, 8, self()->cg()),
REAL_REGISTER(regNum), cursor);
break;
default:
TR_ASSERT(false, "assertion failure");
break;
}
if (ai<0)
freeScratchable.set(regNum);
}
// Global register is allocated to this argument.
// Don't process if in Full Speed Debug and saveOnly is set
if (ai>=0 && (!fsd || !saveOnly))
{
if (regNum != ai) // Equal assignment: do nothing
{
if (freeScratchable.isSet(ai))
{
cursor = generateTrg1Src1Instruction(self()->cg(),
(type.isFloatingPoint()) ? TR::InstOpCode::fmr:TR::InstOpCode::mr,
firstNode, REAL_REGISTER(REGNUM(ai)), REAL_REGISTER(regNum), cursor);
freeScratchable.reset(ai);
freeScratchable.set(regNum);
}
else // The status of target global register is unclear (i.e. it is a arg reg)
{
busyMoves[0][busyIndex] = regNum;
busyMoves[1][busyIndex] = ai;
busyMoves[2][busyIndex] = 0;
busyIndex++;
}
}
if (TR::Compiler->target.is32Bit() && type.isInt64())
{
int32_t aiLow = paramCursor->getAllocatedLow();
if (!twoRegs) // Low part needs to come from memory
{
offset += 4; // We are dealing with the low part
if (freeScratchable.isSet(aiLow))
{
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::lwz, firstNode, REAL_REGISTER(REGNUM(aiLow)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, 4, self()->cg()), cursor);
freeScratchable.reset(aiLow);
}
else
{
busyMoves[0][busyIndex] = offset;
busyMoves[1][busyIndex] = aiLow;
busyMoves[2][busyIndex] = 1;
busyIndex++;
}
}
else if (regNum+1 != aiLow) // Low part needs to be moved
{
if (freeScratchable.isSet(aiLow))
{
cursor = generateTrg1Src1Instruction(self()->cg(), TR::InstOpCode::mr,
firstNode, REAL_REGISTER(REGNUM(aiLow)),
REAL_REGISTER(REGNUM(regNum+1)), cursor);
freeScratchable.reset(aiLow);
freeScratchable.set(regNum+1);
}
else
{
busyMoves[0][busyIndex] = regNum+1;
busyMoves[1][busyIndex] = aiLow;
busyMoves[2][busyIndex] = 0;
busyIndex++;
}
}
}
}
}
// Don't process if in Full Speed Debug and saveOnly is set
else if (ai >= 0 && (!fsd || !saveOnly)) // lri<0: arg needs to come from memory
{
switch (dtype)
{
case TR::Int8:
case TR::Int16:
case TR::Int32:
if (freeScratchable.isSet(ai))
{
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::lwz, firstNode, REAL_REGISTER(REGNUM(ai)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, 4, self()->cg()), cursor);
freeScratchable.reset(ai);
}
else
{
busyMoves[0][busyIndex] = offset;
busyMoves[1][busyIndex] = ai;
busyMoves[2][busyIndex] = 1;
busyIndex++;
}
break;
case TR::Address:
if (freeScratchable.isSet(ai))
{
cursor = generateTrg1MemInstruction(self()->cg(),TR::InstOpCode::Op_load, firstNode, REAL_REGISTER(REGNUM(ai)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, TR::Compiler->om.sizeofReferenceAddress(), self()->cg()), cursor);
freeScratchable.reset(ai);
}
else
{
busyMoves[0][busyIndex] = offset;
busyMoves[1][busyIndex] = ai;
if (TR::Compiler->target.is64Bit())
busyMoves[2][busyIndex] = 2;
else
busyMoves[2][busyIndex] = 1;
busyIndex++;
}
break;
case TR::Int64:
if (TR::Compiler->target.is64Bit())
{
if (freeScratchable.isSet(ai))
{
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::ld, firstNode, REAL_REGISTER(REGNUM(ai)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, 8, self()->cg()), cursor);
freeScratchable.reset(ai);
}
else
{
busyMoves[0][busyIndex] = offset;
busyMoves[1][busyIndex] = ai;
busyMoves[2][busyIndex] = 2;
busyIndex++;
}
}
else // 32-bit
{
if (freeScratchable.isSet(ai))
{
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::lwz, firstNode, REAL_REGISTER(REGNUM(ai)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, 4, self()->cg()), cursor);
freeScratchable.reset(ai);
}
else
{
busyMoves[0][busyIndex] = offset;
busyMoves[1][busyIndex] = ai;
busyMoves[2][busyIndex] = 1;
busyIndex++;
}
ai = paramCursor->getAllocatedLow();
if (freeScratchable.isSet(ai))
{
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::lwz, firstNode, REAL_REGISTER(REGNUM(ai)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset+4, 4, self()->cg()), cursor);
freeScratchable.reset(ai);
}
else
{
busyMoves[0][busyIndex] = offset+4;
busyMoves[1][busyIndex] = ai;
busyMoves[2][busyIndex] = 1;
busyIndex++;
}
}
break;
case TR::Float:
if (freeScratchable.isSet(ai))
{
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::lfs, firstNode, REAL_REGISTER(REGNUM(ai)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, 4, self()->cg()), cursor);
freeScratchable.reset(ai);
}
else
{
busyMoves[0][busyIndex] = offset;
busyMoves[1][busyIndex] = ai;
busyMoves[2][busyIndex] = 3;
busyIndex++;
}
break;
case TR::Double:
if (freeScratchable.isSet(ai))
{
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::lfd, firstNode, REAL_REGISTER(REGNUM(ai)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, offset, 8, self()->cg()), cursor);
freeScratchable.reset(ai);
}
else
{
busyMoves[0][busyIndex] = offset;
busyMoves[1][busyIndex] = ai;
busyMoves[2][busyIndex] = 4;
busyIndex++;
}
break;
default:
break;
}
}
}
if (!fsd || !saveOnly)
{
bool freeMore = true;
int32_t numMoves = busyIndex;
while (freeMore && numMoves>0)
{
freeMore = false;
for (i1=0; i1<busyIndex; i1++)
{
int32_t source = busyMoves[0][i1];
int32_t target = busyMoves[1][i1];
if (!(target<0) && freeScratchable.isSet(target))
{
switch(busyMoves[2][i1])
{
case 0:
cursor = generateTrg1Src1Instruction(self()->cg(), (source<=TR::RealRegister::LastGPR)?TR::InstOpCode::mr:TR::InstOpCode::fmr,
firstNode, REAL_REGISTER(REGNUM(target)), REAL_REGISTER(REGNUM(source)), cursor);
freeScratchable.set(source);
break;
case 1:
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::lwz, firstNode, REAL_REGISTER(REGNUM(target)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, source, 4, self()->cg()), cursor);
break;
case 2:
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::ld, firstNode, REAL_REGISTER(REGNUM(target)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, source, 8, self()->cg()), cursor);
break;
case 3:
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::lfs, firstNode, REAL_REGISTER(REGNUM(target)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, source, 4, self()->cg()), cursor);
break;
case 4:
cursor = generateTrg1MemInstruction(self()->cg(), TR::InstOpCode::lfd, firstNode, REAL_REGISTER(REGNUM(target)),
new (self()->trHeapMemory()) TR::MemoryReference(stackPtr, source, 8, self()->cg()), cursor);
break;
}
freeScratchable.reset(target);
freeMore = true;
busyMoves[0][i1] = busyMoves[1][i1] = -1;
numMoves--;
}
}
}
TR_ASSERT(numMoves<=0, "Circular argument register dependency can and should be avoided.");
}
return(cursor);
}
