コード例 #1
0
ファイル: k3g.c プロジェクト: AdiPat/i9003_Kernel
/* set k3g digital gyroscope bandwidth */
static int k3g_set_bandwidth(char bw)
{
    int res = -EIO;
    
    dprintk("bandwidth = %d\n", bw);

    k3g_dev->reg[REG_INDEX(CTRL_REG1)] &= ~ODR_BW_REG_MASK;
    k3g_dev->reg[REG_INDEX(CTRL_REG1)] |= bw;
    
    res = k3g_i2c_write(CTRL_REG1, &k3g_dev->reg[REG_INDEX(CTRL_REG1)], 1);
    
    return res;
}
コード例 #2
0
Result_t Handle_CAPI2_SYSRPC_PMU_IsSIMReady(RPC_Msg_t *pReqMsg,
					    PMU_SIMLDO_t simldo)
{
	Result_t result = RESULT_OK;
	SYS_ReqRep_t data;
	int ret = 0;
	RegulatorInfo_t *curReg = &gRegulatorList[REG_INDEX(simldo)];

	if (!IS_ERR(curReg->handle)) {
		ret = regulator_is_enabled(curReg->handle);
		KRIL_DEBUG(DBG_INFO,
			   "  Handle_CAPI2_PMU_IsSIMReady ldo=%d handle=%p ret=%d\n\n",
			   (int)simldo, curReg->handle, (int)ret);
	} else
		KRIL_DEBUG(DBG_INFO,
			   " regulator_is_enabled Invalid Handle  %d\n",
			   (int)IS_ERR(curReg->handle));

	memset(&data, 0, sizeof(SYS_ReqRep_t));
	data.req_rep_u.CAPI2_SYSRPC_PMU_IsSIMReady_Rsp.val = curReg->isSimInit;	/*(Boolean)(regulator_is_enabled > 0); */
	data.result = result;
	Send_SYS_RspForRequest(pReqMsg, MSG_PMU_IS_SIM_READY_RSP, &data);

	KRIL_DEBUG(DBG_INFO, " Handle_CAPI2_PMU_IsSIMReady DONE active=%d\n",
		   (int)curReg->isSimInit);
	return result;
}
コード例 #3
0
void SysRpc_OpenRegulator(PMU_SIMLDO_t ldo)
{
	RegulatorInfo_t *curReg = &gRegulatorList[REG_INDEX(ldo)];

	curReg->handle = regulator_get(NULL, curReg->devName);
	if (IS_ERR(curReg->handle)) {
		KRIL_DEBUG(DBG_ERROR, " **regulator_get (dev=%s) FAILED h=%p\n",
			   curReg->devName, curReg->handle);
	} else {
		KRIL_DEBUG(DBG_INFO,
			   " **regulator_get (dev=%s) PASS handle=%p\n",
			   curReg->devName, curReg->handle);
	}
}
コード例 #4
0
JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0
  (JNIEnv *env, jobject this_obj, jint lwp_id) {

  struct user_regs_struct gregs;
  jboolean isCopy;
  jlongArray array;
  jlong *regs;
  int i;

  struct ps_prochandle* ph = get_proc_handle(env, this_obj);
  if (get_lwp_regs(ph, lwp_id, &gregs) != true) {
     THROW_NEW_DEBUGGER_EXCEPTION_("get_thread_regs failed for a lwp", 0);
  }

#undef NPRGREG
#ifdef i386
#define NPRGREG sun_jvm_hotspot_debugger_x86_X86ThreadContext_NPRGREG
#endif
#ifdef ia64
#define NPRGREG IA64_REG_COUNT
#endif
#ifdef amd64
#define NPRGREG sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_NPRGREG
#endif
#if defined(sparc) || defined(sparcv9)
#define NPRGREG sun_jvm_hotspot_debugger_sparc_SPARCThreadContext_NPRGREG
#endif

  array = (*env)->NewLongArray(env, NPRGREG);
  CHECK_EXCEPTION_(0);
  regs = (*env)->GetLongArrayElements(env, array, &isCopy);

#undef REG_INDEX

#ifdef i386
#define REG_INDEX(reg) sun_jvm_hotspot_debugger_x86_X86ThreadContext_##reg

  regs[REG_INDEX(GS)]  = (uintptr_t) gregs.xgs;
  regs[REG_INDEX(FS)]  = (uintptr_t) gregs.xfs;
  regs[REG_INDEX(ES)]  = (uintptr_t) gregs.xes;
  regs[REG_INDEX(DS)]  = (uintptr_t) gregs.xds;
  regs[REG_INDEX(EDI)] = (uintptr_t) gregs.edi;
  regs[REG_INDEX(ESI)] = (uintptr_t) gregs.esi;
  regs[REG_INDEX(FP)] = (uintptr_t) gregs.ebp;
  regs[REG_INDEX(SP)] = (uintptr_t) gregs.esp;
  regs[REG_INDEX(EBX)] = (uintptr_t) gregs.ebx;
  regs[REG_INDEX(EDX)] = (uintptr_t) gregs.edx;
  regs[REG_INDEX(ECX)] = (uintptr_t) gregs.ecx;
  regs[REG_INDEX(EAX)] = (uintptr_t) gregs.eax;
  regs[REG_INDEX(PC)] = (uintptr_t) gregs.eip;
  regs[REG_INDEX(CS)]  = (uintptr_t) gregs.xcs;
  regs[REG_INDEX(SS)]  = (uintptr_t) gregs.xss;

#endif /* i386 */

#if ia64
  regs = (*env)->GetLongArrayElements(env, array, &isCopy);
  for (i = 0; i < NPRGREG; i++ ) {
    regs[i] = 0xDEADDEAD;
  }
#endif /* ia64 */

#ifdef amd64
#define REG_INDEX(reg) sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_##reg

  regs[REG_INDEX(R15)] = gregs.r15;
  regs[REG_INDEX(R14)] = gregs.r14;
  regs[REG_INDEX(R13)] = gregs.r13;
  regs[REG_INDEX(R12)] = gregs.r12;
  regs[REG_INDEX(RBP)] = gregs.rbp;
  regs[REG_INDEX(RBX)] = gregs.rbx;
  regs[REG_INDEX(R11)] = gregs.r11;
  regs[REG_INDEX(R10)] = gregs.r10;
  regs[REG_INDEX(R9)] = gregs.r9;
  regs[REG_INDEX(R8)] = gregs.r8;
  regs[REG_INDEX(RAX)] = gregs.rax;
  regs[REG_INDEX(RCX)] = gregs.rcx;
  regs[REG_INDEX(RDX)] = gregs.rdx;
  regs[REG_INDEX(RSI)] = gregs.rsi;
  regs[REG_INDEX(RDI)] = gregs.rdi;
  regs[REG_INDEX(RIP)] = gregs.rip;
  regs[REG_INDEX(CS)] = gregs.cs;
  regs[REG_INDEX(RSP)] = gregs.rsp;
  regs[REG_INDEX(SS)] = gregs.ss;
  regs[REG_INDEX(FSBASE)] = gregs.fs_base;
  regs[REG_INDEX(GSBASE)] = gregs.gs_base;
  regs[REG_INDEX(DS)] = gregs.ds;
  regs[REG_INDEX(ES)] = gregs.es;
  regs[REG_INDEX(FS)] = gregs.fs;
  regs[REG_INDEX(GS)] = gregs.gs;

#endif /* amd64 */

#if defined(sparc) || defined(sparcv9)

#define REG_INDEX(reg) sun_jvm_hotspot_debugger_sparc_SPARCThreadContext_##reg

#ifdef _LP64
  regs[REG_INDEX(R_PSR)] = gregs.tstate;
  regs[REG_INDEX(R_PC)]  = gregs.tpc;
  regs[REG_INDEX(R_nPC)] = gregs.tnpc;
  regs[REG_INDEX(R_Y)]   = gregs.y;
#else
  regs[REG_INDEX(R_PSR)] = gregs.psr;
  regs[REG_INDEX(R_PC)]  = gregs.pc;
  regs[REG_INDEX(R_nPC)] = gregs.npc;
  regs[REG_INDEX(R_Y)]   = gregs.y;
#endif
  regs[REG_INDEX(R_G0)]  =            0 ;
  regs[REG_INDEX(R_G1)]  = gregs.u_regs[0];
  regs[REG_INDEX(R_G2)]  = gregs.u_regs[1];
  regs[REG_INDEX(R_G3)]  = gregs.u_regs[2];
  regs[REG_INDEX(R_G4)]  = gregs.u_regs[3];
  regs[REG_INDEX(R_G5)]  = gregs.u_regs[4];
  regs[REG_INDEX(R_G6)]  = gregs.u_regs[5];
  regs[REG_INDEX(R_G7)]  = gregs.u_regs[6];
  regs[REG_INDEX(R_O0)]  = gregs.u_regs[7];
  regs[REG_INDEX(R_O1)]  = gregs.u_regs[8];
  regs[REG_INDEX(R_O2)]  = gregs.u_regs[ 9];
  regs[REG_INDEX(R_O3)]  = gregs.u_regs[10];
  regs[REG_INDEX(R_O4)]  = gregs.u_regs[11];
  regs[REG_INDEX(R_O5)]  = gregs.u_regs[12];
  regs[REG_INDEX(R_O6)]  = gregs.u_regs[13];
  regs[REG_INDEX(R_O7)]  = gregs.u_regs[14];
#endif /* sparc */


  (*env)->ReleaseLongArrayElements(env, array, regs, JNI_COMMIT);
  return array;
}
コード例 #5
0
Result_t Handle_CAPI2_SYSRPC_PMU_ActivateSIM(RPC_Msg_t *pReqMsg,
					     PMU_SIMLDO_t simldo,
					     PMU_SIMVolt_t volt)
{
	Result_t result = RESULT_OK;
	SYS_ReqRep_t data;
	int simMicroVolts = 0;
	int ret;
	RegulatorInfo_t *curReg = &gRegulatorList[REG_INDEX(simldo)];
#if defined (CONFIG_MACH_JAVA_SS_COMMON)
	void __iomem *sim_sldor = NULL;
	int val;
#endif
	memset(&data, 0, sizeof(SYS_ReqRep_t));
	data.result = result;

	if (IS_ERR(curReg->handle)) {
		KRIL_DEBUG(DBG_ERROR,
			   " enter Handle_CAPI2_PMU_ActivateSIM Invalid Handle ldo=%d handle=%p active=%d\n",
			   simldo, curReg->handle, curReg->isSimInit);
		Send_SYS_RspForRequest(pReqMsg, MSG_PMU_ACTIVATE_SIM_RSP,
				       &data);
		return result;
	}

	KRIL_DEBUG(DBG_INFO,
		   " enter Handle_CAPI2_PMU_ActivateSIM ldo=%d handle=%p active=%d\n",
		   simldo, curReg->handle, curReg->isSimInit);

#if defined (CONFIG_MACH_JAVA_SS_COMMON)
	if (REG_INDEX(simldo))
			sim_sldor = (void __iomem *)(KONA_SIMI2_VA +
							SIMI_SLDOCR_OFFSET);
		else
			sim_sldor = (void __iomem *) (KONA_SIMI_VA +
							SIMI_SLDOCR_OFFSET);
#endif
	switch (volt) {
	case PMU_SIM3P0Volt:
		{
			KRIL_DEBUG(DBG_INFO, " PMU_SIM3P0Volt\n");
			/* 3.0 V SIM */
			simMicroVolts = THREE_VOLTS_IN_MICRO_VOLTS;
			break;
		}

	case PMU_SIM1P8Volt:
		{
			KRIL_DEBUG(DBG_INFO, " PMU_SIM1P8Volt\n");
			/* 1.8 V SIM */
			simMicroVolts = ONE_PT_EIGHT_VOLTS_IN_MICRO_VOLTS;
			break;
		}

	case PMU_SIM0P0Volt:
		{
			simMicroVolts = 0;

#if defined (CONFIG_MACH_JAVA_SS_COMMON)
			if (sim_sldor) {
				val = readl(sim_sldor);
				val &= ~SIMI_SLDOCR_SIMVCC_EN_MASK;
				writel(val, sim_sldor);
				KRIL_DEBUG(DBG_INFO, "SIM SLDOR 0x%x\n", val);
			}
#endif
			KRIL_DEBUG(DBG_INFO,
				   " ** PMU_SIM0P0Volt - turn off regulator (FORCE)\n");

			if (curReg->isSimInit) {
				curReg->isSimInit = FALSE;
				ret = regulator_disable(curReg->handle);
				KRIL_DEBUG(DBG_INFO,
					   " regulator_disable returned 0x%x\n",
					   ret);
			}
			break;
		}

	default:
		{
			KRIL_DEBUG(DBG_INFO,
				   " unrecognized value for volt %d\n",
				   (int)volt);
			break;
		}

	}

	if (simMicroVolts > 0) {
		ret =
		    regulator_set_voltage(curReg->handle, simMicroVolts,
					  simMicroVolts);
		KRIL_DEBUG(DBG_INFO, " regulator_set_voltage returned %d\n",
			   ret);

		ret = regulator_enable(curReg->handle);
		KRIL_DEBUG(DBG_INFO, " regulator_enable returned %d\n", ret);
#if defined (CONFIG_MACH_JAVA_SS_COMMON)
		if (sim_sldor) {
			val = readl(sim_sldor);
			val |= SIMI_SLDOCR_SIMVCC_EN_MASK;
			writel(val, sim_sldor);
			KRIL_DEBUG(DBG_INFO, "SIM SLDOR 0x%x\n", val);
		}
#endif
		/*Set SIMLDO mode to LPM in DSM*/
		ret = regulator_set_mode(curReg->handle, REGULATOR_MODE_IDLE);
		KRIL_DEBUG(DBG_INFO, "regulator_set_mode returned %d\n", ret);

		curReg->isSimInit = TRUE;
	}
	/*PMU_ActivateSIM(volt); */

	data.result = result;
	Send_SYS_RspForRequest(pReqMsg, MSG_PMU_ACTIVATE_SIM_RSP, &data);

	return result;
}
コード例 #6
0
Result_t Handle_CAPI2_SYSRPC_PMU_ActivateSIM(RPC_Msg_t *pReqMsg,
					     PMU_SIMLDO_t simldo,
					     PMU_SIMVolt_t volt)
{
	Result_t result = RESULT_OK;
	SYS_ReqRep_t data;
	int simMicroVolts = 0;
	int ret;
	RegulatorInfo_t *curReg = &gRegulatorList[REG_INDEX(simldo)];

	memset(&data, 0, sizeof(SYS_ReqRep_t));
	data.result = result;

	if (IS_ERR(curReg->handle)) {
		KRIL_DEBUG(DBG_ERROR,
			   " enter Handle_CAPI2_PMU_ActivateSIM Invalid Handle ldo=%d handle=%p active=%d\n",
			   simldo, curReg->handle, curReg->isSimInit);
		Send_SYS_RspForRequest(pReqMsg, MSG_PMU_ACTIVATE_SIM_RSP,
				       &data);
		return result;
	}

	KRIL_DEBUG(DBG_INFO,
		   " enter Handle_CAPI2_PMU_ActivateSIM ldo=%d handle=%p active=%d\n",
		   simldo, curReg->handle, curReg->isSimInit);

	switch (volt) {
	case PMU_SIM3P0Volt:
		{
			KRIL_DEBUG(DBG_INFO, " PMU_SIM3P0Volt\n");
			// 3.0 V SIM
			simMicroVolts = THREE_VOLTS_IN_MICRO_VOLTS;
			break;
		}

	case PMU_SIM1P8Volt:
		{
			KRIL_DEBUG(DBG_INFO, " PMU_SIM1P8Volt\n");
			// 1.8 V SIM
			simMicroVolts = ONE_PT_EIGHT_VOLTS_IN_MICRO_VOLTS;
			break;
		}

	case PMU_SIM0P0Volt:
		{
			simMicroVolts = 0;

			KRIL_DEBUG(DBG_INFO,
				   " ** PMU_SIM0P0Volt - turn off regulator (FORCE)\n");

			if (curReg->isSimInit) {
				curReg->isSimInit = FALSE;
				ret = regulator_disable(curReg->handle);
				KRIL_DEBUG(DBG_INFO,
					   " regulator_disable returned 0x%x\n",
					   ret);
			}
			break;
		}

	default:
		{
			KRIL_DEBUG(DBG_INFO,
				   " unrecognized value for volt %d\n",
				   (int)volt);
			break;
		}

	}

	if (simMicroVolts > 0) {
		ret = regulator_set_voltage(curReg->handle, simMicroVolts,
					    simMicroVolts);

		if (ret == 0) {
			KRIL_DEBUG(DBG_INFO,
			   " regulator_set_voltage success\n");

			ret = regulator_enable(curReg->handle);
			if (ret == 0)
				KRIL_DEBUG(DBG_INFO,
				" regulator_enable success\n");
			else
				KRIL_DEBUG(DBG_ERROR,
				" regulator_enable FAIL\n");
		} else
			KRIL_DEBUG(DBG_ERROR,
			" regulator_set_voltage FAIL\n");

		/* if either regulator call fails, return error result
		 * to caller as well as CP
		 */
		if (ret)
			result = RESULT_ERROR;
		curReg->isSimInit = (ret == 0);
	}

	data.result = result;
	Send_SYS_RspForRequest(pReqMsg, MSG_PMU_ACTIVATE_SIM_RSP, &data);

	return result;
}
コード例 #7
0
ファイル: sawindbg.cpp プロジェクト: 3oyka/openjdk-icedtea7
static bool addThreads(JNIEnv* env, jobject obj) {
  IDebugSystemObjects* ptrIDebugSystemObjects = (IDebugSystemObjects*) env->GetLongField(obj,
                                                      ptrIDebugSystemObjects_ID);
  CHECK_EXCEPTION_(false);

  ULONG numThreads = 0;
  if (ptrIDebugSystemObjects->GetNumberThreads(&numThreads) != S_OK) {
     THROW_NEW_DEBUGGER_EXCEPTION_("Windbg Error: GetNumberThreads failed!", false);
  }

  AutoArrayPtr<ULONG> ptrSysThreadIds = new ULONG[numThreads];

  if (ptrSysThreadIds.asPtr() == 0) {
     THROW_NEW_DEBUGGER_EXCEPTION_("out of memory to allocate thread ids!", false);
  }

  AutoArrayPtr<ULONG> ptrThreadIds = new ULONG[numThreads];

  if (ptrThreadIds.asPtr() == 0) {
     THROW_NEW_DEBUGGER_EXCEPTION_("out of memory to allocate thread ids!", false);
  }

  if (ptrIDebugSystemObjects->GetThreadIdsByIndex(0, numThreads,
                                      ptrThreadIds.asPtr(), ptrSysThreadIds.asPtr()) != S_OK) {
     THROW_NEW_DEBUGGER_EXCEPTION_("Windbg Error: GetThreadIdsByIndex failed!", false);
  }


  IDebugAdvanced* ptrIDebugAdvanced = (IDebugAdvanced*) env->GetLongField(obj,
                                                      ptrIDebugAdvanced_ID);
  CHECK_EXCEPTION_(false);

  // for each thread, get register context and save it.
  for (ULONG t = 0; t < numThreads; t++) {
     if (ptrIDebugSystemObjects->SetCurrentThreadId(ptrThreadIds.asPtr()[t]) != S_OK) {
        THROW_NEW_DEBUGGER_EXCEPTION_("Windbg Error: SetCurrentThread failed!", false);
     }

     jlongArray regs = env->NewLongArray(NPRGREG);
     CHECK_EXCEPTION_(false);

     jboolean isCopy = JNI_FALSE;
     jlong* ptrRegs = env->GetLongArrayElements(regs, &isCopy);
     CHECK_EXCEPTION_(false);

     // copy register values from the CONTEXT struct
     CONTEXT context;
     memset(&context, 0, sizeof(CONTEXT));

#undef REG_INDEX
#ifdef _M_IA64
     #define REG_INDEX(x) sun_jvm_hotspot_debugger_ia64_IA64ThreadContext_##x

     context.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG;
     ptrIDebugAdvanced->GetThreadContext(&context, sizeof(CONTEXT));

     ptrRegs[REG_INDEX(GR0)]  = 0; // always 0
     ptrRegs[REG_INDEX(GR1)]  = context.IntGp;  // r1
     ptrRegs[REG_INDEX(GR2)]  = context.IntT0;  // r2-r3
     ptrRegs[REG_INDEX(GR3)]  = context.IntT1;
     ptrRegs[REG_INDEX(GR4)]  = context.IntS0;  // r4-r7
     ptrRegs[REG_INDEX(GR5)]  = context.IntS1;
     ptrRegs[REG_INDEX(GR6)]  = context.IntS2;
     ptrRegs[REG_INDEX(GR7)]  = context.IntS3;
     ptrRegs[REG_INDEX(GR8)]  = context.IntV0;  // r8
     ptrRegs[REG_INDEX(GR9)]  = context.IntT2;  // r9-r11
     ptrRegs[REG_INDEX(GR10)] = context.IntT3;
     ptrRegs[REG_INDEX(GR11)] = context.IntT4;
     ptrRegs[REG_INDEX(GR12)] = context.IntSp;  // r12 stack pointer
     ptrRegs[REG_INDEX(GR13)] = context.IntTeb; // r13 teb
     ptrRegs[REG_INDEX(GR14)] = context.IntT5;  // r14-r31
     ptrRegs[REG_INDEX(GR15)] = context.IntT6;
     ptrRegs[REG_INDEX(GR16)] = context.IntT7;
     ptrRegs[REG_INDEX(GR17)] = context.IntT8;
     ptrRegs[REG_INDEX(GR18)] = context.IntT9;
     ptrRegs[REG_INDEX(GR19)] = context.IntT10;
     ptrRegs[REG_INDEX(GR20)] = context.IntT11;
     ptrRegs[REG_INDEX(GR21)] = context.IntT12;
     ptrRegs[REG_INDEX(GR22)] = context.IntT13;
     ptrRegs[REG_INDEX(GR23)] = context.IntT14;
     ptrRegs[REG_INDEX(GR24)] = context.IntT15;
     ptrRegs[REG_INDEX(GR25)] = context.IntT16;
     ptrRegs[REG_INDEX(GR26)] = context.IntT17;
     ptrRegs[REG_INDEX(GR27)] = context.IntT18;
     ptrRegs[REG_INDEX(GR28)] = context.IntT19;
     ptrRegs[REG_INDEX(GR29)] = context.IntT20;
     ptrRegs[REG_INDEX(GR30)] = context.IntT21;
     ptrRegs[REG_INDEX(GR31)] = context.IntT22;

     ptrRegs[REG_INDEX(INT_NATS)] = context.IntNats;
     ptrRegs[REG_INDEX(PREDS)]    = context.Preds;

     ptrRegs[REG_INDEX(BR_RP)] = context.BrRp;
     ptrRegs[REG_INDEX(BR1)]   = context.BrS0;  // b1-b5
     ptrRegs[REG_INDEX(BR2)]   = context.BrS1;
     ptrRegs[REG_INDEX(BR3)]   = context.BrS2;
     ptrRegs[REG_INDEX(BR4)]   = context.BrS3;
     ptrRegs[REG_INDEX(BR5)]   = context.BrS4;
     ptrRegs[REG_INDEX(BR6)]   = context.BrT0;  // b6-b7
     ptrRegs[REG_INDEX(BR7)]   = context.BrT1;

     ptrRegs[REG_INDEX(AP_UNAT)] = context.ApUNAT;
     ptrRegs[REG_INDEX(AP_LC)]   = context.ApLC;
     ptrRegs[REG_INDEX(AP_EC)]   = context.ApEC;
     ptrRegs[REG_INDEX(AP_CCV)]  = context.ApCCV;
     ptrRegs[REG_INDEX(AP_DCR)]  = context.ApDCR;

     ptrRegs[REG_INDEX(RS_PFS)]      = context.RsPFS;
     ptrRegs[REG_INDEX(RS_BSP)]      = context.RsBSP;
     ptrRegs[REG_INDEX(RS_BSPSTORE)] = context.RsBSPSTORE;
     ptrRegs[REG_INDEX(RS_RSC)]      = context.RsRSC;
     ptrRegs[REG_INDEX(RS_RNAT)]     = context.RsRNAT;

     ptrRegs[REG_INDEX(ST_IPSR)] = context.StIPSR;
     ptrRegs[REG_INDEX(ST_IIP)]  = context.StIIP;
     ptrRegs[REG_INDEX(ST_IFS)]  = context.StIFS;

     ptrRegs[REG_INDEX(DB_I0)] = context.DbI0;
     ptrRegs[REG_INDEX(DB_I1)] = context.DbI1;
     ptrRegs[REG_INDEX(DB_I2)] = context.DbI2;
     ptrRegs[REG_INDEX(DB_I3)] = context.DbI3;
     ptrRegs[REG_INDEX(DB_I4)] = context.DbI4;
     ptrRegs[REG_INDEX(DB_I5)] = context.DbI5;
     ptrRegs[REG_INDEX(DB_I6)] = context.DbI6;
     ptrRegs[REG_INDEX(DB_I7)] = context.DbI7;

     ptrRegs[REG_INDEX(DB_D0)] = context.DbD0;
     ptrRegs[REG_INDEX(DB_D1)] = context.DbD1;
     ptrRegs[REG_INDEX(DB_D2)] = context.DbD2;
     ptrRegs[REG_INDEX(DB_D3)] = context.DbD3;
     ptrRegs[REG_INDEX(DB_D4)] = context.DbD4;
     ptrRegs[REG_INDEX(DB_D5)] = context.DbD5;
     ptrRegs[REG_INDEX(DB_D6)] = context.DbD6;
     ptrRegs[REG_INDEX(DB_D7)] = context.DbD7;

#elif _M_IX86
     #define REG_INDEX(x) sun_jvm_hotspot_debugger_x86_X86ThreadContext_##x

     context.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG_REGISTERS;
     ptrIDebugAdvanced->GetThreadContext(&context, sizeof(CONTEXT));

     ptrRegs[REG_INDEX(GS)]  = context.SegGs;
     ptrRegs[REG_INDEX(FS)]  = context.SegFs;
     ptrRegs[REG_INDEX(ES)]  = context.SegEs;
     ptrRegs[REG_INDEX(DS)]  = context.SegDs;

     ptrRegs[REG_INDEX(EDI)] = context.Edi;
     ptrRegs[REG_INDEX(ESI)] = context.Esi;
     ptrRegs[REG_INDEX(EBX)] = context.Ebx;
     ptrRegs[REG_INDEX(EDX)] = context.Edx;
     ptrRegs[REG_INDEX(ECX)] = context.Ecx;
     ptrRegs[REG_INDEX(EAX)] = context.Eax;

     ptrRegs[REG_INDEX(FP)] = context.Ebp;
     ptrRegs[REG_INDEX(PC)] = context.Eip;
     ptrRegs[REG_INDEX(CS)]  = context.SegCs;
     ptrRegs[REG_INDEX(EFL)] = context.EFlags;
     ptrRegs[REG_INDEX(SP)] = context.Esp;
     ptrRegs[REG_INDEX(SS)]  = context.SegSs;

     ptrRegs[REG_INDEX(DR0)] = context.Dr0;
     ptrRegs[REG_INDEX(DR1)] = context.Dr1;
     ptrRegs[REG_INDEX(DR2)] = context.Dr2;
     ptrRegs[REG_INDEX(DR3)] = context.Dr3;
     ptrRegs[REG_INDEX(DR6)] = context.Dr6;
     ptrRegs[REG_INDEX(DR7)] = context.Dr7;

#elif _M_AMD64
     #define REG_INDEX(x) sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_##x

     context.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG_REGISTERS;
     ptrIDebugAdvanced->GetThreadContext(&context, sizeof(CONTEXT));

     // Segment Registers and processor flags
     ptrRegs[REG_INDEX(CS)]  = context.SegCs;
     ptrRegs[REG_INDEX(DS)]  = context.SegDs;
     ptrRegs[REG_INDEX(ES)]  = context.SegEs;
     ptrRegs[REG_INDEX(FS)]  = context.SegFs;
     ptrRegs[REG_INDEX(GS)]  = context.SegGs;
     ptrRegs[REG_INDEX(SS)]  = context.SegSs;
     ptrRegs[REG_INDEX(RFL)] = context.EFlags;

     // Integer registers
     ptrRegs[REG_INDEX(RDI)] = context.Rdi;
     ptrRegs[REG_INDEX(RSI)] = context.Rsi;
     ptrRegs[REG_INDEX(RAX)] = context.Rax;
     ptrRegs[REG_INDEX(RCX)] = context.Rcx;
     ptrRegs[REG_INDEX(RDX)] = context.Rdx;
     ptrRegs[REG_INDEX(RBX)] = context.Rbx;
     ptrRegs[REG_INDEX(RBP)] = context.Rbp;
     ptrRegs[REG_INDEX(RSP)] = context.Rsp;

     ptrRegs[REG_INDEX(R8)]  = context.R8;
     ptrRegs[REG_INDEX(R9)]  = context.R9;
     ptrRegs[REG_INDEX(R10)] = context.R10;
     ptrRegs[REG_INDEX(R11)] = context.R11;
     ptrRegs[REG_INDEX(R12)] = context.R12;
     ptrRegs[REG_INDEX(R13)] = context.R13;
     ptrRegs[REG_INDEX(R14)] = context.R14;
     ptrRegs[REG_INDEX(R15)] = context.R15;

     // Program counter
     ptrRegs[REG_INDEX(RIP)] = context.Rip;
#endif

     env->ReleaseLongArrayElements(regs, ptrRegs, JNI_COMMIT);
     CHECK_EXCEPTION_(false);

     env->CallVoidMethod(obj, setThreadIntegerRegisterSet_ID,
                        (jlong) ptrThreadIds.asPtr()[t], regs);
     CHECK_EXCEPTION_(false);

     ULONG sysId;
     if (ptrIDebugSystemObjects->GetCurrentThreadSystemId(&sysId) != S_OK) {
        THROW_NEW_DEBUGGER_EXCEPTION_("Windbg Error: GetCurrentThreadSystemId failed!", false);
     }

     env->CallVoidMethod(obj, addThread_ID, (jlong) sysId);
     CHECK_EXCEPTION_(false);
  }

  return true;
}