/* Close the SPI module */
i32 spi_close(cc_hndl spi_drv_hndl)
{
struct spi_rtos_driver *rtos_drv =
(struct spi_rtos_driver *)spi_drv_hndl;
RTOS_MUTEX_ACQUIRE(&rtos_drv->lock_obj);
/* decrement the reference count */
rtos_drv->ref_cnt--;
RTOS_MUTEX_RELEASE(&rtos_drv->lock_obj);
return 0;
}
/*
The function checks if the request state transition can be supported
and also initiates the corresponding action with the HAL.
*/
i32 spi_handle_pm_cmd(struct module_drv *mod_drv, const enum mod_pm pm_state)
{
i32 retval = -1;
struct spi_rtos_driver *rtos_drv =
(struct spi_rtos_driver *)mod_drv->rtos_drv;
/* Check if any of the transactions are ongoing */
if(rtos_drv->lock_obj) {
retval = RTOS_MUTEX_ACQUIRE_IMM(&rtos_drv->lock_obj);
if(retval < 0) {
/* Cannot transition power modes as transaction
in progress */
goto exit;
}
}
/* Handle the transition into the desired state */
if((e_pm_M0 == mod_drv->pm_state) && (e_pm_M4 == pm_state)) {
/* Save the peripheral context */
retval = cc_spi_control(rtos_drv->hal_handle,
SPI_CTL_CONTEXT_SAVE, NULL);
if(retval < 0) {
goto exit1;
}
/* Update the module state ?? */
mod_drv->pm_state = e_pm_M4;
} else if((e_pm_M4 == mod_drv->pm_state) && (e_pm_M0 == pm_state)) {
/* Restore the peripheral context */
retval = cc_spi_control(rtos_drv->hal_handle,
SPI_CTL_CONTEXT_RESTORE, NULL);
if(retval < 0) {
goto exit1;
}
/* Update the module state ?? */
mod_drv->pm_state = e_pm_M0;
} else {
/* unsupported state transition */
goto exit1;
}
exit1:
if(rtos_drv->lock_obj) {
RTOS_MUTEX_RELEASE(&rtos_drv->lock_obj);
}
exit:
return retval;
}
/* Open the UART module */
cc_hndl uart_open(u32 module_id)
{
struct uart_rtos_driver *rtos_drv = NULL;
i32 retval;
/* Check if the driver has already been loaded */
rtos_drv = check_uart_rtosdrv_inuse(module_id);
if(NULL == rtos_drv) {
/* Driver not loaded, return error */
goto exit;
}
if(rtos_drv->lock_obj) {
RTOS_MUTEX_ACQUIRE(&rtos_drv->lock_obj);
} else {
/* Create the lock and sync objects */
retval = RTOS_SEM_CREATE(&rtos_drv->sync_obj);
if(retval < 0) {
goto exit1;
}
retval = RTOS_MUTEX_CREATE(&rtos_drv->lock_obj);
if(retval < 0) {
goto exit2;
}
RTOS_MUTEX_ACQUIRE(&rtos_drv->lock_obj);
}
/* increment the reference count */
rtos_drv->ref_cnt++;
RTOS_MUTEX_RELEASE(&rtos_drv->lock_obj);
return rtos_drv;
exit2:
RTOS_MUTEX_DELETE(&rtos_drv->lock_obj);
exit1:
RTOS_SEM_DELETE(&rtos_drv->sync_obj);
rtos_drv->lock_obj = NULL;
rtos_drv->sync_obj = NULL;
exit:
return NULL;
}
int
CLI_Put(char c)
{
#ifdef _USE_CLI_
if (c == '\n') {
CLI_Put('\r');
}
RTOS_MUTEX_ACQUIRE(&g_printLock);
/* wait for a previous transmission to end */
while (!(UCA1IFG & UCTXIFG)){
__asm__("nop");
}
UCA1TXBUF = c;
RTOS_MUTEX_RELEASE(&g_printLock);
return 1;
#else
return 0;
#endif
}
int
CLI_Write(unsigned char *inBuff)
{
if(inBuff == NULL)
return -1;
#ifdef _USE_CLI_
RTOS_MUTEX_ACQUIRE(&g_printLock);
unsigned short ret,usLength = strlen((const char *)inBuff);
ret = usLength;
while (usLength)
{
while (!(UCA1IFG & UCTXIFG)) ;
UCA1TXBUF = *inBuff;
usLength--;
inBuff++;
}
RTOS_MUTEX_RELEASE(&g_printLock);
return (int)ret;
#else
return 0;
#endif
}
/* Full duplex Write-Read over SPI */
i32 spi_write_read(cc_hndl spi_drv_hndl, const i8 *wr_data,
i8 *rd_data, i32 size)
{
i32 retval;
struct spi_rtos_driver *rtos_drv =
(struct spi_rtos_driver *)spi_drv_hndl;
u32 rd_buf_addr = (u32)rd_data;
u32 wr_buf_addr = (u32)wr_data;
i32 rw_pend = -1;
RTOS_MUTEX_ACQUIRE(&rtos_drv->lock_obj);
/* Check the mode of transfer. If DMA, handle it here else invoke HAL */
//if(SPI_DMA_OPS == rtos_drv->oper_mode) {
if((size > DMA_BUFF_SIZE_MIN) && ((rd_buf_addr % 4) == 0) &&
((wr_buf_addr % 4) == 0)) {
retval = cc_spi_control(rtos_drv->hal_handle,
SPI_CTL_COOKIE_UPDATE, (void*)&rw_pend);
/* Initiate the SPI transfer over DMA */
trigger_spi_dma_transfer(rtos_drv, wr_data, rd_data, size);
RTOS_SEM_WAIT(&rtos_drv->sync_obj); /* Make RTOS function blocking */
}else{
if(0 > cc_spi_rw_submit(rtos_drv->hal_handle, wr_data,
rd_data, size, (void*)&rw_pend)) {
goto rtos_spi_drv_rw_error;
}
}
rtos_spi_drv_rw_error:
RTOS_MUTEX_RELEASE(&rtos_drv->lock_obj);
UNUSED(retval);
return (rw_pend < 0) ? -1 : (size - rw_pend);
}
i32 uart_write(cc_hndl uart_drv_hndl, i8 *wr_data, i32 size)
{
i32 retval;
struct uart_rtos_driver *rtos_drv =
(struct uart_rtos_driver *)uart_drv_hndl;
i32 wr_pend = -1;
/* Can be part of RTOS framework */
RTOS_MUTEX_ACQUIRE(&rtos_drv->lock_obj);
/* Check the mode of transfer. If DMA, handle it here else invoke HAL */
if(e_dma_based == rtos_drv->rx_oper_mode) {
/* Initiate the UART transfer over DMA */
trigger_uart_dma_transfer(rtos_drv, wr_data, NULL, size);
RTOS_SEM_WAIT(&rtos_drv->sync_obj); /* RTOS function blocking */
}else{
if(0 > cc_uart_wr_submit(rtos_drv->hal_handle,
(uint8_t*)wr_data, size,
(void*)&wr_pend)) {
goto rtos_uart_drv_write_error;
}
if(e_int_based == rtos_drv->tx_oper_mode) {
/* RTOS function blocking */
RTOS_SEM_WAIT(&rtos_drv->sync_obj);
}
}
rtos_uart_drv_write_error:
RTOS_MUTEX_RELEASE(&rtos_drv->lock_obj);
UNUSED(retval);
return (wr_pend < 0) ? -1 : (size - wr_pend);
}