///////////////////////////////////////////////////////////////////////[02] int SifDeinitCmd(){ int x; DisableIntr(INT_DMA10, &x); ReleaseIntrHandler(INT_DMA10); SifDeinit(); return 0; }
void RegisterInterrupts() { s32 ret; DisableIntr(0x24, (int *)&ret); DisableIntr(0x28, (int *)&ret); DisableIntr(0x9, (int *)&ret); ReleaseIntrHandler(0x24); ReleaseIntrHandler(0x28); RegisterIntrHandler(0x24, 1, TransInterrupt, &TransIntrData[0]); RegisterIntrHandler(0x28, 1, TransInterrupt, &TransIntrData[1]); VoiceTransComplete[0] = 0; VoiceTransComplete[1] = 0; ReleaseIntrHandler(0x9); RegisterIntrHandler(0x9, 1, Spu2Interrupt, &Spu2IntrData); }
int _stop ( void ) { int lState; CpuSuspendIntr ( &lState ); DisableIntr ( IOP_IRQ_SIO2, 0 ); ReleaseIntrHandler ( IOP_IRQ_SIO2 ); CpuResumeIntr ( lState ); dmac_disable ( IOP_DMAC_SIO2in ); dmac_disable ( IOP_DMAC_SIO2out ); return GetThreadId (); } /* end _stop */
void shutdown(void) { int state; #ifndef XSIO2MAN log_flush(1); #endif CpuSuspendIntr(&state); DisableIntr(IOP_IRQ_SIO2, 0); ReleaseIntrHandler(IOP_IRQ_SIO2); CpuResumeIntr(state); dmac_disable(IOP_DMAC_SIO2in); dmac_disable(IOP_DMAC_SIO2out); }
void sbus_intr_exit() { DisableIntr(IOP_IRQ_SBUS, NULL); ReleaseIntrHandler(IOP_IRQ_SBUS); initialized = 0; }
///////////////////////////////////////////////////////////////////////[05] void SifExitCmd(){ int x; DisableIntr(INT_DMA10, &x); ReleaseIntrHandler(INT_DMA10); }