IMG_VOID RgxSunxiInit(IMG_VOID) { ParseFexPara(); rgx_regulator = regulator_get(NULL, "axp22_dcdc2"); if (IS_ERR(rgx_regulator)) { printk(KERN_ERR "Failed to get rgx regulator \n"); rgx_regulator = NULL; } gpu_core_clk = clk_get(NULL, GPUCORE_CLK); gpu_mem_clk = clk_get(NULL, GPUMEM_CLK); gpu_axi_clk = clk_get(NULL, GPUAXI_CLK); gpu_pll_clk = clk_get(NULL, PLL9_CLK); SetGpuVol(min_vf_level_val); SetClkVal("pll", vf_table[min_vf_level_val][1]); SetClkVal("core", vf_table[min_vf_level_val][1]); SetClkVal("mem", vf_table[min_vf_level_val][1]); SetClkVal("axi", AXI_CLK_FREQ); RgxResume(); #ifdef CONFIG_CPU_BUDGET_THERMAL register_budget_cooling_notifier(&rgx_throttle_notifier); #endif /* CONFIG_CPU_BUDGET_THERMAL */ printk(KERN_INFO "Sunxi init successfully\n"); }
IMG_VOID RgxSunxiInit(IMG_VOID) { ParseFexPara(); rgx_regulator = regulator_get(NULL, regulator_id); if (IS_ERR(rgx_regulator)) { PVR_DPF((PVR_DBG_ERROR, "Failed to get rgx regulator!")); rgx_regulator = NULL; return; } gpu_core_clk = clk_get(NULL, GPUCORE_CLK); gpu_mem_clk = clk_get(NULL, GPUMEM_CLK); gpu_axi_clk = clk_get(NULL, GPUAXI_CLK); gpu_pll_clk = clk_get(NULL, PLL9_CLK); gpu_ctrl_clk = clk_get(NULL, GPU_CTRL); SetGpuVol(min_vf_level_val); SetClkVal("pll", vf_table[min_vf_level_val][1]); SetClkVal("core", vf_table[min_vf_level_val][1]); SetClkVal("mem", vf_table[min_vf_level_val][1]); SetClkVal("axi", AXI_CLK_FREQ); RgxResume(); #ifdef CONFIG_CPU_BUDGET_THERMAL register_budget_cooling_notifier(&rgx_throttle_notifier); #endif /* CONFIG_CPU_BUDGET_THERMAL */ }