void x3_hirq_set_config(void)
{
/* set GPO(3) as EXT_INTTERRUPT7(3) for x3_hirq_info_data hotplug */
s3c_gpio_cfgpin(S3C64XX_GPO(3),S3C64XX_GPO3_EINT_G7_3);
s3c_gpio_setpull(S3C64XX_GPO(3), S3C_GPIO_PULL_DOWN);
//Rising edge triggered
writel((readl(S3C64XX_EINT78CON) & (~(0x7 << 0)))| (0x4 << 0) , S3C64XX_EINT78CON);
}
int x3_hirq_status(void)
{
unsigned int hp_conectd_n = 0;
/* set GPO(3) as input to get x3_hirq_info_data status*/
s3c_gpio_cfgpin(S3C64XX_GPO(3),S3C64XX_GPO_INPUT(3));
hp_conectd_n = gpio_get_value(S3C64XX_GPO(3));
/* set GPO(3) as EXT_INTTERRUPT7(3) for x3_hirq_info_data hotplug */
s3c_gpio_cfgpin(S3C64XX_GPO(3),S3C64XX_GPO3_EINT_G7_3);
printk("[EPD_interrupt]%d\n", hp_conectd_n);
if(hp_conectd_n)
epd_set_HIRQ(0xFF);
return (hp_conectd_n);
}
.partitions = hmt_nand_part,
},
};
static struct s3c2410_platform_nand hmt_nand_info = {
.tacls = 25,
.twrph0 = 55,
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(hmt_nand_sets),
.sets = hmt_nand_sets,
};
static struct gpio_led hmt_leds[] = {
{ /* left function keys */
.name = "left:blue",
.gpio = S3C64XX_GPO(12),
.default_trigger = "default-on",
},
{ /* right function keys - red */
.name = "right:red",
.gpio = S3C64XX_GPO(13),
},
{ /* right function keys - green */
.name = "right:green",
.gpio = S3C64XX_GPO(14),
},
{ /* right function keys - blue */
.name = "right:blue",
.gpio = S3C64XX_GPO(15),
.default_trigger = "default-on",
},
.label = "GPJ",
},
}, {
.base = S3C64XX_GPN_BASE,
.config = &gpio_2bit_cfg_eint10,
.chip = {
.base = S3C64XX_GPN(0),
.ngpio = S3C64XX_GPIO_N_NR,
.label = "GPN",
.to_irq = s3c64xx_gpio2int_gpn,
},
}, {
.base = S3C64XX_GPO_BASE,
.config = &gpio_2bit_cfg_eint11,
.chip = {
.base = S3C64XX_GPO(0),
.ngpio = S3C64XX_GPIO_O_NR,
.label = "GPO",
},
}, {
.base = S3C64XX_GPP_BASE,
.config = &gpio_2bit_cfg_eint11,
.chip = {
.base = S3C64XX_GPP(0),
.ngpio = S3C64XX_GPIO_P_NR,
.label = "GPP",
},
}, {
.base = S3C64XX_GPQ_BASE,
.config = &gpio_2bit_cfg_eint11,
.chip = {
