//-----------------------------------------------------------------------------
static void uart_init(uint32_t baud)
{
uint64_t br = (uint64_t)65536 * (F_CPU - 16 * baud) / F_CPU;
HAL_GPIO_UART_TX_out();
HAL_GPIO_UART_TX_pmuxen(PORT_PMUX_PMUXE_C_Val);
HAL_GPIO_UART_RX_in();
HAL_GPIO_UART_RX_pmuxen(PORT_PMUX_PMUXE_C_Val);
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0;
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(SERCOM0_GCLK_ID_CORE) |
GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(0);
SERCOM0->USART.CTRLA.reg =
SERCOM_USART_CTRLA_DORD | SERCOM_USART_CTRLA_MODE_USART_INT_CLK |
SERCOM_USART_CTRLA_RXPO(3/*PAD3*/) | SERCOM_USART_CTRLA_TXPO(1/*PAD2*/);
SERCOM0->USART.CTRLB.reg = SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN |
SERCOM_USART_CTRLB_CHSIZE(0/*8 bits*/);
SERCOM0->USART.BAUD.reg = (uint16_t)br+1;
SERCOM0->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
}
//-----------------------------------------------------------------------------
static void uart_init(uint32_t baud)
{
HAL_GPIO_UART_TX_out();
HAL_GPIO_UART_TX_pmuxen(HAL_GPIO_PMUX_D);
HAL_GPIO_UART_RX_in();
HAL_GPIO_UART_RX_pmuxen(HAL_GPIO_PMUX_D);
MCLK->APBBMASK.reg |= MCLK_APBBMASK_SERCOM2;
GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN(0) | GCLK_PCHCTRL_CHEN;
while (0 == (GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg & GCLK_PCHCTRL_CHEN));
SERCOM2->USART.CTRLA.reg =
SERCOM_USART_CTRLA_DORD | SERCOM_USART_CTRLA_MODE(1/*INT_CLK*/) |
SERCOM_USART_CTRLA_RXPO(1/*PAD1*/) | SERCOM_USART_CTRLA_TXPO(0/*PAD0*/) |
SERCOM_USART_CTRLA_SAMPR(1);
SERCOM2->USART.CTRLB.reg = SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN |
SERCOM_USART_CTRLB_CHSIZE(0/*8 bits*/);
#define BAUD_VAL (F_CPU / (16 * baud))
#define FP_VAL ((F_CPU / baud - 16 * BAUD_VAL) / 2)
SERCOM2->USART.BAUD.reg =
SERCOM_USART_BAUD_FRACFP_BAUD(BAUD_VAL) |
SERCOM_USART_BAUD_FRACFP_FP(FP_VAL);
SERCOM2->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
}
//-----------------------------------------------------------------------------
static void uart_init(uint32_t baud)
{
uint64_t br = (uint64_t)65536 * (F_CPU - 16 * baud) / F_CPU;
HAL_GPIO_UART_TX_out();
HAL_GPIO_UART_TX_pmuxen(HAL_GPIO_PMUX_D);
HAL_GPIO_UART_RX_in();
HAL_GPIO_UART_RX_pmuxen(HAL_GPIO_PMUX_D);
MCLK->APBCMASK.reg |= MCLK_APBCMASK_SERCOM4;
GCLK->PCHCTRL[SERCOM4_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN(0) | GCLK_PCHCTRL_CHEN;
while (0 == (GCLK->PCHCTRL[SERCOM4_GCLK_ID_CORE].reg & GCLK_PCHCTRL_CHEN));
SERCOM4->USART.CTRLA.reg =
SERCOM_USART_CTRLA_DORD | SERCOM_USART_CTRLA_MODE(1/*USART_INT_CLK*/) |
SERCOM_USART_CTRLA_RXPO(3/*PAD3*/) | SERCOM_USART_CTRLA_TXPO(1/*PAD2*/);
SERCOM4->USART.CTRLB.reg = SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN |
SERCOM_USART_CTRLB_CHSIZE(0/*8 bits*/);
SERCOM4->USART.BAUD.reg = (uint16_t)br;
SERCOM4->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
}
void SERCOM::initFrame(SercomUartCharSize charSize, SercomDataOrder dataOrder, SercomParityMode parityMode, SercomNumberStopBit nbStopBits)
{
//Setting the CTRLA register
sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_FORM( (parityMode == SERCOM_NO_PARITY ? 0 : 1) ) |
dataOrder << SERCOM_USART_CTRLA_DORD_Pos;
//Setting the CTRLB register
sercom->USART.CTRLB.reg |= SERCOM_USART_CTRLB_CHSIZE(charSize) |
nbStopBits << SERCOM_USART_CTRLB_SBMODE_Pos |
(parityMode == SERCOM_NO_PARITY ? 0 : parityMode) << SERCOM_USART_CTRLB_PMODE_Pos; //If no parity use default value
}
// ****************************************************************************
void HAL_uart_init(uint32_t baudrate)
{
#define UART_CLK 48000000
uint64_t brr = (uint64_t)65536 * (UART_CLK - 16 * baudrate) / UART_CLK;
// Use GLKGEN0 (48 MHz) as clock source for the UART
GCLK->CLKCTRL.reg =
GCLK_CLKCTRL_ID(UART_SERCOM_GCLK_ID) |
GCLK_CLKCTRL_CLKEN |
GCLK_CLKCTRL_GEN(0);
// Run UART from GCLK; Setup Rx and Tx pads
UART_SERCOM->USART.CTRLA.reg =
SERCOM_USART_CTRLA_DORD |
SERCOM_USART_CTRLA_MODE_USART_INT_CLK |
SERCOM_USART_CTRLA_RXPO(HAL_GPIO_RX.rxpo) |
SERCOM_USART_CTRLA_TXPO(tx_pad);
// Enable transmit and receive; 8 bit characters
UART_SERCOM->USART.CTRLB.reg =
SERCOM_USART_CTRLB_RXEN |
SERCOM_USART_CTRLB_TXEN |
SERCOM_USART_CTRLB_CHSIZE(0); // 8 bits
while (UART_SERCOM->USART.SYNCBUSY.reg);
UART_SERCOM->USART.BAUD.reg = (uint16_t)brr;
while (UART_SERCOM->USART.SYNCBUSY.reg);
UART_SERCOM->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
while (UART_SERCOM->USART.SYNCBUSY.reg);
// Enable the receive interrupt
UART_SERCOM->USART.INTENSET.reg = SERCOM_USART_INTENSET_RXC;
NVIC_EnableIRQ(UART_SERCOM_IRQN);
}
void usart_init(uint32_t baudrate)
{
Sercom *const hw = UART_MODULE;
pinmux_t config;
/* Get a pointer to the hardware module instance */
SercomUsart *const usart_hw = &(hw->USART);
while(usart_hw->CTRLA.reg & SERCOM_USART_CTRLA_SWRST){
/* The module is busy resetting itself */
}
while(usart_hw->CTRLA.reg & SERCOM_USART_CTRLA_ENABLE){
/* Check the module is enabled */
}
/* Turn on module in PM */
PM->APBCMASK.reg |= UART_PM_MODULE;
/* Set up the GCLK for the module */
gclk_chan_config(UART_MODULE_GCLK, UART_GCLK);
gclk_enable(UART_MODULE_GCLK);
gclk_chan_config(SERCOM_GCLK_ID, UART_GCLK);
gclk_enable(SERCOM_GCLK_ID);
/* Configure the SERCOM pins according to the configuration */
config.dir = PORT_PIN_DIR_INPUT;
config.pull = PORT_PIN_PULLNONE;
config.mux_loc = UART_TX_MUX_PIN & 0xFFFF;
pinmux_config(UART_TX_PIN, &config);
config.mux_loc = UART_RX_MUX_PIN & 0xFFFF;
pinmux_config(UART_RX_PIN, &config);
/* Wait until synchronization is complete */
while(usart_hw->SYNCBUSY.reg);
/*Set baud val */
usart_hw->BAUD.reg = baudrate;
/* Wait until synchronization is complete */
while(usart_hw->SYNCBUSY.reg);
/* Set stop bits, character size and enable transceivers */
/* Write configuration to CTRLB */
usart_hw->CTRLB.reg = USART_STOPBITS_1 | SERCOM_USART_CTRLB_CHSIZE(0);
/* Wait until synchronization is complete */
while(usart_hw->SYNCBUSY.reg);
/* Write configuration to CTRLA */
usart_hw->CTRLA.reg = USART_TRANSFER_ASYNCHRONOUSLY | SERCOM_USART_CTRLA_MODE_USART_INT_CLK |\
USART_DATAORDER_LSB | UART_SERCOM_MUX_SETTING;
/* Wait until synchronization is complete */
while(usart_hw->SYNCBUSY.reg);
/* Write configuration to CTRLA */
usart_hw->CTRLB.reg |= SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN;
/* Wait until synchronization is complete */
while(usart_hw->SYNCBUSY.reg);
/* Write configuration to CTRLA */
usart_hw->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
}
void uart_init(uint32_t baud) {
uint32_t UART_CLKGEN_F = 8000000UL;
uint64_t br = (uint64_t)65536 * (UART_CLKGEN_F - 16 * baud) / UART_CLKGEN_F;
//enable GPS pins
// SaLPinMode(MTK3339_RX_PIN,INPUT);
// SaLPinMode(MTK3339_TX_PIN,OUTPUT);
SYSCTRL->OSC8M.reg -= SYSCTRL_OSC8M_ENABLE;
SYSCTRL->OSC8M.reg -= SYSCTRL_OSC8M_PRESC_3;
SYSCTRL->OSC8M.reg |= SYSCTRL_OSC8M_ENABLE;
//portB22->PINCFG->reg = 0x44;
// portB23->PINCFG->reg = 0x44;
// GPS pin configs
((Port *)PORT)->Group[1].PINCFG[22].reg = 0x41;
((Port *)PORT)->Group[1].PINCFG[23].reg = 0x41;
((Port *)PORT)->Group[1].PMUX[11].reg = 0x32;
// usb port configs
// ((Port *)PORT)->Group[0].PINCFG[24].reg = 0x41;
// ((Port *)PORT)->Group[0].PINCFG[25].reg = 0x41;
// ((Port *)PORT)->Group[0].PMUX[12].reg = 0x24;
//enable power to sercom 5 module
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM5;
//enable and configure the sercom clock
GCLK->GENDIV.reg = GCLK_GENDIV_ID(3) |
GCLK_GENDIV_DIV(1);
GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(3) |
GCLK_GENCTRL_SRC_OSC8M |
GCLK_GENCTRL_IDC |
GCLK_GENCTRL_RUNSTDBY |
GCLK_GENCTRL_GENEN;
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_SERCOM5_CORE |
GCLK_CLKCTRL_GEN_GCLK3 |
GCLK_CLKCTRL_CLKEN;
// GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_SERCOMX_SLOW |
// GCLK_CLKCTRL_GEN_GCLK3 |
// GCLK_CLKCTRL_CLKEN;
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_SERCOM3_CORE |
GCLK_CLKCTRL_GEN_GCLK3 |
GCLK_CLKCTRL_CLKEN;
//configure the sercom module for the gps (sercom 5)
SERCOM5->USART.CTRLA.reg = SERCOM_USART_CTRLA_DORD |
SERCOM_USART_CTRLA_MODE_USART_INT_CLK |
SERCOM_USART_CTRLA_RXPO(3) |
SERCOM_USART_CTRLA_TXPO(1);
uart_sync(SERCOM5);
SERCOM5->USART.CTRLB.reg = SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN |
SERCOM_USART_CTRLB_CHSIZE(0/*8 bits*/);
// SERCOM_USART_CTRLB_SFDE;
uart_sync(SERCOM5);
SERCOM5->USART.BAUD.reg = (uint16_t)br;
uart_sync(SERCOM5);
SERCOM5->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
uart_sync(SERCOM5);
SaLInitUsart(&USART_0,SERCOM5);
}
