//------------------------------------------------------------------------------ // Sets up ports for all peripherals // NOTE 'default' Refers to the default device setup for the application. void gPB_enter_default_config() { // Enable the APB clock to the PB registers // Enable SW printf SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, SI32_CLKCTRL_A_APBCLKG0_PB0); SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_1, 0x00000008); // Enable Crossbar 1, where the example drives LEDs, samples buttons, and // outputs the RTC clock. SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0); // GPIO Port Bank setup // Enable the LED drivers (P2.10, P2.11) SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x00000C00); // Enable switch sensing (P2.10, P2.11) SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_2, 0x00000300); // RTC Port Bank setup // Set the RTC oscillator pins to analog mode (PB0.9, PB0.10) SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_0, 0x00000600); // Ouptut the RTC0 clock (PB2.7) SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x00000080); SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_2, 0x0000007F); SI32_PBCFG_A_enable_xbar1_peripherals(SI32_PBCFG_0, SI32_PBCFG_A_XBAR1_RTC0EN); }
void CLKCTRL_setup_default_mode_clock_gates(void) { SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, SI32_CLKCTRL_A_APBCLKG0_PB0 | SI32_CLKCTRL_A_APBCLKG0_CAPSENSE0 | SI32_CLKCTRL_A_APBCLKG0_USB0 | SI32_CLKCTRL_A_APBCLKG0_FLASHCTRL0); }
void mySystemInit() { SI32_WDTIMER_A_stop_counter(SI32_WDTIMER_0); // enable APB clock to the Port Bank module SI32_CLKCTRL_A_enable_apb_to_modules_0 (SI32_CLKCTRL_0, SI32_CLKCTRL_A_APBCLKG0_PB0CEN_MASK); // make the SWO pin (PB1.3) push-pull to enable SWV printf //SI32_PBSTD_A_set_pins_push_pull_output (SI32_PBSTD_1, (1<<3)); }
void wave_4k_init(void) { SI32_TIMER_A_Type* SI32_TIMER = SI32_TIMER_1; uint16_t reload_value = get_wave_reload_value(WAVE_4K); SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, SI32_CLKCTRL_A_APBCLKG0_TIMER1); SI32_TIMER_A_select_low_auto_reload_mode(SI32_TIMER); SI32_TIMER_A_enable_low_overflow_interrupt(SI32_TIMER); SI32_TIMER_A_disable_low_extra_interrupt(SI32_TIMER); SI32_TIMER_A_select_low_clock_source_apb_clock(SI32_TIMER); SI32_TIMER_A_set_low_count(SI32_TIMER,reload_value); SI32_TIMER_A_set_low_reload(SI32_TIMER,reload_value); SI32_TIMER_A_clear_low_overflow_interrupt(SI32_TIMER); NVIC_ClearPendingIRQ( TIMER1L_IRQn ); NVIC_EnableIRQ( TIMER1L_IRQn ); }
void wave_125k_init(void) { SI32_TIMER_A_Type* SI32_TIMER = SI32_TIMER_1; uint16_t reload_value = get_wave_reload_value(WAVE_125K); SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, SI32_CLKCTRL_A_APBCLKG0_TIMER1); SI32_TIMER_A_select_square_wave_output_mode(SI32_TIMER); SI32_TIMER_A_disable_high_overflow_interrupt(SI32_TIMER); SI32_TIMER_A_disable_high_extra_interrupt(SI32_TIMER); SI32_TIMER_A_enable_stall_in_debug_mode(SI32_TIMER); SI32_TIMER_A_select_high_clock_source_apb_clock(SI32_TIMER); SI32_TIMER_A_select_split_timer_mode(SI32_TIMER); SI32_TIMER_A_set_high_count(SI32_TIMER,reload_value); SI32_TIMER_A_set_high_reload(SI32_TIMER,reload_value); SI32_TIMER_A_clear_high_overflow_interrupt(SI32_TIMER); SI32_PBCFG_A_enable_xbar0_peripherals(SI32_PBCFG_0, SI32_PBCFG_A_XBAR0_TMR1EXEN); SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_0, 0x0100); }