static void op1000(char *buffer, UINT32 pc, UINT16 opcode) { const char *sym; switch((opcode >> 8) & 15) { case 0: sym = set_ea_info(0, (opcode & 15), EA_UINT8, EA_VALUE); set_ea_info(1, activecpu_get_reg(SH2_R0+Rm) + (opcode & 15), EA_UINT8, EA_MEM_WR); sprintf(buffer, "MOV.B R0,@(%s,%s)", sym, regname[Rm]); break; case 1: sym = set_ea_info(0, (opcode & 15) * 2, EA_UINT8, EA_VALUE); set_ea_info(1, activecpu_get_reg(SH2_R0+Rm) + (opcode & 15)*2, EA_UINT16, EA_MEM_WR); sprintf(buffer, "MOV.W R0,@(%s,%s)", sym, regname[Rm]); break; case 4: sym = set_ea_info(0, (opcode & 15), EA_UINT8, EA_VALUE); set_ea_info(1, activecpu_get_reg(SH2_R0+Rm) + (opcode & 15), EA_UINT8, EA_MEM_RD); sprintf(buffer, "MOV.B @(%s,%s),R0", sym, regname[Rm]); break; case 5: sym = set_ea_info(0, (opcode & 15), EA_UINT8, EA_VALUE); set_ea_info(1, activecpu_get_reg(SH2_R0+Rm) + (opcode & 15)*2, EA_UINT16, EA_MEM_RD); sprintf(buffer, "MOV.W @(%s,%s),R0", sym, regname[Rm]); break; case 8: sym = set_ea_info(0, (opcode & 0xff), EA_UINT8, EA_VALUE); sprintf(buffer, "CMP/EQ #%s,R0", sym); break; case 9: sym = set_ea_info(0, pc, SIGNX8(opcode & 0xff) * 2 + 2, EA_REL_PC); sprintf(buffer, "BT %s", sym); break; case 11: sym = set_ea_info(0, pc, SIGNX8(opcode & 0xff) * 2 + 2, EA_REL_PC); sprintf(buffer, "BF %s", sym); break; case 13: sym = set_ea_info(0, pc, SIGNX8(opcode & 0xff) * 2 + 2, EA_REL_PC); sprintf(buffer, "BTS %s", sym); break; case 15: sym = set_ea_info(0, pc, SIGNX8(opcode & 0xff) * 2 + 2, EA_REL_PC); sprintf(buffer, "BFS %s", sym); break; default : sym = set_ea_info(0, opcode, EA_UINT16, EA_VALUE); sprintf(buffer, "invalid %s\n", sym); } }
static UINT32 op1000(char *buffer, UINT32 pc, UINT16 opcode) { switch((opcode >> 8) & 15) { case 0: sprintf(buffer, "MOV.B R0,@($%02X,%s)", (opcode & 15), regname[Rm]); break; case 1: sprintf(buffer, "MOV.W R0,@($%02X,%s)", (opcode & 15) * 2, regname[Rm]); break; case 4: sprintf(buffer, "MOV.B @($%02X,%s),R0", (opcode & 15), regname[Rm]); break; case 5: sprintf(buffer, "MOV.W @($%02X,%s),R0", (opcode & 15), regname[Rm]); break; case 8: sprintf(buffer, "CMP/EQ #$%02X,R0", (opcode & 0xff)); break; case 9: sprintf(buffer, "BT $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2); break; case 11: sprintf(buffer, "BF $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2); break; case 13: sprintf(buffer, "BTS $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2); break; case 15: sprintf(buffer, "BFS $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2); break; default : sprintf(buffer, "invalid $%04X", opcode); } return 0; }
uint32_t sh_disassembler::op1000(std::ostream &stream, uint32_t pc, uint16_t opcode) { switch((opcode >> 8) & 15) { case 0: util::stream_format(stream, "MOV.B R0,@($%02X,%s)", (opcode & 15), regname[Rm]); break; case 1: util::stream_format(stream, "MOV.W R0,@($%02X,%s)", (opcode & 15) * 2, regname[Rm]); break; case 4: util::stream_format(stream, "MOV.B @($%02X,%s),R0", (opcode & 15), regname[Rm]); break; case 5: util::stream_format(stream, "MOV.W @($%02X,%s),R0", (opcode & 15) * 2, regname[Rm]); break; case 8: util::stream_format(stream, "CMP/EQ #$%02X,R0", (opcode & 0xff)); break; case 9: util::stream_format(stream, "BT $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2); break; case 11: util::stream_format(stream, "BF $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2); break; case 13: util::stream_format(stream, "BTS $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2); break; case 15: util::stream_format(stream, "BFS $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2); break; default : util::stream_format(stream, "invalid $%04X", opcode); } return 0; }