/**************************************************************************************************
* \fn nRF_WriteTXPayload()
* \brief Send wireless packet
* Send block of 4 to be sure de SPI fifo is not overflown
*
**************************************************************************************************/
void nRF_WriteTXPayload(GPIO_Handle HandleGPIO,SPI_Handle HandleSPI,uint16_t payloadLenght)
{
uint8_t i=0;
uint8_t j=0;
uint16_t entireBlock = payloadLenght/4;
uint16_t restBlock = payloadLenght%4;
nRF_setCSN(false,HandleGPIO); // CSN pin LOW
SPI_write(HandleSPI, W_TX_PAYLOAD);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word);
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
for(i = 0; i < entireBlock; ++i){
for(j=0; j<4; ++j){SPI_write(HandleSPI, HandleRF.TXPayload[j+(4*i)]<<8);}
for(j=0;j<4;++j){
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
}
}
for(j=0; j<restBlock; ++j){SPI_write(HandleSPI, HandleRF.TXPayload[j+(4*entireBlock)]<<8);}
for(i = 0; i < restBlock; ++i){
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
}
nRF_setCSN(true,HandleGPIO);
//System_100usDelay(100);
//nRF_setCE(true,HandleGPIO); //minimum 10 us pulse to send data
//System_100usDelay(100);
//nRF_setCE(false,HandleGPIO);
}
void nRF_WriteRegister (SPI_Handle HandleSPI,GPIO_Handle HandleGPIO,uint16_t Reg,uint16_t value)
{
nRF_setCSN(false,HandleGPIO);
SPI_write(HandleSPI,W_REGISTER | Reg); //register adress
SPI_write(HandleSPI, value << 8);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait for status and junk
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
}
uint16_t nRF_ReadRegister(SPI_Handle HandleSPI,GPIO_Handle HandleGPIO,uint16_t Reg){
uint16_t answer = 0;
nRF_setCSN(false,HandleGPIO); //Set csn for spi communication
SPI_write(HandleSPI, Reg); //register adress
SPI_write(HandleSPI, Reg); //dummy data
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait for two words (STATUS + REG)
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
answer = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
return answer;
}
int main(void)
{
uint8_t tmp;
InitFifo();
USART_Config();
LED_Init();
// I2C_Configuration();
Systick_Init();
mySPI_Init();
//spi();
//Delay(1000);
printf("init SPI test \n\r");
SPI_send(0x23, 0xc9); // resetting the accelerometer internal circuit
SPI_send(0x20, 0x67); // 100Hz data update rate, block data update disable, x/y/z enabled
SPI_send(0x24, 0x20); // Anti aliasing filter bandwidth 800Hz, 16G (very sensitive), no self-test, 4-wire interface
SPI_send(0x10, 0x00); // Output(X) = Measurement(X) - OFFSET(X) * 32;
SPI_send(0x11, 0x00); // Output(Y) = Measurement(Y) - OFFSET(Y) * 32;
SPI_send(0x12, 0x00); // Output(Z) = Measurement(Z) - OFFSET(Z) * 32;
while (1)
{
//tmp = SPI_read(0x28);
//printf("x : %x \n\r",tmp);
tmp = SPI_read(0x29);
printf("x : %x \n\r",tmp);
Delay(1000);
}
}
int gameduino_init(void) {
int status;
delay(250000);
SPI_Init();
int i = 0;
while (i < 0x1000) {
SPI_write(i++, 'T');
SPI_write(i++, 'h');
SPI_write(i++, 'i');
SPI_write(i++, 'n');
SPI_write(i++, 'J');
SPI_write(i++, ' ');
}
if (SPI_read(IDENT) == 0x6d) {
// Gameduino identification read successfully:
status = 0;
} else {
// Gameduino identification could not be read; is it connected?
status = -1;
}
return status;
}
/* ------------------------------------------------------------------------ *
* SPI_EEPROM_read( src, dst, len ) *
* ------------------------------------------------------------------------ */
Int16 SPI_EEPROM_read(CSL_SpiHandle spiHandle, Uint16 src, Uint32 dst, Uint32 length )
{
Uint16 *dst_ptr;
CSL_Status result;
result = CSL_SOK;
CSL_SPI_REGS->SPICMD1 = (Uint16)0x0000 | 0;
/* Issue Write Enable command */
commandBuf[0] = (Uint16)SPI_CMD_WREN;
result |= SPI_write(spiHandle, commandBuf, 1);
CSL_SPI_REGS->SPICMD1 = (Uint16)0x0000 | length + 3 - 1;
/* Send Read command */
commandBuf[0] = (Uint16)SPI_CMD_READ;
commandBuf[1] = (Uint16)(src >> 8);
commandBuf[2] = (Uint16)src;
result |= SPI_write(spiHandle, commandBuf, 3);
/* Read the requested EEPROM page */
dst_ptr = (Uint16 *)dst;
result |= SPI_read(spiHandle, dst_ptr, length);
return (result);
}
uns8 mrf24j40_long_addr_read(uns16 addr){
uns8 result;
#ifndef __PIC32MX__
clear_pin(mrf24j40_cs_port, mrf24j40_cs_pin);
addr = addr & 0b0000001111111111; // <9:0> bits
addr = addr << 5;
set_bit(addr, 15); // long addresss
spi_hw_transmit(addr >> 8);
spi_hw_transmit(addr & 0x00ff);
result = spi_hw_receive();
set_pin(mrf24j40_cs_port, mrf24j40_cs_pin);
#endif
#ifdef __PIC32MX__
ZIGCS=0;
addr=((addr<<1)&0x7FE)|0x800;
addr<<=4;
SPI_write(addr>>8);
SPI_write(addr);
result=SPI_read();
ZIGCS=1;
#endif
return result;
}
void main (void)
{
Init_Device();
SPI0CFG |= 0x07; //8 Bits pro Master-SPI-Transfer
EA=1;
LCD_init = 1; // Bit zur Verzweigung in der ISR
P5=0x0F;
CONTROL_LCD = SMB_BUS_ERROR;
LCD_write();
P2_0 = 1;
while(1)
{
// switch(P5)
// {
// case 0x07:
// {
SPI_read();
show_display(1,ken5);
// break;
// }
//
// default:
// {
// break;
// }
// }
}
}
/**************************************************************************************************
* \fn nRF_FlushTX()
* \brief Flush TX FIFO
*
**************************************************************************************************/
void nRF_FlushTX(SPI_Handle HandleSPI,GPIO_Handle HandleGPIO)
{
nRF_setCSN(false,HandleGPIO);
SPI_write(HandleSPI, FLUSH_TX);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word); //wait
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
}
/****************************************************************************
* \brief Read status of CAN controller
*
* \return status
****************************************************************************/
uint8_t mcp_read_status()
{
volatile uint8_t retVal;
mcp_turn_on();
SPI_write(MCP_READ_STATUS);
retVal=SPI_read();
mcp_turn_off();
return retVal;
}
/**************************************************************************************************
* \fn nRF_ReadRXPayload()
* \brief Receive wireless paket from nRF24L01
*
**************************************************************************************************/
void nRF_ReadTXPayload(GPIO_Handle HandleGPIO,SPI_Handle HandleSPI)
{
uint8_t i=0;
nRF_setCSN(false,HandleGPIO); // CE pin LOW
for(i=0; i<6; i++){SPI_write(HandleSPI, R_RX_PAYLOAD);}
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word); //wait??// Command + dummy data
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI); // Read received payload
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait
HandleRF.RXPayload[0] = SPI_read(HandleSPI);
HandleRF.RXPayload[1] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_3_Words); //wait
HandleRF.RXPayload[2] = SPI_read(HandleSPI);
HandleRF.RXPayload[3] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
// Count the received packets
}
u8 enc28j60ReadOp(u8 op, u8 address)
{
u8 received_byte;
CSACTIVE;
// issue read command
SPI_write(op | (address & ADDR_MASK));
// read data
received_byte=SPI_read();
// do dummy read if needed (for mac and mii, see datasheet page 29)
if(address & 0x80)
{
received_byte=SPI_read();
}
// release CS
CSPASSIVE;
return(received_byte);
}
uint8_t MPU6500_readOneByte(uint8_t registerAddr)
{
// 1st element: set 8th bit to indicate reading
// 2nd element: 0x0 for the second clock frame to read data, because
// it takes 16 clocks to read data
uint8_t tmp[2] = {registerAddr | 0x80, 0x0};
SPI_read(IMU_SPI_SLAVE_ID, tmp, 2); // read from the register and store in tmp
return tmp[1];
}
uint8_t mcp2515_read_status(void){
SPI_chipselect(1);
SPI_write(MCP_READ_STATUS);
uint8_t val = SPI_read();
SPI_chipselect(0);
return val;
}
uint8_t mcp2515_read(uint8_t addr){
SPI_chipselect(1);
SPI_write(MCP_READ);
SPI_write(addr);
uint8_t val = SPI_read();
SPI_chipselect(0);
return val;
}
color_t ST7735_getColor(u8 module, u8 x, u8 y)
{
color_t color;
u8 ch, cl;
if ( x >= ST7735_WIDTH || y >= (ST7735_HEIGHT) ) return;
ST7735_low(ST7735[module].pin.cs); // Chip select
ST7735_low(ST7735[module].pin.dc); // COMMAND = 0
SPI_write(module,ST7735_CASET); // set column range (x0,x1)
ST7735_high(ST7735[module].pin.dc); // DATA = 1
SPI_write(module,0x00);
SPI_write(module,x);
SPI_write(module,0x00);
SPI_write(module,x);
ST7735_low(ST7735[module].pin.dc); // COMMAND = 0
SPI_write(module,ST7735_RASET); // set row range (y0,y1)
ST7735_high(ST7735[module].pin.dc); // DATA = 1
SPI_write(module,0x00);
SPI_write(module,y);
SPI_write(module,0x00);
SPI_write(module,y);
ST7735_low(ST7735[module].pin.dc); // COMMAND = 0
SPI_write(module,ST7735_RAMRD); // Read RAM
ST7735_high(ST7735[module].pin.dc); // DATA = 1
ch = SPI_read(module);
cl = SPI_read(module);
color.c = make16(ch, cl);
ST7735_high(ST7735[module].pin.cs); // Chip deselected
return color;
}
//-------------------------------------------------------------------------------------------------------
// BYTE halSpiReadReg(BYTE addr)
//
// DESCRIPTION:
// This function gets the value of a single specified CC1100 register.
//
// ARGUMENTS:
// BYTE addr
// Address of the CC1100 register to be accessed.
//
// RETURN VALUE:
// BYTE
// Value of the accessed CC1100 register.
//-------------------------------------------------------------------------------------------------------
BYTE halSpiReadReg(BYTE addr)
{
unsigned char value;
DDB0=0;
while(DDB3);
DDB2=0;
addr|=READ_SINGLE;
SPI_write(addr);
value=SPI_read();
DDB0=1;
DDB2=0;
DDB2=0;
return value;
}
uint16_t EEPROM25AA02_spiTransferByte(EEPROM25AA02_Handle handle, const uint16_t data){
EEPROM25AA02_Obj *obj = (EEPROM25AA02_Obj *)handle;
volatile uint16_t ReadByte;
SPI_write(obj->spiHandle, (data & 0xFF) << 8);
while(1){
if(SPI_getIntFlagStatus(obj->spiHandle)==SPI_IntFlagStatus_Completed){
ReadByte = SPI_read(obj->spiHandle);
break;
}
}
return ReadByte;
}
//-------------------------------------------------------------------------------------------------------
// BYTE halSpiReadStatus(BYTE addr)
//
// DESCRIPTION:
// This function reads a CC1100 status register.
//
// ARGUMENTS:
// BYTE addr
// Address of the CC1100 status register to be accessed.
//
// RETURN VALUE:
// BYTE
// Value of the accessed CC1100 status register.
//-------------------------------------------------------------------------------------------------------
BYTE halSpiReadStatus(BYTE addr)
{
unsigned char value;
DDB0=0;
while(DDB3);
DDB2=0;
addr|=READ_BURST;
SPI_write(addr);
value=SPI_read();
DDB0=1;
DDB2=0;
DDB2=0;
return value;
}// halSpiReadStatus
/****************************************************************************
* \brief Read data from CAN controller
*
* \param in address from which shall be read
* \return data
****************************************************************************/
uint8_t mcp_read(uint8_t address)
{
volatile uint8_t retVal;
mcp_turn_on();
SPI_write(MCP_READ);
SPI_write(address);
retVal = SPI_read();
mcp_turn_off();
return retVal;
}
//-------------------------------------------------------------------------------------------------------
// void halSpiReadBurstReg(BYTE addr, BYTE *buffer, BYTE count)
//
// DESCRIPTION:
// This function reads multiple CC1100 register, using SPI burst access.
//
// ARGUMENTS:
// BYTE addr
// Address of the first CC1100 register to be accessed.
// BYTE *buffer
// Pointer to a byte array which stores the values read from a
// corresponding range of CC1100 registers.
// BYTE count
// Number of bytes to be written to the subsequent CC1100 registers.
//-------------------------------------------------------------------------------------------------------
void halSpiReadBurstReg(BYTE addr, BYTE *buffer, BYTE count)
{
unsigned char j,value;
DDB0=0;
while(DDB3);
DDB2=0;
addr|=READ_BURST;
SPI_write(addr);
for(j=0;j<count;j++)
{
value=SPI_read();
buffer[j]=value;
}
DDB0=1;
}// halSpiReadBurstReg
void enc28j60ReadBuffer(u16 len, u8* buffer)
{
u8 received_byte;
CSACTIVE;
// issue read command
SPI_write( ENC28J60_READ_BUF_MEM );
while(len)
{
len--;
// read data
received_byte=SPI_read();
*buffer = received_byte;
buffer++;
}
*buffer='\0';
CSPASSIVE;
}
uns8 mrf24j40_short_addr_read(uns8 addr)
{
#ifndef __PIC32MX__
clear_pin(mrf24j40_cs_port, mrf24j40_cs_pin);
addr = addr & 0b00111111; // <5:0> bits
addr = addr << 1; // LSB = 0, means read
spi_hw_transmit(addr);
uns8 result = spi_hw_receive();
set_pin(mrf24j40_cs_port, mrf24j40_cs_pin);
#endif
#ifdef __PIC32MX__
addr = (addr << 1) & 0x7E;
ZIGCS=0; // CS must be held low while communicationg with MRF24J40
SPI_write(addr);
u8 result = SPI_read();
ZIGCS=1; // end of communication
#endif
return result;
}
void updateAccel()
{
accel.x = SPI_read(ACCEL_OUT_XL);
accel.x |= (SPI_read(ACCEL_OUT_XH) << 8);
accel.y = SPI_read(ACCEL_OUT_YL);
accel.y |= (SPI_read(ACCEL_OUT_YH) << 8);
accel.z = SPI_read(ACCEL_OUT_ZL);
accel.z |= (SPI_read(ACCEL_OUT_ZH) << 8);
// DBG1("Ax %d", accel.x);
// DBG1("Ay %d", accel.y);
// DBG1("Az %d", accel.z);
}
static PyObject *SPIDev_read(SPIDev *self, PyObject *args, PyObject *kwds) {
uint8_t cs;
uint32_t n_bytes, n_words, i, word;
PyObject *data, *word_obj;
void *rxbuf;
if(!PyArg_ParseTuple(args, "bI", &cs, &n_words)) {
return NULL;
}
if (SPIDev_activateCS(self, cs) < 0) return NULL;
n_bytes = (uint32_t) (((float) (self->bits_per_word * n_words)) / 8.0 + 0.5);
rxbuf = malloc(n_bytes);
SPI_read(self->spidev_fd[cs], rxbuf, n_words);
data = PyList_New(0);
for (i=0; i<n_words; i++) {
switch(self->bytes_per_word) {
case 1:
word = ((uint8_t*)rxbuf)[i];
break;
case 2:
word = ((uint16_t*)rxbuf)[i];
break;
case 4:
word = ((uint32_t*)rxbuf)[i];
break;
default:
word = 0;
break;
}
word_obj = PyInt_FromLong(word);
PyList_Append(data, word_obj);
Py_DECREF(word_obj);
}
free(rxbuf);
return data;
}
/** ===========================================================================
* @n@b SPI_dataTransaction
*
* @b Description
* @n This function read or Write data to specified device.
*
* @b Arguments
* @verbatim
spiHandle Handle to the spi
writeBuff Pointer to the write buffer.
buffLen Maximum read buffer size.
readOrWrite Read or write command.
@endverbatim
*
* <b> Return Value </b> CSL_Status
* @li CSL_SOK - transation success
* @li CSL_ESYS_BADHANDLE - Invalid handle
*
*
* <b> Pre Condition </b>
* This function can after SPI_open function.
*
* <b> Post Condition </b>
* @n SPI_deInit can be call after this function call.
*
* @b Modifies
* @n
*
* @b Example
* @verbatim
CSL_SpiHandle hSpi;
Uint16 writeBuff[size];
Uint16 buffLen;
SPI_Command readOrWrite
CSL_status status;
...
...
status = SPI_dataTransaction(hSpi, &rwBuffer,
rwBufLen, readOrWrite);
@endverbatim
* ===========================================================================
*/
CSL_Status SPI_dataTransaction(CSL_SpiHandle hSpi,
Uint16 *rwBuffer,
Uint16 rwBufLen,
SPI_Command readOrWrite)
{
CSL_Status status;
if(NULL == hSpi)
{
return (CSL_ESYS_BADHANDLE);
}
if((NULL == rwBuffer) || (0 == rwBufLen))
{
return (CSL_ESYS_INVPARAMS);
}
if(FALSE == hSpi->configured)
{
return (CSL_ESYS_INVPARAMS);
}
/* Read data from registers */
if(SPI_READ_CMD == readOrWrite)
{
status = SPI_read(hSpi, rwBuffer, rwBufLen);
}
/* Write data to registers */
else if(SPI_WRITE_CMD == readOrWrite)
{
status = SPI_write(hSpi, rwBuffer, rwBufLen);
}
else
{
status = CSL_ESYS_INVPARAMS;
}
return (status);
}
void nRF_ReadRXADDR(GPIO_Handle HandleGPIO,SPI_Handle HandleSPI, uint16_t pipe)
{
uint8_t i=0;
nRF_setCSN(false,HandleGPIO);
for(i=0; i<6; i++){SPI_write(HandleSPI, pipe); }
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word); //wait??
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait??
HandleRF.RXADDR[0] = SPI_read(HandleSPI);
HandleRF.RXADDR[1] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_3_Words); //wait??
HandleRF.RXADDR[2] = SPI_read(HandleSPI);
HandleRF.RXADDR[3] = SPI_read(HandleSPI);
HandleRF.RXADDR[4] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
}
void nRF_WriteRXADDR(SPI_Handle HandleSPI,GPIO_Handle HandleGPIO, uint8_t uiID, uint16_t pipe)
{
unsigned int i=0;
nRF_setCSN(false,HandleGPIO);
SPI_write(HandleSPI, W_REGISTER | pipe); //register adress
for(i=0; i<4; i++){SPI_write(HandleSPI, 0xE700);}SPI_write(HandleSPI, 0xE000 | (uiID<<8));
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word); //wait
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait
HandleRF.Reg[R_JUNK]= SPI_read(HandleSPI);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_3_Words); //wait
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
}
void bbio::getEncoders(double *v) {
SPI_read();
for (int i=0; i<NUM_ADC_PORT; i++) {
v[i] = SPI_sensor_value[0][i];
}
}
void bbio::getEncoder(int j, double *v){
SPI_read();
if (j < NUM_ADC_PORT) {
(*v) = SPI_sensor_value[0][j];
}
}
