static int imx_ssi_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
/* we cant really change any SSI values after SSI is enabled
* need to fix in software for max flexibility - lrg */
if (cpu_dai->playback.active || cpu_dai->capture.active)
return 0;
/* reset the SSI port - Sect 45.4.4 */
if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) {
if (ssi_active[SSI1_PORT]++)
return 0;
__raw_writel(0, SSI1_SCR);
ssi1_clk = clk_get(NULL, "ssi_clk.0");
clk_enable(ssi1_clk);
/* BIG FAT WARNING
* SDMA FIFO watermark must == SSI FIFO watermark for
* best results.
*/
__raw_writel((SSI_SFCSR_RFWM1(SSI_RXFIFO_WATERMARK) |
SSI_SFCSR_RFWM0(SSI_RXFIFO_WATERMARK) |
SSI_SFCSR_TFWM1(SSI_TXFIFO_WATERMARK) |
SSI_SFCSR_TFWM0(SSI_TXFIFO_WATERMARK)),
SSI1_SFCSR);
__raw_writel(0, SSI1_SIER);
} else {
if (ssi_active[SSI2_PORT]++)
return 0;
__raw_writel(0, SSI2_SCR);
ssi2_clk = clk_get(NULL, "ssi_clk.1");
clk_enable(ssi2_clk);
/* above warning applies here too */
__raw_writel((SSI_SFCSR_RFWM1(SSI_RXFIFO_WATERMARK) |
SSI_SFCSR_RFWM0(SSI_RXFIFO_WATERMARK) |
SSI_SFCSR_TFWM1(SSI_TXFIFO_WATERMARK) |
SSI_SFCSR_TFWM0(SSI_TXFIFO_WATERMARK)),
SSI2_SFCSR);
__raw_writel(0, SSI2_SIER);
}
SSI_DUMP();
return 0;
}
static int imx_ssi_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *cpu_dai)
{
struct imx_ssi *priv = (struct imx_ssi *)cpu_dai->private_data;
void __iomem *ioaddr = priv->ioaddr;
/* we cant really change any SSI values after SSI is enabled
* need to fix in software for max flexibility - lrg */
if (cpu_dai->playback.active || cpu_dai->capture.active)
return 0;
/* reset the SSI port - Sect 45.4.4 */
if (clk_get_usecount(priv->ssi_clk) != 0) {
clk_enable(priv->ssi_clk);
return 0;
}
__raw_writel(0, ioaddr + SSI_SCR);
clk_enable(priv->ssi_clk);
/* BIG FAT WARNING
* SDMA FIFO watermark must == SSI FIFO watermark for best results.
*/
__raw_writel((SSI_SFCSR_RFWM1(SSI_RXFIFO_WATERMARK) |
SSI_SFCSR_RFWM0(SSI_RXFIFO_WATERMARK) |
SSI_SFCSR_TFWM1(SSI_TXFIFO_WATERMARK) |
SSI_SFCSR_TFWM0(SSI_TXFIFO_WATERMARK)),
ioaddr + SSI_SFCSR);
__raw_writel(0, ioaddr + SSI_SIER);
SSI_DUMP();
return 0;
}