static int mtk_pcm_i2s0_start(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; uint32 u32AudioI2S = 0; AudDrv_Clk_On(); SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream); if (runtime->format == SNDRV_PCM_FORMAT_S32_LE || runtime->format == SNDRV_PCM_FORMAT_S32_LE) { SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA); } else { SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_16_BIT); } SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O00); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O01); // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O01); u32AudioI2S = SampleRateTransform(runtime->rate) << 8; u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; // us3 I2s format u32AudioI2S |= Soc_Aud_I2S_WLEN_WLEN_32BITS << 1; // 32 BITS if (mi2s0_hdoutput_control == true) { u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } printk(" u32AudioI2S= 0x%x\n", u32AudioI2S); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); SetSampleRate(Soc_Aud_Digital_Block_MEM_DL1, runtime->rate); SetChannels(Soc_Aud_Digital_Block_MEM_DL1, runtime->channels); SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, true); // here to set interrupt SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->period_size); SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate); SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true); EnableAfe(true); return 0; }
static int mtk_uldlloopback_pcm_prepare(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; //uint32 eSamplingRate = SampleRateTransform(runtime->rate); //uint32 dVoiceModeSelect = 0; //uint32 Audio_I2S_Dac = 0; uint32 u32AudioI2S = 0; if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { printk("%s with mtk_uldlloopback_pcm_prepare \n", __func__); return 0; } printk("%s rate = %d\n", __func__, runtime->rate); Afe_Set_Reg(AFE_TOP_CON0, 0x00000000, 0xffffffff); if (runtime->format == SNDRV_PCM_FORMAT_S32_LE || runtime->format == SNDRV_PCM_FORMAT_U32_LE) { SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O03); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O04); } else { SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_16_BIT); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O03); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O04); } // interconnection setting SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O01); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O03); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O04); Afe_Set_Reg(AFE_ADDA_TOP_CON0, 0, 0x1); //Using Internal ADC u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode u32AudioI2S |= SampleRateTransform(runtime->rate) << 8; u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; // us3 I2s format u32AudioI2S |= Soc_Aud_I2S_WLEN_WLEN_32BITS << 1; // 32 BITS printk("u32AudioI2S= 0x%x\n", u32AudioI2S); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); // start I2S DAC out if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC) == false) { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true); SetI2SDacOut(substream->runtime->rate, false, Soc_Aud_I2S_WLEN_WLEN_32BITS); SetI2SDacEnable(true); } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true); } if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC) == false) { ConfigAdcI2S(substream); SetI2SAdcIn(&mAudioDigitalI2S); SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, true); SetI2SAdcEnable(true); } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, true); } EnableAfe(true); return 0; }
static int Audio_i2s0_SideGen_Set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { uint32 u32AudioI2S = 0, MclkDiv0, MclkDiv3, REG448 = 0, REG44C = 0; uint32 samplerate = 0; AudDrv_Clk_On(); printk("%s() mi2s0_hdoutput_control = %d\n", __func__, mi2s0_hdoutput_control); if (ucontrol->value.enumerated.item[0] > ARRAY_SIZE(i2s0_SIDEGEN)) { printk("return -EINVAL\n"); return -EINVAL; } mi2s0_sidegen_control = ucontrol->value.integer.value[0]; if (mi2s0_sidegen_control == 1) { samplerate = 48000; } else if (mi2s0_sidegen_control == 2) { samplerate = 44100; } else if (mi2s0_sidegen_control == 3) { samplerate = 32000; } else if (mi2s0_sidegen_control == 4) { samplerate = 16000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); } else if (mi2s0_sidegen_control == 5) { samplerate = 8000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); } else if (mi2s0_sidegen_control == 6) { samplerate = 16000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); printk("%s() Soc_Aud_InterCon_Connection I01 O14\n", __func__); //phone call echo reference connection: I0/I1->O13/O14(HW Gain1)->I11 ->O24 SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O14);//0x448, 0x10000 REG448 = Afe_Get_Reg(AFE_GAIN1_CONN2); printk("%s() AFE_GAIN1_CONN2 (0X448) =0x%x\n", __func__, REG448); printk("%s() Soc_Aud_InterCon_Connection I11 O24\n", __func__); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I11, Soc_Aud_InterConnectionOutput_O24);//0x44c, 0x8 REG44C = Afe_Get_Reg(AFE_GAIN1_CONN3); printk("%s() AFE_GAIN1_CONN3 (0X44C) =0x%x\n", __func__, REG44C); // Set HW_GAIN1 SetHwDigitalGainMode(Soc_Aud_Hw_Digital_Gain_HW_DIGITAL_GAIN1, samplerate, 0x80); SetHwDigitalGainEnable(Soc_Aud_Hw_Digital_Gain_HW_DIGITAL_GAIN1, true); SetHwDigitalGain(0x80000, Soc_Aud_Hw_Digital_Gain_HW_DIGITAL_GAIN1); Afe_Set_Reg(AFE_DAC_CON1, 0x400, 0xF00); } if (mi2s0_sidegen_control != 0) { printk("%s() mi2s0_sidegen_control=%d, mi2s0_hdoutput_control=%d\n", __func__, mi2s0_sidegen_control, mi2s0_hdoutput_control); AudDrv_Clk_On(); Afe_Set_Reg(AUDIO_TOP_CON1, 0x2, 0x2); // I2S_SOFT_Reset Afe_Set_Reg(AUDIO_TOP_CON1, 0x1 << 4, 0x1 << 4); // I2S_SOFT_Reset uint32 Audio_I2S_Dac = 0; SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, samplerate); Audio_I2S_Dac |= (Soc_Aud_LR_SWAP_NO_SWAP << 31); // Audio_I2S_Dac |= (Soc_Aud_INV_BCK_INVESE << 29);//BCK Inv Audio_I2S_Dac |= (Soc_Aud_I2S_IN_PAD_SEL_I2S_IN_FROM_IO_MUX << 28);//I2S in from io_mux Audio_I2S_Dac |= (Soc_Aud_INV_LRCK_NO_INVERSE << 5); Audio_I2S_Dac |= (Soc_Aud_I2S_FORMAT_I2S << 3); Audio_I2S_Dac |= (Soc_Aud_I2S_WLEN_WLEN_32BITS << 1); u32AudioI2S = SampleRateTransform(samplerate) << 8; u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; // us3 I2s format u32AudioI2S |= Soc_Aud_I2S_WLEN_WLEN_32BITS << 1; // 32 BITS if (mi2s0_hdoutput_control == true) { printk("%s() mi2s0_sidegen_control = %d set low jitter\n", __func__, mi2s0_sidegen_control); MclkDiv0 = SetCLkMclk(Soc_Aud_I2S0, samplerate); //select I2S SetCLkBclk(MclkDiv0, samplerate, 2, Soc_Aud_I2S_WLEN_WLEN_32BITS); MclkDiv3 = SetCLkMclk(Soc_Aud_I2S3, samplerate); //select I2S SetCLkBclk(MclkDiv3, samplerate, 2, Soc_Aud_I2S_WLEN_WLEN_32BITS); u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode Audio_I2S_Dac |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } else { printk("%s() mi2s0_sidegen_control = %d NOT set low jitter\n", __func__, mi2s0_sidegen_control); u32AudioI2S &= ~(Soc_Aud_LOW_JITTER_CLOCK << 12) ; Audio_I2S_Dac &= ~(Soc_Aud_LOW_JITTER_CLOCK << 12) ; } // start I2S DAC out if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { printk("%s(), mi2s0_sidegen_control=%d, write AFE_I2S_CON (0x%x), AFE_I2S_CON3(0x%x)\n", __func__, mi2s0_sidegen_control, Audio_I2S_Dac, u32AudioI2S); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0 << 4, 0x1 << 4); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0, 0x2); // I2S_SOFT_Reset EnableAfe(true); } else { printk("%s(), mi2s0_sidegen_control=%d, write AFE_I2S_CON (0x%x), AFE_I2S_CON3(0x%x)\n", __func__, mi2s0_sidegen_control, Audio_I2S_Dac, u32AudioI2S); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0 << 4, 0x1 << 4); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0, 0x2); // I2S_SOFT_Reset EnableAfe(true); } } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, false); if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { if (mi2s0_hdoutput_control == true) { Afe_Set_Reg(AFE_I2S_CON3, 0, 1 << 12); //Clear Low jitter mode setting } Afe_Set_Reg(AFE_I2S_CON3, 0x0, 0x1); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); EnableAfe(false); } AudDrv_Clk_Off(); } AudDrv_Clk_Off(); return 0; }
static int mtk_pcm_I2S0dl1_prepare(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; uint32 Audio_I2S_Dac = 0, MclkDiv0, MclkDiv3; uint32 u32AudioI2S = 0; if (mPrepareDone == false) { pr_debug("%s format = %d SNDRV_PCM_FORMAT_S32_LE = %d SNDRV_PCM_FORMAT_U32_LE = %d \n", __func__, runtime->format, SNDRV_PCM_FORMAT_S32_LE, SNDRV_PCM_FORMAT_U32_LE); SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream); if (runtime->format == SNDRV_PCM_FORMAT_S32_LE || runtime->format == SNDRV_PCM_FORMAT_U32_LE) { SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O03); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O04); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O00); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O01); } else { SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_16_BIT); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O03); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O04); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O00); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O01); } SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O00); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O01); SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, runtime->rate); Audio_I2S_Dac |= (Soc_Aud_LR_SWAP_NO_SWAP << 31); if (mI2S0dl1_hdoutput_control == true) { MclkDiv0 = SetCLkMclk(Soc_Aud_I2S0, runtime->rate); //select I2S SetCLkBclk(MclkDiv0, runtime->rate, runtime->channels, Soc_Aud_I2S_WLEN_WLEN_32BITS); Audio_I2S_Dac |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } else { Audio_I2S_Dac &= ~(Soc_Aud_LOW_JITTER_CLOCK << 12) ; } Audio_I2S_Dac |= (Soc_Aud_I2S_IN_PAD_SEL_I2S_IN_FROM_IO_MUX << 28);//I2S in from io_mux Audio_I2S_Dac |= (Soc_Aud_INV_LRCK_NO_INVERSE << 5); Audio_I2S_Dac |= (Soc_Aud_I2S_FORMAT_I2S << 3); Audio_I2S_Dac |= (Soc_Aud_I2S_WLEN_WLEN_32BITS << 1); // I2S out Setting u32AudioI2S = SampleRateTransform(runtime->rate) << 8; u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; // us3 I2s format u32AudioI2S |= Soc_Aud_I2S_WLEN_WLEN_32BITS << 1; // 32 BITS if (mI2S0dl1_hdoutput_control == true) { MclkDiv3 = SetCLkMclk(Soc_Aud_I2S3, runtime->rate); //select I2S SetCLkBclk(MclkDiv3, runtime->rate, runtime->channels, Soc_Aud_I2S_WLEN_WLEN_32BITS); u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } else { u32AudioI2S &= ~(Soc_Aud_LOW_JITTER_CLOCK << 12) ; } if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); } // start I2S DAC out if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC) == false) { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true); SetI2SDacOut(substream->runtime->rate); SetI2SDacEnable(true); } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true); } // here to set interrupt_distributor SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->period_size); SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate); EnableAfe(true); mPrepareDone = true; } return 0; }
static int Audio_i2s0_SideGen_Set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { uint32 u32AudioI2S = 0; uint32 samplerate = 0; uint32 Audio_I2S_Dac; AudDrv_Clk_On(); printk("%s() samplerate = %d mi2s0_hdoutput_control = %d\n", __func__, samplerate, mi2s0_hdoutput_control); if (ucontrol->value.enumerated.item[0] > ARRAY_SIZE(i2s0_SIDEGEN)) { printk("return -EINVAL\n"); return -EINVAL; } mi2s0_sidegen_control = ucontrol->value.integer.value[0]; if (mi2s0_sidegen_control == 1) { samplerate = 48000; } else if (mi2s0_sidegen_control == 2) { samplerate = 44100; } else if (mi2s0_sidegen_control == 3) { samplerate = 32000; } else if (mi2s0_sidegen_control == 4) { samplerate = 16000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); } else if (mi2s0_sidegen_control == 5) { samplerate = 8000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); } if (mi2s0_sidegen_control) { AudDrv_Clk_On(); Afe_Set_Reg(AUDIO_TOP_CON1, 0x2, 0x2); // I2S_SOFT_Reset Afe_Set_Reg(AUDIO_TOP_CON1, 0x1 << 4, 0x1 << 4); // I2S_SOFT_Reset Audio_I2S_Dac = 0; SetCLkMclk(Soc_Aud_I2S0, samplerate); SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, samplerate); Audio_I2S_Dac |= (Soc_Aud_LR_SWAP_NO_SWAP << 31); if (mi2s0_hdoutput_control == true) { Audio_I2S_Dac |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } else { Audio_I2S_Dac |= Soc_Aud_NORMAL_CLOCK << 12 ; //Low jitter mode } Audio_I2S_Dac |= (Soc_Aud_INV_LRCK_NO_INVERSE << 5); Audio_I2S_Dac |= (Soc_Aud_I2S_FORMAT_I2S << 3); Audio_I2S_Dac |= (Soc_Aud_I2S_WLEN_WLEN_32BITS << 1); u32AudioI2S = SampleRateTransform(samplerate) << 8; u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; // us3 I2s format u32AudioI2S |= Soc_Aud_I2S_WLEN_WLEN_32BITS << 1; // 32 BITS if (mi2s0_hdoutput_control == true) { u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } else { u32AudioI2S |= Soc_Aud_NORMAL_CLOCK << 12 ; //Low jitter mode } // start I2S DAC out if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0 << 4, 0x1 << 4); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0, 0x2); // I2S_SOFT_Reset EnableAfe(true); } else { printk("%s(), mi2s0_sidegen_control=%d, write AFE_I2S_CON (0x%x), AFE_I2S_CON3(0x%x)\n", __func__, mi2s0_sidegen_control, Audio_I2S_Dac, u32AudioI2S); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0 << 4, 0x1 << 4); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0, 0x2); // I2S_SOFT_Reset EnableAfe(true); } } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, false); if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { Afe_Set_Reg(AFE_I2S_CON3, 0x0, 0x1); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); EnableAfe(false); } AudDrv_Clk_Off(); } AudDrv_Clk_Off(); return 0; }
static int mtk_pcm_I2S0dl1_prepare(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; uint32 MclkDiv3; uint32 u32AudioI2S = 0; bool mI2SWLen; if (mPrepareDone == false) { printk("%s format = %d SNDRV_PCM_FORMAT_S32_LE = %d SNDRV_PCM_FORMAT_U32_LE = %d \n", __func__, runtime->format, SNDRV_PCM_FORMAT_S32_LE, SNDRV_PCM_FORMAT_U32_LE); SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream); if (runtime->format == SNDRV_PCM_FORMAT_S32_LE || runtime->format == SNDRV_PCM_FORMAT_U32_LE) { SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O03); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O04); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O00); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_24BIT, Soc_Aud_InterConnectionOutput_O01); mI2SWLen = Soc_Aud_I2S_WLEN_WLEN_32BITS; } else { SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_16_BIT); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O03); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O04); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O00); SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O01); mI2SWLen = Soc_Aud_I2S_WLEN_WLEN_16BITS; } SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, runtime->rate); // I2S out Setting u32AudioI2S = SampleRateTransform(runtime->rate) << 8; u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; // us3 I2s format u32AudioI2S |= Soc_Aud_I2S_WLEN_WLEN_32BITS << 1; //32bit if (mI2S0dl1_hdoutput_control == true) { printk("%s mI2S0dl1_hdoutput_control == %d\n", __func__, mI2S0dl1_hdoutput_control); // open apll EnableApll(runtime->rate, true); EnableApllTuner(runtime->rate, true); MclkDiv3 = SetCLkMclk(Soc_Aud_I2S1, runtime->rate); //select I2S MclkDiv3 = SetCLkMclk(Soc_Aud_I2S3, runtime->rate); //Todo do we need open I2S3? //Following wil not affect hw. because I2S0-I2S3 BCK is generated by APLL1 DIV0 APLL2 Div0 SetCLkBclk(MclkDiv3, runtime->rate, runtime->channels, Soc_Aud_I2S_WLEN_WLEN_32BITS); EnableI2SDivPower(AUDIO_APLL12_DIV2, true); EnableI2SDivPower(AUDIO_APLL12_DIV4, true); //Todo do we need open I2S3? u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } else { u32AudioI2S &= ~(Soc_Aud_LOW_JITTER_CLOCK << 12) ; } if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); //Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); //K2 TODO: fix fm playback then mp3, i2s_con is misconfigured... Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); } // start I2S DAC out if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC) == false) { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true); SetI2SDacOut(substream->runtime->rate, mI2S0dl1_hdoutput_control, mI2SWLen); SetI2SDacEnable(true); } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true); } // here to set interrupt_distributor SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->period_size); SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate); EnableAfe(true); mPrepareDone = true; } return 0; }