void ADC::AddJConversion(ADC_CHANNEL channel, ADC_SAMPLE_TIME sampleTime)
{
SetChannelSampleTime(channel, sampleTime);
int current = 0x3 & (*_pADC_JSQR >> 20);
if (current == 3)
{
return;
}
int seqno = 0x3 & (current + 1);
if (_emptyJSequence)
{
seqno = 0;
_emptyJSequence = false;
}
*_pADC_JSQR &= ~(0x3 << 20);
*_pADC_JSQR |= (seqno << 20);
int sqr_shift = (3 - seqno) * 5;
*_pADC_JSQR |= ((0xff & channel) << sqr_shift);
}
void ADC::AddConversion(ADC_CHANNEL channel, ADC_SAMPLE_TIME sampleTime)
{
SetChannelSampleTime(channel, sampleTime);
int current = 0xf & (*_pADC_SQR1 >> 20);
if (current == 0xf)
{
return;
}
int seqno = 0xf & (current + 1);
if (_emptySequence)
{
seqno = 0;
_emptySequence = false;
}
*_pADC_SQR1 &= ~(0xf << 20);
*_pADC_SQR1 |= (seqno << 20);
volatile uint32_t* pADC_SQR;
int sqr = 3 - seqno / 6;
int sqr_shift = (seqno % 6) * 5;
if (sqr == 3)
{
pADC_SQR = _pADC_SQR3;
}
else if (sqr == 2)
{
pADC_SQR = _pADC_SQR2;
}
else if (sqr == 1)
{
pADC_SQR = _pADC_SQR1;
}
else
{
//throw STM32F1_Exception ("Error setting ADC conversion sequence");
pADC_SQR = 0;
}
if (pADC_SQR != 0)
{
*pADC_SQR |= ((0xff & channel) << sqr_shift);
}
}
void Adc_t::Init() {
rccEnableADC1(FALSE); // Enable digital clock
SetupClk(ADC_CLK_DIVIDER); // Setup ADCCLK
// Setup channels
SetSequenceLength(ADC_SEQ_LEN);
uint8_t SeqIndx = 1; // First sequence item is 1, not 0
for(uint8_t i=0; i < ADC_CHANNEL_CNT; i++) {
SetChannelSampleTime(AdcChannels[i], ADC_SAMPLE_TIME);
for(uint8_t j=0; j<ADC_SAMPLE_CNT; j++) SetSequenceItem(SeqIndx++, AdcChannels[i]);
}
// ==== DMA ====
dmaStreamAllocate (ADC_DMA, IRQ_PRIO_LOW, AdcTxIrq, NULL);
dmaStreamSetPeripheral(ADC_DMA, &ADC1->DR);
dmaStreamSetMode (ADC_DMA, ADC_DMA_MODE);
}
void Adc_t::Init() {
rccEnableADC123(FALSE); // Enable AHB clock
// Setup ADC clock: PLLSAI1 "R" selected as ADC clk
MODIFY_REG(RCC->CCIPR, RCC_CCIPR_ADCSEL, RCC_CCIPR_ADCSEL_0);
// Setup PLL
if(Clk.SetupPllSai1(16, 8) != OK) return;
Clk.EnableSai1ROut();
// Power-on ADC
CLEAR_BIT(ADC1->CR, ADC_CR_DEEPPWD); // Exit deep power-down mode
SET_BIT(ADC1->CR, ADC_CR_ADVREGEN); // Enable ADC internal voltage regulator
chThdSleepMicroseconds(20);
// Setup channels
SetSequenceLength(ADC_SEQ_LEN);
for(uint8_t i=0; i < ADC_CHANNEL_CNT; i++) {
SetChannelSampleTime(AdcChannels[i], ADC_SAMPLE_TIME);
SetSequenceItem(i+1, AdcChannels[i]); // First sequence item is 1, not 0
}
// ==== DMA ====
dmaStreamAllocate (ADC_DMA, IRQ_PRIO_LOW, AdcTxIrq, NULL);
dmaStreamSetPeripheral(ADC_DMA, &ADC1->DR);
dmaStreamSetMode (ADC_DMA, ADC_DMA_MODE);
}
