void C_UART::Configure(int rate,void (*p)())
{
if(!IsvalidBitRate(rate) || p == NULL || HaveConfigured)
{
return;
}
BitRate = rate;
UartConfig(Channel,BitRate);
if(Channel == 0)
{
FullDuplex = true;
}
else
{
FullDuplex = false;
//485 CONTROL LINE,半双工需要一个
//开关来控制数据的接收和发送
gpio_set_port_output(45);
}
SetInterruptPriority(UartIntNumber[Channel],1);
vgSetInterrupt(UartIntNumber[Channel],p);
EnableReceData();
//enable data receive interrupt
*(UIE[Channel]) = 0x01;
vgEnableInterrupt(UartIntNumber[Channel],true);
HaveConfigured = true;
}
static void SetVGAHorizontalSync31kHzAtInterrupt(InterruptHandler *handler,int dier)
{
WaitForLastLineIfVGAEnabled();
TIM2->DIER=dier;
TIM2->CCER=TIM_CCER_CC4E|TIM_CCER_CC4P; // Channel 4 enabled, reversed polarity (active low).
// Enable HSync timer interrupt and set highest priority.
InstallInterruptHandler(TIM2_IRQn,handler);
EnableInterrupt(TIM2_IRQn);
SetInterruptPriority(TIM2_IRQn,0);
}
static void SetVGAHorizontalSync31kHzActiveHighAtInterrupt(InterruptHandler *handler,int dier)
{
WaitForLastLineIfVGAEnabled();
TIM2->DIER=dier; // Enable update interrupt.
TIM2->CCER=TIM_CCER_CC4E; // Channel 4 enabled, normal polarity (active high).
// Enable HSync timer interrupt and set highest priority.
InstallInterruptHandler(TIM2_IRQn,handler);
EnableInterrupt(TIM2_IRQn);
SetInterruptPriority(TIM2_IRQn,0);
}
static void InitializePixelDMA(int pixelclock)
{
// Configure timer 8 as the pixel clock.
TIM8->CR1=TIM_CR1_ARPE;
TIM8->DIER=TIM_DIER_UDE; // Enable update DMA request.
TIM8->PSC=0; // Prescaler = 1
TIM8->ARR=pixelclock-1; // TODO: Should this be -1?
// DMA2 stream 1 channel 7 is triggered by timer 8.
// Stop it and configure interrupts.
DMA2_Stream1->CR&=~DMA_SxCR_EN;
InstallInterruptHandler(DMA2_Stream1_IRQn,DMACompleteHandler);
EnableInterrupt(DMA2_Stream1_IRQn);
SetInterruptPriority(DMA2_Stream1_IRQn,0);
}
void PlayAudioWithCallback(AudioCallbackFunction *callback,void *context)
{
StopAudioDMA();
InstallInterruptHandler(DMA1_Stream7_IRQn,DMACompleteHandler);
EnableInterrupt(DMA1_Stream7_IRQn);
SetInterruptPriority(DMA1_Stream7_IRQn,4);
SPI3->CR2|=SPI_CR2_TXDMAEN; // Enable I2S TX DMA request.
CallbackFunction=callback;
CallbackContext=context;
BufferNumber=0;
if(CallbackFunction) CallbackFunction(CallbackContext,BufferNumber);
}
static void InitializePixelDMA(int pixelclock,int pixelsperrow)
{
// Configure timer 8 as the pixel clock.
TIM8->CR1=TIM_CR1_ARPE;
TIM8->DIER=TIM_DIER_UDE; // Enable update DMA request.
TIM8->PSC=0; // Prescaler = 1.
TIM8->ARR=pixelclock-1;
TIM8->SMCR=(5*TIM_SMCR_SMS_0)|(1*TIM_SMCR_TS_0); // Only run TIM8 when TIM2 trigger-out is high.
// DMA2 stream 1 channel 7 is triggered by timer 8.
// Stop it and configure interrupts.
DMA2_Stream1->CR&=~DMA_SxCR_EN;
InstallInterruptHandler(DMA2_Stream1_IRQn,DMACompleteHandler);
EnableInterrupt(DMA2_Stream1_IRQn);
SetInterruptPriority(DMA2_Stream1_IRQn,0);
VGAPixelsPerRow=pixelsperrow;
}
void InitializeVGAHorizontalSync31kHz(InterruptHandler *handler)
{
// Configure timer 9 as the HSYNC timer.
TIM9->CR1=TIM_CR1_ARPE;
TIM9->DIER=TIM_DIER_UIE|TIM_DIER_CC1IE|TIM_DIER_CC2IE; // Enable update, compare 1 and 2 interrupts.
TIM9->CCMR1=0;
TIM9->CCER=0;
TIM9->PSC=0; // Prescaler = 1
TIM9->ARR=5337; // 168 MHz / 31.4686 kHz = 5338.65504
TIM9->CCR1=633; // 168 MHz * 3.77 microseconds = 633.36 - sync pulse end
TIM9->CCR2=950; // 168 MHz * (3.77 + 1.89) microseconds = 950.88 - back porch end
// Enable HSYNC timer interrupt and set highest priority.
InstallInterruptHandler(TIM1_BRK_TIM9_IRQn,handler);
EnableInterrupt(TIM1_BRK_TIM9_IRQn);
SetInterruptPriority(TIM1_BRK_TIM9_IRQn,0);
// Enable HSYNC timer.
TIM9->CR1|=TIM_CR1_CEN;
}
