/** * FchInitLateSataIde2Ahci - Prepare SATA Ide2Ahci controller to * boot to OS. * * - Set class ID to Ide2Ahci (if set to Ide2Ahci * Mode) * - Enable Ide2Ahci interrupt * * @param[in] FchDataPtr Fch configuration structure pointer. * */ VOID FchInitLateSataIde2Ahci ( IN VOID *FchDataPtr ) { UINT32 Bar5; FCH_DATA_BLOCK *LocalCfgPtr; AMD_CONFIG_PARAMS *StdHeader; LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; StdHeader = LocalCfgPtr->StdHeader; // //program the AHCI class code // RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0, 0x01060100, StdHeader); SataBar5setting (LocalCfgPtr, &Bar5); // //Set interrupt enable bit // RwMem ((Bar5 + 0x04), AccessWidth8, (UINT32)~0, BIT1); ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5); }
/** * FchInitLateSataAhci - Prepare SATA AHCI controller to boot to * OS. * * * @param[in] FchDataPtr Fch configuration structure pointer. * */ VOID FchInitLateSataAhci ( IN VOID *FchDataPtr ) { UINT32 Bar5; FCH_DATA_BLOCK *LocalCfgPtr; LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; SataBar5setting (LocalCfgPtr, &Bar5); ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5); }
/** * FchInitMidSataRaid - Config SATA Raid controller after PCI * emulation * * * * @param[in] FchDataPtr Fch configuration structure pointer. * */ VOID FchInitMidSataRaid ( IN VOID *FchDataPtr ) { UINT32 Bar5; FCH_DATA_BLOCK *LocalCfgPtr; LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; SataRaidSetDeviceNumMsi (LocalCfgPtr); SataBar5setting (LocalCfgPtr, &Bar5); ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5); }