void pwm_mode(timer_dev *dev, uint8_t channel) { timer_disable_irq(dev, channel); // timer_oc_set_mode(dev, channel, TIMER_OC_MODE_PWM_1, TIMER_OC_PE); switch (channel) { case 1: TIM_SelectOCxM(dev->regs, TIM_Channel_1, TIM_OCMode_PWM1); TIM_OC1PreloadConfig(dev->regs, TIM_OCPreload_Enable); break; case 2: TIM_SelectOCxM(dev->regs, TIM_Channel_2, TIM_OCMode_PWM1); TIM_OC2PreloadConfig(dev->regs, TIM_OCPreload_Enable); break; case 3: TIM_SelectOCxM(dev->regs, TIM_Channel_3, TIM_OCMode_PWM1); TIM_OC3PreloadConfig(dev->regs, TIM_OCPreload_Enable); break; case 4: TIM_SelectOCxM(dev->regs, TIM_Channel_4, TIM_OCMode_PWM1); TIM_OC4PreloadConfig(dev->regs, TIM_OCPreload_Enable); break; } timer_cc_enable(dev, channel); }
static void stop_pwm_hw(void) { m_is_running = false; m_sample_buffer.write = 0; m_sample_buffer.read = 0; #ifdef HW_HAS_DRV8313 DISABLE_BR(); #endif TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_ForcedAction_InActive); TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable); TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_ForcedAction_InActive); TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable); TIM_GenerateEvent(TIM1, TIM_EventSource_COM); }
static void set_modulation(float mod) { utils_truncate_number_abs(&mod, m_conf->l_max_duty); m_mod_now = mod; if (m_output_mode == GPD_OUTPUT_MODE_NONE || mc_interface_get_fault() != FAULT_CODE_NONE) { return; } if (m_conf->pwm_mode == PWM_MODE_BIPOLAR) { uint32_t duty = (uint32_t) (((float)TIM1->ARR / 2.0) * mod + ((float)TIM1->ARR / 2.0)); TIM1->CCR1 = duty; TIM1->CCR3 = duty; // + TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable); // - TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM2); TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable); } else { uint32_t duty = (uint32_t)((float)TIM1->ARR * fabsf(mod)); TIM1->CCR1 = duty; TIM1->CCR3 = duty; if (mod >= 0) { // + TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable); // - TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_Inactive); TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable); } else { // + TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable); // - TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_Inactive); TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable); } } TIM_GenerateEvent(TIM1, TIM_EventSource_COM); m_is_running = true; }
/** * @brief This function handles TIM1 Break, Update, Trigger and Commutation interrupt request. * @param None * @retval None */ void TIM1_BRK_UP_TRG_COM_IRQHandler(void) { /* Clear TIM1 COM pending bit */ TIM_ClearITPendingBit(TIM1, TIM_IT_COM); if (step == 1) { /* Next step: Step 2 Configuration -------------------------------------- */ /* Channel3 configuration */ TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable); /* Channel1 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable); /* Channel2 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1 ); TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable); step++; } else if (step == 2) { /* Next step: Step 3 Configuration -------------------------------------- */ /* Channel2 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable); /* Channel3 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable); /* Channel1 configuration */ TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable); step++; } else if (step == 3) { /* Next step: Step 4 Configuration -------------------------------------- */ /* Channel3 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable); /* Channel2 configuration */ TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable); /* Channel1 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable); step++; } else if (step == 4) { /* Next step: Step 5 Configuration -------------------------------------- */ /* Channel3 configuration */ TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable); /* Channel1 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable); /* Channel2 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable); step++; } else if (step == 5) { /* Next step: Step 6 Configuration -------------------------------------- */ /* Channel3 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable); /* Channel1 configuration */ TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable); /* Channel2 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable); step++; } else { /* Next step: Step 1 Configuration -------------------------------------- */ /* Channel1 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable); TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable); /* Channel3 configuration */ TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1); TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable); /* Channel2 configuration */ TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable); TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable); step = 1; } }
/* set phase to "negative without PWM */ void pwm_set_low(TIM_TypeDef* TIMx, uint16_t TIM_Channel) { TIM_SelectOCxM(TIMx, TIM_Channel, TIM_ForcedAction_InActive); TIM_CCxCmd(TIMx, TIM_Channel, TIM_CCx_Disable); TIM_CCxNCmd(TIMx, TIM_Channel, TIM_CCxN_Enable); }
//互补输出使能 void pwm_set_on(TIM_TypeDef* TIMx, uint16_t TIM_Channel) { TIM_SelectOCxM(TIMx, TIM_Channel, TIM_OCMode_PWM1); TIM_CCxCmd(TIMx, TIM_Channel, TIM_CCx_Enable); TIM_CCxNCmd(TIMx, TIM_Channel, TIM_CCxN_Enable); }