STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8x8.h"
/* code copyied from SSD1306 */
static const uint8_t u8x8_d_sh1107_64x128_noname_powersave0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0af), /* display on */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_sh1107_64x128_noname_powersave1_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0ae), /* display off */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_sh1107_64x128_noname_flip0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8x8.h"
static const uint8_t u8x8_d_uc1604_powersave0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_DLY(20),
U8X8_C(0x0af), /* display on */
U8X8_DLY(20), /* during setup, it seems that the startup is more reliable when sending this cmd twice */
U8X8_C(0x0af), /* display on */
U8X8_DLY(50), /* startup takes some time */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_uc1604_powersave1_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0ae), /* display off, enter sleep mode */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_uc1604_flip0_seq[] = {
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
6 Nov 2016: Not yet finished
*/
#include "u8x8.h"
static const uint8_t u8x8_d_uc1611_powersave0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0a9), /* display on */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_uc1611_powersave1_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0a8), /* display off, enter sleep mode */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_uc1611_flip0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_CA(0x0c0, 0x004), /* LCD Mapping */
U8X8_END_TRANSFER(), /* disable chip */
*/
#include "u8x8.h"
/* ER OLED */
static const uint8_t u8x8_d_ssd1326_er_256x32_init_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_CA(0x0fd, 0x012), /* unlock (not required, this is default by reset) */
U8X8_C(0x0ae), /* display off */
U8X8_CA(0x0a8, 0x01f), /* multiplex ratio: 0x03f * 1/64 duty - changed by CREESOO, acc. to datasheet, 100317*/
U8X8_CA(0x0a1, 0x000), /* display start line */
U8X8_CA(0x0a2, 0x000), /* display offset, shift mapping ram counter */
//U8X8_CA(0x0ad, 0x002), /* master configuration: disable embedded DC-DC, enable internal VCOMH */
U8X8_CA(0x0a0, 0x052), /* remap configuration, horizontal address increment (bit 2 = 0), enable nibble remap (upper nibble is left, bit 1 = 1) */
U8X8_C(0x086), /* full current range (0x084, 0x085, 0x086) */
U8X8_C(0x0b7), /* set default gray scale table */
U8X8_CA(0x081, 0x027), /* contrast, brightness, 0..128 */
U8X8_CA(0x0b1, 0x071), /* phase length */
//U8X8_CA(0x0b2, 0x051), /* frame frequency (row period) */
U8X8_CA(0x0b3, 0x0f0), /* set display clock divide ratio/oscillator frequency (set clock as 135 frames/sec) */
//U8X8_CA(0x0b4, 0x002), /* set pre-charge compensation level (not documented in the SDD1325 datasheet, but used in the NHD init seq.) */
//U8X8_CA(0x0b0, 0x028), /* enable pre-charge compensation (not documented in the SDD1325 datasheet, but used in the NHD init seq.) */
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
The t6963 controller does not support hardware graphics flip.
Contrast adjustment is done by an external resistor --> no support for contrast adjustment
*/
#include "u8x8.h"
static const uint8_t u8x8_d_t6963_powersave0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x098), /* mode register: Display Mode, Graphics on, Text off, Cursor off */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_t6963_powersave1_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x090), /* All Off */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
uint8_t u8x8_d_t6963_common(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
{
uint8_t c, i;
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8x8.h"
static const uint8_t u8x8_d_ssd1309_powersave0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0af), /* display on */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_ssd1309_powersave1_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0ae), /* display off */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_ssd1309_128x64_flip0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8x8.h"
/* UG-2832HSWEG02 Datasheet, Section 4.4 */
static const uint8_t u8x8_d_ssd1306_128x32_univision_init_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0ae), /* display off */
U8X8_CA(0x0d5, 0x080), /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
U8X8_CA(0x0a8, 0x01f), /* multiplex ratio */
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
// Flipmode
// U8X8_C(0x0a0), /* segment remap a0/a1*/
// U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
U8X8_CA(0x0da, 0x002), /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */
U8X8_CA(0x081, 0x08f), /* [2] set contrast control */
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8x8.h"
static const uint8_t u8x8_d_pcd8544_84x48_init_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x021), /* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */
U8X8_C(0x006), /* temp. control: b10 = 2 */
U8X8_C(0x013), /* bias system 1:48 */
U8X8_C(0x0c0), /* medium Vop */
U8X8_C(0x020), /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
U8X8_C(0x008), /* blank */
U8X8_C(0x024), /* power down (PD=1), horizontal increment (V=0), enter normal command set (H=0) */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_pcd8544_84x48_powersave0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x020), /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
static const uint8_t u8x8_d_ssd1606_172x72_gde021a1_init_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_CA(0x10, 0x00), /* Deep Sleep mode Control: Disable */
U8X8_CA(0x11, 0x03), /* Define data entry mode, x&y inc, x first */
U8X8_CAA(0x44, 0, 31), /* RAM x start & end, each byte has 4 pixel, 32*4=128 */
U8X8_CAA(0x45, 0, 179), /* RAM y start & end, 179 MAX */
U8X8_CA(0x4e, 0), /* set x pos, 0..31 */
U8X8_CA(0x4f, 0), /* set y pos, 0...179 */
U8X8_CA(0xf0, 0x1f), /* set booster feedback to internal */
U8X8_CA(0x22, 0xc0), /* display update seq. option: enable clk, enable CP, .... todo: this is never activated */
U8X8_C(0x32), /* write LUT register*/
#ifdef ORIGINAL_LUT
/* wavefrom part of the LUT: absolute LUT... this will always force the destination color */
U8X8_A4(0x00,0x00,0x00,0x55), /* step 0 */
U8X8_A4(0x00,0x00,0x55,0x55), /* step 1 */
U8X8_A4(0x00,0x55,0x55,0x55),
U8X8_A4(0xAA,0xAA,0xAA,0xAA),
U8X8_A4(0x15,0x15,0x15,0x15),
U8X8_A4(0x05,0x05,0x05,0x05),
U8X8_A4(0x01,0x01,0x01,0x01),
U8X8_A4(0x00,0x00,0x00,0x00),
U8X8_A4(0x00,0x00,0x00,0x00),
U8X8_A4(0x00,0x00,0x00,0x00),
U8X8_A4(0x00,0x00,0x00,0x00),
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8x8.h"
static const uint8_t u8x8_d_ks0108_init_seq[] = {
U8X8_C(0x0c0), /* satart at the top */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_ks0108_powersave0_seq[] = {
U8X8_C(0x03f), /* display on */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_ks0108_powersave1_seq[] = {
U8X8_C(0x03e), /* display off */
U8X8_END() /* end of sequence */
};
struct u8x8_ks0108_vars
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8x8.h"
static const uint8_t u8x8_d_uc1608_powersave0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0af), /* display on */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_uc1608_powersave1_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0ae), /* display off, enter sleep mode */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_uc1608_flip0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0c8), /* LCD Mapping */
U8X8_END_TRANSFER(), /* disable chip */
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8x8.h"
static const uint8_t u8x8_d_uc1701_mini12864_init_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0e2), /* soft reset */
U8X8_C(0x0ae), /* display off */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_C(0x0a0), /* ADC set to reverse */
U8X8_C(0x0c8), /* common output mode */
U8X8_C(0x0a6), /* display normal, bit val 0: LCD pixel off. */
U8X8_C(0x0a2), /* LCD bias 1/9 */
U8X8_C(0x02f), /* all power control circuits on */
U8X8_C(0x0f8), /* set booster ratio to */
U8X8_C(0x000), /* 4x */
U8X8_C(0x023), /* set V0 voltage resistor ratio to large */
U8X8_C(0x081), /* set contrast */
U8X8_C(0x027), /* contrast value */
U8X8_C(0x0ac), /* indicator */
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8x8.h"
static const uint8_t u8x8_d_hx1230_96x68_init_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0ae), /* display off */
U8X8_C(0x020), /* power off */
U8X8_C(0x080), /* contrast setting, 0..31, set to 0 */
U8X8_C(0x0a6), /* not inverted display */
U8X8_C(0x0a4), /* normal display mode */
U8X8_C(0x0a0), /* */
U8X8_C(0x0c0), /* */
U8X8_C(0x040), /* start at scanline 0 */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
static const uint8_t u8x8_d_hx1230_96x68_powersave0_seq[] = {
